1*c66ec88fSEmmanuel VadotXilinx SPI controller Device Tree Bindings 2*c66ec88fSEmmanuel Vadot------------------------------------------------- 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotRequired properties: 5*c66ec88fSEmmanuel Vadot- compatible : Should be "xlnx,xps-spi-2.00.a", "xlnx,xps-spi-2.00.b" or "xlnx,axi-quad-spi-1.00.a" 6*c66ec88fSEmmanuel Vadot- reg : Physical base address and size of SPI registers map. 7*c66ec88fSEmmanuel Vadot- interrupts : Property with a value describing the interrupt 8*c66ec88fSEmmanuel Vadot number. 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel VadotOptional properties: 11*c66ec88fSEmmanuel Vadot- xlnx,num-ss-bits : Number of chip selects used. 12*c66ec88fSEmmanuel Vadot- xlnx,num-transfer-bits : Number of bits per transfer. This will be 8 if not specified 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel VadotExample: 15*c66ec88fSEmmanuel Vadot axi_quad_spi@41e00000 { 16*c66ec88fSEmmanuel Vadot compatible = "xlnx,xps-spi-2.00.a"; 17*c66ec88fSEmmanuel Vadot interrupt-parent = <&intc>; 18*c66ec88fSEmmanuel Vadot interrupts = <0 31 1>; 19*c66ec88fSEmmanuel Vadot reg = <0x41e00000 0x10000>; 20*c66ec88fSEmmanuel Vadot xlnx,num-ss-bits = <0x1>; 21*c66ec88fSEmmanuel Vadot xlnx,num-transfer-bits = <32>; 22*c66ec88fSEmmanuel Vadot }; 23*c66ec88fSEmmanuel Vadot 24