1*c66ec88fSEmmanuel VadotAtmel SPI device
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotRequired properties:
4*c66ec88fSEmmanuel Vadot- compatible : should be "atmel,at91rm9200-spi" or "microchip,sam9x60-spi".
5*c66ec88fSEmmanuel Vadot- reg: Address and length of the register set for the device
6*c66ec88fSEmmanuel Vadot- interrupts: Should contain spi interrupt
7*c66ec88fSEmmanuel Vadot- cs-gpios: chipselects (optional for SPI controller version >= 2 with the
8*c66ec88fSEmmanuel Vadot  Chip Select Active After Transfer feature).
9*c66ec88fSEmmanuel Vadot- clock-names: tuple listing input clock names.
10*c66ec88fSEmmanuel Vadot	Required elements: "spi_clk"
11*c66ec88fSEmmanuel Vadot- clocks: phandles to input clocks.
12*c66ec88fSEmmanuel Vadot
13*c66ec88fSEmmanuel VadotOptional properties:
14*c66ec88fSEmmanuel Vadot- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
15*c66ec88fSEmmanuel Vadot  capable SPI controllers.
16*c66ec88fSEmmanuel Vadot
17*c66ec88fSEmmanuel VadotExample:
18*c66ec88fSEmmanuel Vadot
19*c66ec88fSEmmanuel Vadotspi1: spi@fffcc000 {
20*c66ec88fSEmmanuel Vadot	compatible = "atmel,at91rm9200-spi";
21*c66ec88fSEmmanuel Vadot	reg = <0xfffcc000 0x4000>;
22*c66ec88fSEmmanuel Vadot	interrupts = <13 4 5>;
23*c66ec88fSEmmanuel Vadot	#address-cells = <1>;
24*c66ec88fSEmmanuel Vadot	#size-cells = <0>;
25*c66ec88fSEmmanuel Vadot	clocks = <&spi1_clk>;
26*c66ec88fSEmmanuel Vadot	clock-names = "spi_clk";
27*c66ec88fSEmmanuel Vadot	cs-gpios = <&pioB 3 0>;
28*c66ec88fSEmmanuel Vadot	atmel,fifo-size = <32>;
29*c66ec88fSEmmanuel Vadot
30*c66ec88fSEmmanuel Vadot	mmc-slot@0 {
31*c66ec88fSEmmanuel Vadot		compatible = "mmc-spi-slot";
32*c66ec88fSEmmanuel Vadot		reg = <0>;
33*c66ec88fSEmmanuel Vadot		gpios = <&pioC 4 0>;	/* CD */
34*c66ec88fSEmmanuel Vadot		spi-max-frequency = <25000000>;
35*c66ec88fSEmmanuel Vadot	};
36*c66ec88fSEmmanuel Vadot};
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