1# SPDX-License-Identifier: (GPL-2.0 OR MIT)
2# Copyright 2019 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: QCOM SoC Temperature Sensor (TSENS)
9
10maintainers:
11  - Amit Kucheria <amitk@kernel.org>
12
13description: |
14  QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15  three distinct major versions of the IP that is supported by a single driver.
16  The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17  everything before v1 when there was no versioning information.
18
19properties:
20  compatible:
21    oneOf:
22      - description: msm9860 TSENS based
23        items:
24          - enum:
25              - qcom,ipq8064-tsens
26
27      - description: v0.1 of TSENS
28        items:
29          - enum:
30              - qcom,mdm9607-tsens
31              - qcom,msm8916-tsens
32              - qcom,msm8939-tsens
33              - qcom,msm8974-tsens
34          - const: qcom,tsens-v0_1
35
36      - description: v1 of TSENS
37        items:
38          - enum:
39              - qcom,msm8976-tsens
40              - qcom,qcs404-tsens
41          - const: qcom,tsens-v1
42
43      - description: v2 of TSENS
44        items:
45          - enum:
46              - qcom,msm8953-tsens
47              - qcom,msm8996-tsens
48              - qcom,msm8998-tsens
49              - qcom,sc7180-tsens
50              - qcom,sc7280-tsens
51              - qcom,sc8180x-tsens
52              - qcom,sdm630-tsens
53              - qcom,sdm845-tsens
54              - qcom,sm8150-tsens
55              - qcom,sm8250-tsens
56              - qcom,sm8350-tsens
57          - const: qcom,tsens-v2
58
59  reg:
60    items:
61      - description: TM registers
62      - description: SROT registers
63
64  interrupts:
65    minItems: 1
66    items:
67      - description: Combined interrupt if upper or lower threshold crossed
68      - description: Interrupt if critical threshold crossed
69
70  interrupt-names:
71    minItems: 1
72    items:
73      - const: uplow
74      - const: critical
75
76  nvmem-cells:
77    minItems: 1
78    maxItems: 2
79    description:
80      Reference to an nvmem node for the calibration data
81
82  nvmem-cell-names:
83    minItems: 1
84    items:
85      - const: calib
86      - enum:
87          - calib_backup
88          - calib_sel
89
90  "#qcom,sensors":
91    description:
92      Number of sensors enabled on this platform
93    $ref: /schemas/types.yaml#/definitions/uint32
94    minimum: 1
95    maximum: 16
96
97  "#thermal-sensor-cells":
98    const: 1
99    description:
100      Number of cells required to uniquely identify the thermal sensors. Since
101      we have multiple sensors this is set to 1
102
103required:
104  - compatible
105  - interrupts
106  - interrupt-names
107  - "#thermal-sensor-cells"
108  - "#qcom,sensors"
109
110allOf:
111  - if:
112      properties:
113        compatible:
114          contains:
115            enum:
116              - qcom,ipq8064-tsens
117              - qcom,mdm9607-tsens
118              - qcom,msm8916-tsens
119              - qcom,msm8974-tsens
120              - qcom,msm8976-tsens
121              - qcom,qcs404-tsens
122              - qcom,tsens-v0_1
123              - qcom,tsens-v1
124    then:
125      properties:
126        interrupts:
127          maxItems: 1
128        interrupt-names:
129          maxItems: 1
130
131    else:
132      properties:
133        interrupts:
134          minItems: 2
135        interrupt-names:
136          minItems: 2
137
138  - if:
139      properties:
140        compatible:
141          contains:
142            enum:
143              - qcom,tsens-v0_1
144              - qcom,tsens-v1
145              - qcom,tsens-v2
146
147    then:
148      required:
149        - reg
150
151additionalProperties: false
152
153examples:
154  - |
155    #include <dt-bindings/interrupt-controller/arm-gic.h>
156    // Example msm9860 based SoC (ipq8064):
157    gcc: clock-controller {
158
159           /* ... */
160
161           tsens: thermal-sensor {
162                compatible = "qcom,ipq8064-tsens";
163
164                 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
165                 nvmem-cell-names = "calib", "calib_backup";
166                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
167                 interrupt-names = "uplow";
168
169                 #qcom,sensors = <11>;
170                 #thermal-sensor-cells = <1>;
171          };
172    };
173
174  - |
175    #include <dt-bindings/interrupt-controller/arm-gic.h>
176    // Example 1 (legacy: for pre v1 IP):
177    tsens1: thermal-sensor@900000 {
178           compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
179           reg = <0x4a9000 0x1000>, /* TM */
180                 <0x4a8000 0x1000>; /* SROT */
181
182           nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
183           nvmem-cell-names = "calib", "calib_sel";
184
185           interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
186           interrupt-names = "uplow";
187
188           #qcom,sensors = <5>;
189           #thermal-sensor-cells = <1>;
190    };
191
192  - |
193    #include <dt-bindings/interrupt-controller/arm-gic.h>
194    // Example 2 (for any platform containing v1 of the TSENS IP):
195    tsens2: thermal-sensor@4a9000 {
196          compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
197          reg = <0x004a9000 0x1000>, /* TM */
198                <0x004a8000 0x1000>; /* SROT */
199
200          nvmem-cells = <&tsens_caldata>;
201          nvmem-cell-names = "calib";
202
203          interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
204          interrupt-names = "uplow";
205
206          #qcom,sensors = <10>;
207          #thermal-sensor-cells = <1>;
208    };
209
210  - |
211    #include <dt-bindings/interrupt-controller/arm-gic.h>
212    // Example 3 (for any platform containing v2 of the TSENS IP):
213    tsens3: thermal-sensor@c263000 {
214           compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
215           reg = <0xc263000 0x1ff>,
216                 <0xc222000 0x1ff>;
217
218           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
219                        <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
220           interrupt-names = "uplow", "critical";
221
222           #qcom,sensors = <13>;
223           #thermal-sensor-cells = <1>;
224    };
225...
226