1* Temperature Sensor ADC (TSADC) on rockchip SoCs
2
3Required properties:
4- compatible : should be "rockchip,<name>-tsadc"
5   "rockchip,px30-tsadc":   found on PX30 SoCs
6   "rockchip,rv1108-tsadc": found on RV1108 SoCs
7   "rockchip,rk3228-tsadc": found on RK3228 SoCs
8   "rockchip,rk3288-tsadc": found on RK3288 SoCs
9   "rockchip,rk3328-tsadc": found on RK3328 SoCs
10   "rockchip,rk3368-tsadc": found on RK3368 SoCs
11   "rockchip,rk3399-tsadc": found on RK3399 SoCs
12- reg : physical base address of the controller and length of memory mapped
13	region.
14- interrupts : The interrupt number to the cpu. The interrupt specifier format
15	       depends on the interrupt controller.
16- clocks : Must contain an entry for each entry in clock-names.
17- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
18		the peripheral clock.
19- resets : Must contain an entry for each entry in reset-names.
20	   See ../reset/reset.txt for details.
21- reset-names : Must include the name "tsadc-apb".
22- pinctrl-names : The pin control state names;
23- pinctrl-0 : The "init" pinctrl state, it will be set before device probe.
24- pinctrl-1 : The "default" pinctrl state, it will be set after reset the
25	      TSADC controller.
26- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.
27- #thermal-sensor-cells : Should be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description.
28
29Optional properties:
30- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
31- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
32- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
33			       1:HIGH.
34- rockchip,grf : The phandle of the syscon node for the general register file.
35
36Exiample:
37tsadc: tsadc@ff280000 {
38	compatible = "rockchip,rk3288-tsadc";
39	reg = <0xff280000 0x100>;
40	interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
41	clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
42	clock-names = "tsadc", "apb_pclk";
43	resets = <&cru SRST_TSADC>;
44	reset-names = "tsadc-apb";
45	pinctrl-names = "init", "default", "sleep";
46	pinctrl-0 = <&otp_gpio>;
47	pinctrl-1 = <&otp_out>;
48	pinctrl-2 = <&otp_gpio>;
49	#thermal-sensor-cells = <1>;
50	rockchip,hw-tshut-temp = <95000>;
51	rockchip,hw-tshut-mode = <0>;
52	rockchip,hw-tshut-polarity = <0>;
53};
54
55Example: referring to thermal sensors:
56thermal-zones {
57	cpu_thermal: cpu_thermal {
58		polling-delay-passive = <1000>; /* milliseconds */
59		polling-delay = <5000>; /* milliseconds */
60
61		/* sensor	ID */
62		thermal-sensors = <&tsadc	1>;
63
64		trips {
65			cpu_alert0: cpu_alert {
66				temperature = <70000>; /* millicelsius */
67				hysteresis = <2000>; /* millicelsius */
68				type = "passive";
69			};
70			cpu_crit: cpu_crit {
71				temperature = <90000>; /* millicelsius */
72				hysteresis = <2000>; /* millicelsius */
73				type = "critical";
74			};
75		};
76
77		cooling-maps {
78			map0 {
79				trip = <&cpu_alert0>;
80				cooling-device =
81				    <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
82			};
83		};
84	};
85};
86