1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Temperature Sensor ADC (TSADC) on Rockchip SoCs
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    enum:
15      - rockchip,px30-tsadc
16      - rockchip,rk3228-tsadc
17      - rockchip,rk3288-tsadc
18      - rockchip,rk3328-tsadc
19      - rockchip,rk3368-tsadc
20      - rockchip,rk3399-tsadc
21      - rockchip,rk3568-tsadc
22      - rockchip,rk3588-tsadc
23      - rockchip,rv1108-tsadc
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    maxItems: 1
30
31  clocks:
32    minItems: 2
33    maxItems: 2
34
35  clock-names:
36    items:
37      - const: tsadc
38      - const: apb_pclk
39
40  resets:
41    minItems: 1
42    maxItems: 3
43
44  reset-names:
45    minItems: 1
46    items:
47      - const: tsadc-apb
48      - const: tsadc
49      - const: tsadc-phy
50
51  "#thermal-sensor-cells":
52    const: 1
53
54  rockchip,grf:
55    description: The phandle of the syscon node for the general register file.
56    $ref: /schemas/types.yaml#/definitions/phandle
57
58  rockchip,hw-tshut-temp:
59    description: The hardware-controlled shutdown temperature value.
60    $ref: /schemas/types.yaml#/definitions/uint32
61
62  rockchip,hw-tshut-mode:
63    description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
64    $ref: /schemas/types.yaml#/definitions/uint32
65    enum: [0, 1]
66
67  rockchip,hw-tshut-polarity:
68    description: The hardware-controlled active polarity 0:LOW 1:HIGH.
69    $ref: /schemas/types.yaml#/definitions/uint32
70    enum: [0, 1]
71
72required:
73  - compatible
74  - reg
75  - interrupts
76  - clocks
77  - clock-names
78  - resets
79  - "#thermal-sensor-cells"
80
81additionalProperties: false
82
83examples:
84  - |
85    #include <dt-bindings/interrupt-controller/arm-gic.h>
86    #include <dt-bindings/clock/rk3288-cru.h>
87
88    tsadc: tsadc@ff280000 {
89        compatible = "rockchip,rk3288-tsadc";
90        reg = <0xff280000 0x100>;
91        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
92        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
93        clock-names = "tsadc", "apb_pclk";
94        resets = <&cru SRST_TSADC>;
95        reset-names = "tsadc-apb";
96        #thermal-sensor-cells = <1>;
97        rockchip,hw-tshut-temp = <95000>;
98        rockchip,hw-tshut-mode = <0>;
99        rockchip,hw-tshut-polarity = <0>;
100    };
101