1*c66ec88fSEmmanuel VadotJ-Core Programmable Interval Timer and Clocksource
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotRequired properties:
4*c66ec88fSEmmanuel Vadot
5*c66ec88fSEmmanuel Vadot- compatible: Must be "jcore,pit".
6*c66ec88fSEmmanuel Vadot
7*c66ec88fSEmmanuel Vadot- reg: Memory region(s) for timer/clocksource registers. For SMP,
8*c66ec88fSEmmanuel Vadot  there should be one region per cpu, indexed by the sequential,
9*c66ec88fSEmmanuel Vadot  zero-based hardware cpu number.
10*c66ec88fSEmmanuel Vadot
11*c66ec88fSEmmanuel Vadot- interrupts: An interrupt to assign for the timer. The actual pit
12*c66ec88fSEmmanuel Vadot  core is integrated with the aic and allows the timer interrupt
13*c66ec88fSEmmanuel Vadot  assignment to be programmed by software, but this property is
14*c66ec88fSEmmanuel Vadot  required in order to reserve an interrupt number that doesn't
15*c66ec88fSEmmanuel Vadot  conflict with other devices.
16*c66ec88fSEmmanuel Vadot
17*c66ec88fSEmmanuel Vadot
18*c66ec88fSEmmanuel VadotExample:
19*c66ec88fSEmmanuel Vadot
20*c66ec88fSEmmanuel Vadottimer@200 {
21*c66ec88fSEmmanuel Vadot	compatible = "jcore,pit";
22*c66ec88fSEmmanuel Vadot	reg = < 0x200 0x30 0x500 0x30 >;
23*c66ec88fSEmmanuel Vadot	interrupts = < 0x48 >;
24*c66ec88fSEmmanuel Vadot};
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