1Mediatek SoCs Watchdog timer
2
3The watchdog supports a pre-timeout interrupt that fires timeout-sec/2
4before the expiry.
5
6Required properties:
7
8- compatible should contain:
9	"mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701
10	"mediatek,mt2712-wdt": for MT2712
11	"mediatek,mt6582-wdt", "mediatek,mt6589-wdt": for MT6582
12	"mediatek,mt6589-wdt": for MT6589
13	"mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797
14	"mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622
15	"mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623
16	"mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629
17	"mediatek,mt7986-wdt", "mediatek,mt6589-wdt": for MT7986
18	"mediatek,mt8183-wdt": for MT8183
19	"mediatek,mt8186-wdt", "mediatek,mt6589-wdt": for MT8186
20	"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
21	"mediatek,mt8192-wdt": for MT8192
22	"mediatek,mt8195-wdt", "mediatek,mt6589-wdt": for MT8195
23
24- reg : Specifies base physical address and size of the registers.
25
26Optional properties:
27- mediatek,disable-extrst: disable send output reset signal
28- interrupts: Watchdog pre-timeout (bark) interrupt.
29- timeout-sec: contains the watchdog timeout in seconds.
30- #reset-cells: Should be 1.
31
32Example:
33
34watchdog: watchdog@10007000 {
35	compatible = "mediatek,mt8183-wdt",
36		     "mediatek,mt6589-wdt";
37	mediatek,disable-extrst;
38	reg = <0 0x10007000 0 0x100>;
39	interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>;
40	timeout-sec = <10>;
41	#reset-cells = <1>;
42};
43