1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * This header provides clock numbers for the ingenic,jz4770-cgu DT binding.
4  */
5 
6 #ifndef __DT_BINDINGS_CLOCK_JZ4770_CGU_H__
7 #define __DT_BINDINGS_CLOCK_JZ4770_CGU_H__
8 
9 #define JZ4770_CLK_EXT		0
10 #define JZ4770_CLK_OSC32K	1
11 #define JZ4770_CLK_PLL0		2
12 #define JZ4770_CLK_PLL1		3
13 #define JZ4770_CLK_CCLK		4
14 #define JZ4770_CLK_H0CLK	5
15 #define JZ4770_CLK_H1CLK	6
16 #define JZ4770_CLK_H2CLK	7
17 #define JZ4770_CLK_C1CLK	8
18 #define JZ4770_CLK_PCLK		9
19 #define JZ4770_CLK_MMC0_MUX	10
20 #define JZ4770_CLK_MMC0		11
21 #define JZ4770_CLK_MMC1_MUX	12
22 #define JZ4770_CLK_MMC1		13
23 #define JZ4770_CLK_MMC2_MUX	14
24 #define JZ4770_CLK_MMC2		15
25 #define JZ4770_CLK_CIM		16
26 #define JZ4770_CLK_UHC		17
27 #define JZ4770_CLK_GPU		18
28 #define JZ4770_CLK_BCH		19
29 #define JZ4770_CLK_LPCLK_MUX	20
30 #define JZ4770_CLK_GPS		21
31 #define JZ4770_CLK_SSI_MUX	22
32 #define JZ4770_CLK_PCM_MUX	23
33 #define JZ4770_CLK_I2S		24
34 #define JZ4770_CLK_OTG		25
35 #define JZ4770_CLK_SSI0		26
36 #define JZ4770_CLK_SSI1		27
37 #define JZ4770_CLK_SSI2		28
38 #define JZ4770_CLK_PCM0		29
39 #define JZ4770_CLK_PCM1		30
40 #define JZ4770_CLK_DMA		31
41 #define JZ4770_CLK_I2C0		32
42 #define JZ4770_CLK_I2C1		33
43 #define JZ4770_CLK_I2C2		34
44 #define JZ4770_CLK_UART0	35
45 #define JZ4770_CLK_UART1	36
46 #define JZ4770_CLK_UART2	37
47 #define JZ4770_CLK_UART3	38
48 #define JZ4770_CLK_IPU		39
49 #define JZ4770_CLK_ADC		40
50 #define JZ4770_CLK_AIC		41
51 #define JZ4770_CLK_AUX		42
52 #define JZ4770_CLK_VPU		43
53 #define JZ4770_CLK_UHC_PHY	44
54 #define JZ4770_CLK_OTG_PHY	45
55 #define JZ4770_CLK_EXT512	46
56 #define JZ4770_CLK_RTC		47
57 
58 #endif /* __DT_BINDINGS_CLOCK_JZ4770_CGU_H__ */
59