1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2 /*
3  * Qualcomm MSM8996 interconnect IDs
4  *
5  * Copyright (c) 2021 Yassine Oudjana <y.oudjana@protonmail.com>
6  */
7 
8 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_H
9 #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_H
10 
11 /* A0NOC */
12 #define MASTER_PCIE_0			0
13 #define MASTER_PCIE_1			1
14 #define MASTER_PCIE_2			2
15 
16 /* A1NOC */
17 #define MASTER_CNOC_A1NOC		0
18 #define MASTER_CRYPTO_CORE0		1
19 #define MASTER_PNOC_A1NOC		2
20 
21 /* A2NOC */
22 #define MASTER_USB3			0
23 #define MASTER_IPA			1
24 #define MASTER_UFS			2
25 
26 /* BIMC */
27 #define MASTER_AMPSS_M0			0
28 #define MASTER_GRAPHICS_3D		1
29 #define MASTER_MNOC_BIMC		2
30 #define MASTER_SNOC_BIMC		3
31 #define SLAVE_EBI_CH0			4
32 #define SLAVE_HMSS_L3			5
33 #define SLAVE_BIMC_SNOC_0		6
34 #define SLAVE_BIMC_SNOC_1		7
35 
36 /* CNOC */
37 #define MASTER_SNOC_CNOC		0
38 #define MASTER_QDSS_DAP			1
39 #define SLAVE_CNOC_A1NOC		2
40 #define SLAVE_CLK_CTL			3
41 #define SLAVE_TCSR			4
42 #define SLAVE_TLMM			5
43 #define SLAVE_CRYPTO_0_CFG		6
44 #define SLAVE_MPM			7
45 #define SLAVE_PIMEM_CFG			8
46 #define SLAVE_IMEM_CFG			9
47 #define SLAVE_MESSAGE_RAM		10
48 #define SLAVE_BIMC_CFG			11
49 #define SLAVE_PMIC_ARB			12
50 #define SLAVE_PRNG			13
51 #define SLAVE_DCC_CFG			14
52 #define SLAVE_RBCPR_MX			15
53 #define SLAVE_QDSS_CFG			16
54 #define SLAVE_RBCPR_CX			17
55 #define SLAVE_QDSS_RBCPR_APU		18
56 #define SLAVE_CNOC_MNOC_CFG		19
57 #define SLAVE_SNOC_CFG			20
58 #define SLAVE_SNOC_MPU_CFG		21
59 #define SLAVE_EBI1_PHY_CFG		22
60 #define SLAVE_A0NOC_CFG			23
61 #define SLAVE_PCIE_1_CFG		24
62 #define SLAVE_PCIE_2_CFG		25
63 #define SLAVE_PCIE_0_CFG		26
64 #define SLAVE_PCIE20_AHB2PHY		27
65 #define SLAVE_A0NOC_MPU_CFG		28
66 #define SLAVE_UFS_CFG			29
67 #define SLAVE_A1NOC_CFG			30
68 #define SLAVE_A1NOC_MPU_CFG		31
69 #define SLAVE_A2NOC_CFG			32
70 #define SLAVE_A2NOC_MPU_CFG		33
71 #define SLAVE_SSC_CFG			34
72 #define SLAVE_A0NOC_SMMU_CFG		35
73 #define SLAVE_A1NOC_SMMU_CFG		36
74 #define SLAVE_A2NOC_SMMU_CFG		37
75 #define SLAVE_LPASS_SMMU_CFG		38
76 #define SLAVE_CNOC_MNOC_MMSS_CFG	39
77 
78 /* MNOC */
79 #define MASTER_CNOC_MNOC_CFG		0
80 #define MASTER_CPP			1
81 #define MASTER_JPEG			2
82 #define MASTER_MDP_PORT0		3
83 #define MASTER_MDP_PORT1		4
84 #define MASTER_ROTATOR			5
85 #define MASTER_VIDEO_P0			6
86 #define MASTER_VFE			7
87 #define MASTER_SNOC_VMEM		8
88 #define MASTER_VIDEO_P0_OCMEM		9
89 #define MASTER_CNOC_MNOC_MMSS_CFG	10
90 #define SLAVE_MNOC_BIMC			11
91 #define SLAVE_VMEM			12
92 #define SLAVE_SERVICE_MNOC		13
93 #define SLAVE_MMAGIC_CFG		14
94 #define SLAVE_CPR_CFG			15
95 #define SLAVE_MISC_CFG			16
96 #define SLAVE_VENUS_THROTTLE_CFG	17
97 #define SLAVE_VENUS_CFG			18
98 #define SLAVE_VMEM_CFG			19
99 #define SLAVE_DSA_CFG			20
100 #define SLAVE_MMSS_CLK_CFG		21
101 #define SLAVE_DSA_MPU_CFG		22
102 #define SLAVE_MNOC_MPU_CFG		23
103 #define SLAVE_DISPLAY_CFG		24
104 #define SLAVE_DISPLAY_THROTTLE_CFG	25
105 #define SLAVE_CAMERA_CFG		26
106 #define SLAVE_CAMERA_THROTTLE_CFG	27
107 #define SLAVE_GRAPHICS_3D_CFG		28
108 #define SLAVE_SMMU_MDP_CFG		29
109 #define SLAVE_SMMU_ROT_CFG		30
110 #define SLAVE_SMMU_VENUS_CFG		31
111 #define SLAVE_SMMU_CPP_CFG		32
112 #define SLAVE_SMMU_JPEG_CFG		33
113 #define SLAVE_SMMU_VFE_CFG		34
114 
115 /* PNOC */
116 #define MASTER_SNOC_PNOC		0
117 #define MASTER_SDCC_1			1
118 #define MASTER_SDCC_2			2
119 #define MASTER_SDCC_4			3
120 #define MASTER_USB_HS			4
121 #define MASTER_BLSP_1			5
122 #define MASTER_BLSP_2			6
123 #define MASTER_TSIF			7
124 #define SLAVE_PNOC_A1NOC		8
125 #define SLAVE_USB_HS			9
126 #define SLAVE_SDCC_2			10
127 #define SLAVE_SDCC_4			11
128 #define SLAVE_TSIF			12
129 #define SLAVE_BLSP_2			13
130 #define SLAVE_SDCC_1			14
131 #define SLAVE_BLSP_1			15
132 #define SLAVE_PDM			16
133 #define SLAVE_AHB2PHY			17
134 
135 /* SNOC */
136 #define MASTER_HMSS			0
137 #define MASTER_QDSS_BAM			1
138 #define MASTER_SNOC_CFG			2
139 #define MASTER_BIMC_SNOC_0		3
140 #define MASTER_BIMC_SNOC_1		4
141 #define MASTER_A0NOC_SNOC		5
142 #define MASTER_A1NOC_SNOC		6
143 #define MASTER_A2NOC_SNOC		7
144 #define MASTER_QDSS_ETR			8
145 #define SLAVE_A0NOC_SNOC		9
146 #define SLAVE_A1NOC_SNOC		10
147 #define SLAVE_A2NOC_SNOC		11
148 #define SLAVE_HMSS			12
149 #define SLAVE_LPASS			13
150 #define SLAVE_USB3			14
151 #define SLAVE_SNOC_BIMC			15
152 #define SLAVE_SNOC_CNOC			16
153 #define SLAVE_IMEM			17
154 #define SLAVE_PIMEM			18
155 #define SLAVE_SNOC_VMEM			19
156 #define SLAVE_SNOC_PNOC			20
157 #define SLAVE_QDSS_STM			21
158 #define SLAVE_PCIE_0			22
159 #define SLAVE_PCIE_1			23
160 #define SLAVE_PCIE_2			24
161 #define SLAVE_SERVICE_SNOC		25
162 
163 #endif
164