1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Qualcomm SM8250 interconnect IDs
4  *
5  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
6  */
7 
8 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
9 #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
10 
11 #define MASTER_A1NOC_CFG		0
12 #define MASTER_QSPI_0			1
13 #define MASTER_QUP_1			2
14 #define MASTER_QUP_2			3
15 #define MASTER_TSIF			4
16 #define MASTER_PCIE_2			5
17 #define MASTER_SDCC_4			6
18 #define MASTER_UFS_MEM			7
19 #define MASTER_USB3			8
20 #define MASTER_USB3_1			9
21 #define A1NOC_SNOC_SLV			10
22 #define SLAVE_ANOC_PCIE_GEM_NOC_1	11
23 #define SLAVE_SERVICE_A1NOC		12
24 
25 #define MASTER_A2NOC_CFG		0
26 #define MASTER_QDSS_BAM			1
27 #define MASTER_QUP_0			2
28 #define MASTER_CNOC_A2NOC		3
29 #define MASTER_CRYPTO_CORE_0		4
30 #define MASTER_IPA			5
31 #define MASTER_PCIE			6
32 #define MASTER_PCIE_1			7
33 #define MASTER_QDSS_ETR			8
34 #define MASTER_SDCC_2			9
35 #define MASTER_UFS_CARD			10
36 #define A2NOC_SNOC_SLV			11
37 #define SLAVE_ANOC_PCIE_GEM_NOC		12
38 #define SLAVE_SERVICE_A2NOC		13
39 
40 #define MASTER_NPU			0
41 #define SLAVE_CDSP_MEM_NOC		1
42 
43 #define SNOC_CNOC_MAS			0
44 #define MASTER_QDSS_DAP			1
45 #define SLAVE_A1NOC_CFG			2
46 #define SLAVE_A2NOC_CFG			3
47 #define SLAVE_AHB2PHY_SOUTH		4
48 #define SLAVE_AHB2PHY_NORTH		5
49 #define SLAVE_AOSS			6
50 #define SLAVE_CAMERA_CFG		7
51 #define SLAVE_CLK_CTL			8
52 #define SLAVE_CDSP_CFG			9
53 #define SLAVE_RBCPR_CX_CFG		10
54 #define SLAVE_RBCPR_MMCX_CFG		11
55 #define SLAVE_RBCPR_MX_CFG		12
56 #define SLAVE_CRYPTO_0_CFG		13
57 #define SLAVE_CX_RDPM			14
58 #define SLAVE_DCC_CFG			15
59 #define SLAVE_CNOC_DDRSS		16
60 #define SLAVE_DISPLAY_CFG		17
61 #define SLAVE_GRAPHICS_3D_CFG		18
62 #define SLAVE_IMEM_CFG			19
63 #define SLAVE_IPA_CFG			20
64 #define SLAVE_IPC_ROUTER_CFG		21
65 #define SLAVE_LPASS			22
66 #define SLAVE_CNOC_MNOC_CFG		23
67 #define SLAVE_NPU_CFG			24
68 #define SLAVE_PCIE_0_CFG		25
69 #define SLAVE_PCIE_1_CFG		26
70 #define SLAVE_PCIE_2_CFG		27
71 #define SLAVE_PDM			28
72 #define SLAVE_PIMEM_CFG			29
73 #define SLAVE_PRNG			30
74 #define SLAVE_QDSS_CFG			31
75 #define SLAVE_QSPI_0			32
76 #define SLAVE_QUP_0			33
77 #define SLAVE_QUP_1			34
78 #define SLAVE_QUP_2			35
79 #define SLAVE_SDCC_2			36
80 #define SLAVE_SDCC_4			37
81 #define SLAVE_SNOC_CFG			38
82 #define SLAVE_TCSR			39
83 #define SLAVE_TLMM_NORTH		40
84 #define SLAVE_TLMM_SOUTH		41
85 #define SLAVE_TLMM_WEST			42
86 #define SLAVE_TSIF			43
87 #define SLAVE_UFS_CARD_CFG		44
88 #define SLAVE_UFS_MEM_CFG		45
89 #define SLAVE_USB3			46
90 #define SLAVE_USB3_1			47
91 #define SLAVE_VENUS_CFG			48
92 #define SLAVE_VSENSE_CTRL_CFG		49
93 #define SLAVE_CNOC_A2NOC		50
94 #define SLAVE_SERVICE_CNOC		51
95 
96 #define MASTER_CNOC_DC_NOC		0
97 #define SLAVE_LLCC_CFG			1
98 #define SLAVE_GEM_NOC_CFG		2
99 
100 #define MASTER_GPU_TCU			0
101 #define MASTER_SYS_TCU			1
102 #define MASTER_AMPSS_M0			2
103 #define MASTER_GEM_NOC_CFG		3
104 #define MASTER_COMPUTE_NOC		4
105 #define MASTER_GRAPHICS_3D		5
106 #define MASTER_MNOC_HF_MEM_NOC		6
107 #define MASTER_MNOC_SF_MEM_NOC		7
108 #define MASTER_ANOC_PCIE_GEM_NOC	8
109 #define MASTER_SNOC_GC_MEM_NOC		9
110 #define MASTER_SNOC_SF_MEM_NOC		10
111 #define SLAVE_GEM_NOC_SNOC		11
112 #define SLAVE_LLCC			12
113 #define SLAVE_MEM_NOC_PCIE_SNOC		13
114 #define SLAVE_SERVICE_GEM_NOC_1		14
115 #define SLAVE_SERVICE_GEM_NOC_2		15
116 #define SLAVE_SERVICE_GEM_NOC		16
117 
118 #define MASTER_IPA_CORE			0
119 #define SLAVE_IPA_CORE			1
120 
121 #define MASTER_LLCC			0
122 #define SLAVE_EBI_CH0			1
123 
124 #define MASTER_CNOC_MNOC_CFG		0
125 #define MASTER_CAMNOC_HF		1
126 #define MASTER_CAMNOC_ICP		2
127 #define MASTER_CAMNOC_SF		3
128 #define MASTER_VIDEO_P0			4
129 #define MASTER_VIDEO_P1			5
130 #define MASTER_VIDEO_PROC		6
131 #define MASTER_MDP_PORT0		7
132 #define MASTER_MDP_PORT1		8
133 #define MASTER_ROTATOR			9
134 #define SLAVE_MNOC_HF_MEM_NOC		10
135 #define SLAVE_MNOC_SF_MEM_NOC		11
136 #define SLAVE_SERVICE_MNOC		12
137 
138 #define MASTER_NPU_SYS			0
139 #define MASTER_NPU_CDP			1
140 #define MASTER_NPU_NOC_CFG		2
141 #define SLAVE_NPU_CAL_DP0		3
142 #define SLAVE_NPU_CAL_DP1		4
143 #define SLAVE_NPU_CP			5
144 #define SLAVE_NPU_INT_DMA_BWMON_CFG	6
145 #define SLAVE_NPU_DPM			7
146 #define SLAVE_ISENSE_CFG		8
147 #define SLAVE_NPU_LLM_CFG		9
148 #define SLAVE_NPU_TCM			10
149 #define SLAVE_NPU_COMPUTE_NOC		11
150 #define SLAVE_SERVICE_NPU_NOC		12
151 
152 #define MASTER_SNOC_CFG			0
153 #define A1NOC_SNOC_MAS			1
154 #define A2NOC_SNOC_MAS			2
155 #define MASTER_GEM_NOC_SNOC		3
156 #define MASTER_GEM_NOC_PCIE_SNOC	4
157 #define MASTER_PIMEM			5
158 #define MASTER_GIC			6
159 #define SLAVE_APPSS			7
160 #define SNOC_CNOC_SLV			8
161 #define SLAVE_SNOC_GEM_NOC_GC		9
162 #define SLAVE_SNOC_GEM_NOC_SF		10
163 #define SLAVE_OCIMEM			11
164 #define SLAVE_PIMEM			12
165 #define SLAVE_SERVICE_SNOC		13
166 #define SLAVE_PCIE_0			14
167 #define SLAVE_PCIE_1			15
168 #define SLAVE_PCIE_2			16
169 #define SLAVE_QDSS_STM			17
170 #define SLAVE_TCU			18
171 
172 #endif
173