1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0+ 2*f126890aSEmmanuel Vadot// Copyright (C) 2021 YADRO 3*f126890aSEmmanuel Vadot/dts-v1/; 4*f126890aSEmmanuel Vadot 5*f126890aSEmmanuel Vadot#include "aspeed-bmc-vegman.dtsi" 6*f126890aSEmmanuel Vadot 7*f126890aSEmmanuel Vadot/ { 8*f126890aSEmmanuel Vadot model = "YADRO VEGMAN N110 BMC"; 9*f126890aSEmmanuel Vadot compatible = "yadro,vegman-n110-bmc", "aspeed,ast2500"; 10*f126890aSEmmanuel Vadot}; 11*f126890aSEmmanuel Vadot 12*f126890aSEmmanuel Vadot&gpio { 13*f126890aSEmmanuel Vadot status = "okay"; 14*f126890aSEmmanuel Vadot gpio-line-names = 15*f126890aSEmmanuel Vadot /*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","", 16*f126890aSEmmanuel Vadot /*B0-B7*/ "","","","","","","","", 17*f126890aSEmmanuel Vadot /*C0-C7*/ "","","","","","","","", 18*f126890aSEmmanuel Vadot /*D0-D7*/ "","","","","","","","", 19*f126890aSEmmanuel Vadot /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","", 20*f126890aSEmmanuel Vadot /*F0-F7*/ "NMI_OUT","PCIE_NIC_ALERT","","","SKT0_FAULT_LED","","RST_RGMII_PHYRST_DNP","", 21*f126890aSEmmanuel Vadot /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","","IRQ_NMI_EVENT","","","", 22*f126890aSEmmanuel Vadot /*H0-H7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS", 23*f126890aSEmmanuel Vadot /*I0-I7*/ "","","","","","","","", 24*f126890aSEmmanuel Vadot /*J0-J7*/ "","","","","","","","", 25*f126890aSEmmanuel Vadot /*K0-K7*/ "","","","","","","","", 26*f126890aSEmmanuel Vadot /*L0-L7*/ "","","","","","","","", 27*f126890aSEmmanuel Vadot /*M0-M7*/ "","","","","","","","", 28*f126890aSEmmanuel Vadot /*N0-N7*/ "","","","","","","","", 29*f126890aSEmmanuel Vadot /*O0-O7*/ "","","","","","","","_SPI2_BMC_CS_SEL", 30*f126890aSEmmanuel Vadot /*P0-P7*/ "","","","","","","","", 31*f126890aSEmmanuel Vadot /*Q0-Q7*/ "","","","","","","","", 32*f126890aSEmmanuel Vadot /*R0-R7*/ "_SPI_RMM4_LITE_CS","","","","","","","", 33*f126890aSEmmanuel Vadot /*S0-S7*/ "_SPI2_BMC_CS1","","","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","", 34*f126890aSEmmanuel Vadot /*T0-T7*/ "","","","","","","","", 35*f126890aSEmmanuel Vadot /*U0-U7*/ "","","","","","","","", 36*f126890aSEmmanuel Vadot /*V0-V7*/ "","","","","","","","", 37*f126890aSEmmanuel Vadot /*W0-W7*/ "","","","","","","","", 38*f126890aSEmmanuel Vadot /*X0-X7*/ "","","","","","","","", 39*f126890aSEmmanuel Vadot /*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","", 40*f126890aSEmmanuel Vadot /*Z0-Z7*/ "FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","", 41*f126890aSEmmanuel Vadot /*AA0-AA7*/ "","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE", 42*f126890aSEmmanuel Vadot /*AB0-AB7*/ "FM_CPU_BMCINIT","NMI_BUTTON","ID_BUTTON","PS_PWROK","","","","", 43*f126890aSEmmanuel Vadot /*AC0-AC7*/ "","","","","","","",""; 44*f126890aSEmmanuel Vadot}; 45*f126890aSEmmanuel Vadot 46*f126890aSEmmanuel Vadot&sgpio { 47*f126890aSEmmanuel Vadot ngpios = <80>; 48*f126890aSEmmanuel Vadot bus-frequency = <2000000>; 49*f126890aSEmmanuel Vadot status = "okay"; 50*f126890aSEmmanuel Vadot /* SGPIO lines. even: input, odd: output */ 51*f126890aSEmmanuel Vadot gpio-line-names = 52*f126890aSEmmanuel Vadot /*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","", 53*f126890aSEmmanuel Vadot /*B0-B7*/ "CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","", 54*f126890aSEmmanuel Vadot /*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","", 55*f126890aSEmmanuel Vadot /*D0-D7*/ "","","","","","","","","","","","","","","","", 56*f126890aSEmmanuel Vadot /*E0-E7*/ "","","","","","","","","","","","","","","","", 57*f126890aSEmmanuel Vadot /*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","", 58*f126890aSEmmanuel Vadot /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","", 59*f126890aSEmmanuel Vadot /*H0-H7*/ "","","","","","","","","","","","","","","","", 60*f126890aSEmmanuel Vadot /*I0-I7*/ "","","","","","","","","","","","","","","","", 61*f126890aSEmmanuel Vadot /*J0-J7*/ "","","","","","","","","","","","","","","",""; 62*f126890aSEmmanuel Vadot}; 63*f126890aSEmmanuel Vadot 64*f126890aSEmmanuel Vadot&i2c11 { 65*f126890aSEmmanuel Vadot /* SMB_BMC_MGMT_LVC3 */ 66*f126890aSEmmanuel Vadot gpio@21 { 67*f126890aSEmmanuel Vadot compatible = "nxp,pcal9535"; 68*f126890aSEmmanuel Vadot reg = <0x21>; 69*f126890aSEmmanuel Vadot gpio-controller; 70*f126890aSEmmanuel Vadot #gpio-cells = <2>; 71*f126890aSEmmanuel Vadot gpio-line-names = 72*f126890aSEmmanuel Vadot /*IO0.0-0.7*/ "", "", "", "", "", "", "PE_PCH_SCR_CLKREQ", "", 73*f126890aSEmmanuel Vadot /*IO1.0-1.7*/ "", "PE_PCH_MEZ_PRSNT", "PE_PCH_MEZ_PRSNT_", "NIC_4_PE_PRSNT", "NIC_3_PE_PRSNT", "NIC_2_PE_PRSNT", "NIC_1_PE_PRSNT", ""; 74*f126890aSEmmanuel Vadot }; 75*f126890aSEmmanuel Vadot gpio@27 { 76*f126890aSEmmanuel Vadot compatible = "nxp,pca9698"; 77*f126890aSEmmanuel Vadot reg = <0x27>; 78*f126890aSEmmanuel Vadot gpio-controller; 79*f126890aSEmmanuel Vadot #gpio-cells = <2>; 80*f126890aSEmmanuel Vadot gpio-line-names = 81*f126890aSEmmanuel Vadot /*IO0.0-0.7*/ "PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX", 82*f126890aSEmmanuel Vadot /*IO1.0-1.7*/ "PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0", 83*f126890aSEmmanuel Vadot /*IO2.0-2.7*/ "PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "", "", "", 84*f126890aSEmmanuel Vadot /*IO3.0-3.7*/ "", "", "", "", "", "", "", "", 85*f126890aSEmmanuel Vadot /*IO4.0-4.7*/ "", "", "", "", "", "", "", ""; 86*f126890aSEmmanuel Vadot }; 87*f126890aSEmmanuel Vadot}; 88*f126890aSEmmanuel Vadot 89*f126890aSEmmanuel Vadot&i2c13 { 90*f126890aSEmmanuel Vadot /* SMB_PCIE2_STBY_LVC3 */ 91*f126890aSEmmanuel Vadot mux-expa@73 { 92*f126890aSEmmanuel Vadot compatible = "nxp,pca9545"; 93*f126890aSEmmanuel Vadot reg = <0x73>; 94*f126890aSEmmanuel Vadot #address-cells = <1>; 95*f126890aSEmmanuel Vadot #size-cells = <0>; 96*f126890aSEmmanuel Vadot i2c-mux-idle-disconnect; 97*f126890aSEmmanuel Vadot }; 98*f126890aSEmmanuel Vadot mux-sata@71 { 99*f126890aSEmmanuel Vadot compatible = "nxp,pca9543"; 100*f126890aSEmmanuel Vadot reg = <0x71>; 101*f126890aSEmmanuel Vadot #address-cells = <1>; 102*f126890aSEmmanuel Vadot #size-cells = <0>; 103*f126890aSEmmanuel Vadot i2c-mux-idle-disconnect; 104*f126890aSEmmanuel Vadot }; 105*f126890aSEmmanuel Vadot}; 106*f126890aSEmmanuel Vadot 107*f126890aSEmmanuel Vadot&i2c2 { 108*f126890aSEmmanuel Vadot /* SMB_PCIE_STBY_LVC3 */ 109*f126890aSEmmanuel Vadot mux-expb@71 { 110*f126890aSEmmanuel Vadot compatible = "nxp,pca9545"; 111*f126890aSEmmanuel Vadot reg = <0x71>; 112*f126890aSEmmanuel Vadot #address-cells = <1>; 113*f126890aSEmmanuel Vadot #size-cells = <0>; 114*f126890aSEmmanuel Vadot i2c-mux-idle-disconnect; 115*f126890aSEmmanuel Vadot }; 116*f126890aSEmmanuel Vadot}; 117*f126890aSEmmanuel Vadot 118*f126890aSEmmanuel Vadot&pwm_tacho { 119*f126890aSEmmanuel Vadot status = "okay"; 120*f126890aSEmmanuel Vadot pinctrl-names = "default"; 121*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 122*f126890aSEmmanuel Vadot &pinctrl_pwm2_default &pinctrl_pwm3_default 123*f126890aSEmmanuel Vadot &pinctrl_pwm4_default &pinctrl_pwm5_default>; 124*f126890aSEmmanuel Vadot 125*f126890aSEmmanuel Vadot fan@0 { 126*f126890aSEmmanuel Vadot reg = <0x00>; 127*f126890aSEmmanuel Vadot aspeed,fan-tach-ch = /bits/ 8 <0x00 0x06>; 128*f126890aSEmmanuel Vadot }; 129*f126890aSEmmanuel Vadot fan@1 { 130*f126890aSEmmanuel Vadot reg = <0x01>; 131*f126890aSEmmanuel Vadot aspeed,fan-tach-ch = /bits/ 8 <0x01 0x08>; 132*f126890aSEmmanuel Vadot }; 133*f126890aSEmmanuel Vadot fan@2 { 134*f126890aSEmmanuel Vadot reg = <0x02>; 135*f126890aSEmmanuel Vadot aspeed,fan-tach-ch = /bits/ 8 <0x02 0x09>; 136*f126890aSEmmanuel Vadot }; 137*f126890aSEmmanuel Vadot fan@3 { 138*f126890aSEmmanuel Vadot reg = <0x03>; 139*f126890aSEmmanuel Vadot aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0A>; 140*f126890aSEmmanuel Vadot }; 141*f126890aSEmmanuel Vadot fan@4 { 142*f126890aSEmmanuel Vadot reg = <0x04>; 143*f126890aSEmmanuel Vadot aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0B>; 144*f126890aSEmmanuel Vadot }; 145*f126890aSEmmanuel Vadot fan@5 { 146*f126890aSEmmanuel Vadot reg = <0x05>; 147*f126890aSEmmanuel Vadot aspeed,fan-tach-ch = /bits/ 8 <0x05>; 148*f126890aSEmmanuel Vadot }; 149*f126890aSEmmanuel Vadot}; 150