1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC 4*f126890aSEmmanuel Vadot * applies to AT91SAM9G45, AT91SAM9M10, 5*f126890aSEmmanuel Vadot * AT91SAM9G46, AT91SAM9M11 SoC 6*f126890aSEmmanuel Vadot * 7*f126890aSEmmanuel Vadot * Copyright (C) 2011 Atmel, 8*f126890aSEmmanuel Vadot * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> 9*f126890aSEmmanuel Vadot */ 10*f126890aSEmmanuel Vadot 11*f126890aSEmmanuel Vadot#include <dt-bindings/dma/at91.h> 12*f126890aSEmmanuel Vadot#include <dt-bindings/pinctrl/at91.h> 13*f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 14*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 15*f126890aSEmmanuel Vadot#include <dt-bindings/clock/at91.h> 16*f126890aSEmmanuel Vadot#include <dt-bindings/mfd/at91-usart.h> 17*f126890aSEmmanuel Vadot 18*f126890aSEmmanuel Vadot/ { 19*f126890aSEmmanuel Vadot #address-cells = <1>; 20*f126890aSEmmanuel Vadot #size-cells = <1>; 21*f126890aSEmmanuel Vadot model = "Atmel AT91SAM9G45 family SoC"; 22*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45"; 23*f126890aSEmmanuel Vadot interrupt-parent = <&aic>; 24*f126890aSEmmanuel Vadot 25*f126890aSEmmanuel Vadot aliases { 26*f126890aSEmmanuel Vadot serial0 = &dbgu; 27*f126890aSEmmanuel Vadot serial1 = &usart0; 28*f126890aSEmmanuel Vadot serial2 = &usart1; 29*f126890aSEmmanuel Vadot serial3 = &usart2; 30*f126890aSEmmanuel Vadot serial4 = &usart3; 31*f126890aSEmmanuel Vadot gpio0 = &pioA; 32*f126890aSEmmanuel Vadot gpio1 = &pioB; 33*f126890aSEmmanuel Vadot gpio2 = &pioC; 34*f126890aSEmmanuel Vadot gpio3 = &pioD; 35*f126890aSEmmanuel Vadot gpio4 = &pioE; 36*f126890aSEmmanuel Vadot tcb0 = &tcb0; 37*f126890aSEmmanuel Vadot tcb1 = &tcb1; 38*f126890aSEmmanuel Vadot i2c0 = &i2c0; 39*f126890aSEmmanuel Vadot i2c1 = &i2c1; 40*f126890aSEmmanuel Vadot ssc0 = &ssc0; 41*f126890aSEmmanuel Vadot ssc1 = &ssc1; 42*f126890aSEmmanuel Vadot pwm0 = &pwm0; 43*f126890aSEmmanuel Vadot }; 44*f126890aSEmmanuel Vadot cpus { 45*f126890aSEmmanuel Vadot #address-cells = <1>; 46*f126890aSEmmanuel Vadot #size-cells = <0>; 47*f126890aSEmmanuel Vadot 48*f126890aSEmmanuel Vadot cpu@0 { 49*f126890aSEmmanuel Vadot compatible = "arm,arm926ej-s"; 50*f126890aSEmmanuel Vadot device_type = "cpu"; 51*f126890aSEmmanuel Vadot reg = <0>; 52*f126890aSEmmanuel Vadot }; 53*f126890aSEmmanuel Vadot }; 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot memory@70000000 { 56*f126890aSEmmanuel Vadot device_type = "memory"; 57*f126890aSEmmanuel Vadot reg = <0x70000000 0x10000000>; 58*f126890aSEmmanuel Vadot }; 59*f126890aSEmmanuel Vadot 60*f126890aSEmmanuel Vadot clocks { 61*f126890aSEmmanuel Vadot slow_xtal: slow_xtal { 62*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 63*f126890aSEmmanuel Vadot #clock-cells = <0>; 64*f126890aSEmmanuel Vadot clock-frequency = <0>; 65*f126890aSEmmanuel Vadot }; 66*f126890aSEmmanuel Vadot 67*f126890aSEmmanuel Vadot main_xtal: main_xtal { 68*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 69*f126890aSEmmanuel Vadot #clock-cells = <0>; 70*f126890aSEmmanuel Vadot clock-frequency = <0>; 71*f126890aSEmmanuel Vadot }; 72*f126890aSEmmanuel Vadot 73*f126890aSEmmanuel Vadot adc_op_clk: adc_op_clk { 74*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 75*f126890aSEmmanuel Vadot #clock-cells = <0>; 76*f126890aSEmmanuel Vadot clock-frequency = <300000>; 77*f126890aSEmmanuel Vadot }; 78*f126890aSEmmanuel Vadot }; 79*f126890aSEmmanuel Vadot 80*f126890aSEmmanuel Vadot sram: sram@300000 { 81*f126890aSEmmanuel Vadot compatible = "mmio-sram"; 82*f126890aSEmmanuel Vadot reg = <0x00300000 0x10000>; 83*f126890aSEmmanuel Vadot #address-cells = <1>; 84*f126890aSEmmanuel Vadot #size-cells = <1>; 85*f126890aSEmmanuel Vadot ranges = <0 0x00300000 0x10000>; 86*f126890aSEmmanuel Vadot }; 87*f126890aSEmmanuel Vadot 88*f126890aSEmmanuel Vadot ahb { 89*f126890aSEmmanuel Vadot compatible = "simple-bus"; 90*f126890aSEmmanuel Vadot #address-cells = <1>; 91*f126890aSEmmanuel Vadot #size-cells = <1>; 92*f126890aSEmmanuel Vadot ranges; 93*f126890aSEmmanuel Vadot 94*f126890aSEmmanuel Vadot apb { 95*f126890aSEmmanuel Vadot compatible = "simple-bus"; 96*f126890aSEmmanuel Vadot #address-cells = <1>; 97*f126890aSEmmanuel Vadot #size-cells = <1>; 98*f126890aSEmmanuel Vadot ranges; 99*f126890aSEmmanuel Vadot 100*f126890aSEmmanuel Vadot aic: interrupt-controller@fffff000 { 101*f126890aSEmmanuel Vadot #interrupt-cells = <3>; 102*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-aic"; 103*f126890aSEmmanuel Vadot interrupt-controller; 104*f126890aSEmmanuel Vadot reg = <0xfffff000 0x200>; 105*f126890aSEmmanuel Vadot atmel,external-irqs = <31>; 106*f126890aSEmmanuel Vadot }; 107*f126890aSEmmanuel Vadot 108*f126890aSEmmanuel Vadot ramc0: ramc@ffffe400 { 109*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-ddramc"; 110*f126890aSEmmanuel Vadot reg = <0xffffe400 0x200>; 111*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_SYSTEM 2>; 112*f126890aSEmmanuel Vadot clock-names = "ddrck"; 113*f126890aSEmmanuel Vadot }; 114*f126890aSEmmanuel Vadot 115*f126890aSEmmanuel Vadot ramc1: ramc@ffffe600 { 116*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-ddramc"; 117*f126890aSEmmanuel Vadot reg = <0xffffe600 0x200>; 118*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_SYSTEM 2>; 119*f126890aSEmmanuel Vadot clock-names = "ddrck"; 120*f126890aSEmmanuel Vadot }; 121*f126890aSEmmanuel Vadot 122*f126890aSEmmanuel Vadot smc: smc@ffffe800 { 123*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-smc", "syscon"; 124*f126890aSEmmanuel Vadot reg = <0xffffe800 0x200>; 125*f126890aSEmmanuel Vadot }; 126*f126890aSEmmanuel Vadot 127*f126890aSEmmanuel Vadot matrix: matrix@ffffea00 { 128*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-matrix", "syscon"; 129*f126890aSEmmanuel Vadot reg = <0xffffea00 0x200>; 130*f126890aSEmmanuel Vadot }; 131*f126890aSEmmanuel Vadot 132*f126890aSEmmanuel Vadot pmc: clock-controller@fffffc00 { 133*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-pmc", "syscon"; 134*f126890aSEmmanuel Vadot reg = <0xfffffc00 0x100>; 135*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 136*f126890aSEmmanuel Vadot #clock-cells = <2>; 137*f126890aSEmmanuel Vadot clocks = <&clk32k>, <&main_xtal>; 138*f126890aSEmmanuel Vadot clock-names = "slow_clk", "main_xtal"; 139*f126890aSEmmanuel Vadot }; 140*f126890aSEmmanuel Vadot 141*f126890aSEmmanuel Vadot reset-controller@fffffd00 { 142*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-rstc"; 143*f126890aSEmmanuel Vadot reg = <0xfffffd00 0x10>; 144*f126890aSEmmanuel Vadot clocks = <&clk32k>; 145*f126890aSEmmanuel Vadot }; 146*f126890aSEmmanuel Vadot 147*f126890aSEmmanuel Vadot pit: timer@fffffd30 { 148*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-pit"; 149*f126890aSEmmanuel Vadot reg = <0xfffffd30 0xf>; 150*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 151*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 152*f126890aSEmmanuel Vadot }; 153*f126890aSEmmanuel Vadot 154*f126890aSEmmanuel Vadot 155*f126890aSEmmanuel Vadot poweroff@fffffd10 { 156*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-shdwc"; 157*f126890aSEmmanuel Vadot reg = <0xfffffd10 0x10>; 158*f126890aSEmmanuel Vadot clocks = <&clk32k>; 159*f126890aSEmmanuel Vadot }; 160*f126890aSEmmanuel Vadot 161*f126890aSEmmanuel Vadot tcb0: timer@fff7c000 { 162*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 163*f126890aSEmmanuel Vadot #address-cells = <1>; 164*f126890aSEmmanuel Vadot #size-cells = <0>; 165*f126890aSEmmanuel Vadot reg = <0xfff7c000 0x100>; 166*f126890aSEmmanuel Vadot interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; 167*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 168*f126890aSEmmanuel Vadot clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 169*f126890aSEmmanuel Vadot }; 170*f126890aSEmmanuel Vadot 171*f126890aSEmmanuel Vadot tcb1: timer@fffd4000 { 172*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 173*f126890aSEmmanuel Vadot #address-cells = <1>; 174*f126890aSEmmanuel Vadot #size-cells = <0>; 175*f126890aSEmmanuel Vadot reg = <0xfffd4000 0x100>; 176*f126890aSEmmanuel Vadot interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; 177*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 178*f126890aSEmmanuel Vadot clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 179*f126890aSEmmanuel Vadot }; 180*f126890aSEmmanuel Vadot 181*f126890aSEmmanuel Vadot dma: dma-controller@ffffec00 { 182*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-dma"; 183*f126890aSEmmanuel Vadot reg = <0xffffec00 0x200>; 184*f126890aSEmmanuel Vadot interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 185*f126890aSEmmanuel Vadot #dma-cells = <2>; 186*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 187*f126890aSEmmanuel Vadot clock-names = "dma_clk"; 188*f126890aSEmmanuel Vadot }; 189*f126890aSEmmanuel Vadot 190*f126890aSEmmanuel Vadot pinctrl@fffff200 { 191*f126890aSEmmanuel Vadot #address-cells = <1>; 192*f126890aSEmmanuel Vadot #size-cells = <1>; 193*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 194*f126890aSEmmanuel Vadot ranges = <0xfffff200 0xfffff200 0xa00>; 195*f126890aSEmmanuel Vadot 196*f126890aSEmmanuel Vadot atmel,mux-mask = < 197*f126890aSEmmanuel Vadot /* A B */ 198*f126890aSEmmanuel Vadot 0xffffffff 0xffc003ff /* pioA */ 199*f126890aSEmmanuel Vadot 0xffffffff 0x800f8f00 /* pioB */ 200*f126890aSEmmanuel Vadot 0xffffffff 0x00000e00 /* pioC */ 201*f126890aSEmmanuel Vadot 0xffffffff 0xff0c1381 /* pioD */ 202*f126890aSEmmanuel Vadot 0xffffffff 0x81ffff81 /* pioE */ 203*f126890aSEmmanuel Vadot >; 204*f126890aSEmmanuel Vadot 205*f126890aSEmmanuel Vadot /* shared pinctrl settings */ 206*f126890aSEmmanuel Vadot ac97 { 207*f126890aSEmmanuel Vadot pinctrl_ac97: ac97-0 { 208*f126890aSEmmanuel Vadot atmel,pins = 209*f126890aSEmmanuel Vadot <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97RX */ 210*f126890aSEmmanuel Vadot AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97TX */ 211*f126890aSEmmanuel Vadot AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97FS */ 212*f126890aSEmmanuel Vadot AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* AC97CK */ 213*f126890aSEmmanuel Vadot }; 214*f126890aSEmmanuel Vadot }; 215*f126890aSEmmanuel Vadot 216*f126890aSEmmanuel Vadot adc0 { 217*f126890aSEmmanuel Vadot pinctrl_adc0_adtrg: adc0_adtrg { 218*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 219*f126890aSEmmanuel Vadot }; 220*f126890aSEmmanuel Vadot pinctrl_adc0_ad0: adc0_ad0 { 221*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 222*f126890aSEmmanuel Vadot }; 223*f126890aSEmmanuel Vadot pinctrl_adc0_ad1: adc0_ad1 { 224*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 225*f126890aSEmmanuel Vadot }; 226*f126890aSEmmanuel Vadot pinctrl_adc0_ad2: adc0_ad2 { 227*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 228*f126890aSEmmanuel Vadot }; 229*f126890aSEmmanuel Vadot pinctrl_adc0_ad3: adc0_ad3 { 230*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 231*f126890aSEmmanuel Vadot }; 232*f126890aSEmmanuel Vadot pinctrl_adc0_ad4: adc0_ad4 { 233*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 234*f126890aSEmmanuel Vadot }; 235*f126890aSEmmanuel Vadot pinctrl_adc0_ad5: adc0_ad5 { 236*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 237*f126890aSEmmanuel Vadot }; 238*f126890aSEmmanuel Vadot pinctrl_adc0_ad6: adc0_ad6 { 239*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 240*f126890aSEmmanuel Vadot }; 241*f126890aSEmmanuel Vadot pinctrl_adc0_ad7: adc0_ad7 { 242*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 243*f126890aSEmmanuel Vadot }; 244*f126890aSEmmanuel Vadot }; 245*f126890aSEmmanuel Vadot 246*f126890aSEmmanuel Vadot dbgu { 247*f126890aSEmmanuel Vadot pinctrl_dbgu: dbgu-0 { 248*f126890aSEmmanuel Vadot atmel,pins = 249*f126890aSEmmanuel Vadot <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 250*f126890aSEmmanuel Vadot AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; 251*f126890aSEmmanuel Vadot }; 252*f126890aSEmmanuel Vadot }; 253*f126890aSEmmanuel Vadot 254*f126890aSEmmanuel Vadot i2c0 { 255*f126890aSEmmanuel Vadot pinctrl_i2c0: i2c0-0 { 256*f126890aSEmmanuel Vadot atmel,pins = 257*f126890aSEmmanuel Vadot <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */ 258*f126890aSEmmanuel Vadot AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */ 259*f126890aSEmmanuel Vadot }; 260*f126890aSEmmanuel Vadot }; 261*f126890aSEmmanuel Vadot 262*f126890aSEmmanuel Vadot i2c1 { 263*f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1-0 { 264*f126890aSEmmanuel Vadot atmel,pins = 265*f126890aSEmmanuel Vadot <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */ 266*f126890aSEmmanuel Vadot AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */ 267*f126890aSEmmanuel Vadot }; 268*f126890aSEmmanuel Vadot }; 269*f126890aSEmmanuel Vadot 270*f126890aSEmmanuel Vadot isi { 271*f126890aSEmmanuel Vadot pinctrl_isi_data_0_7: isi-0-data-0-7 { 272*f126890aSEmmanuel Vadot atmel,pins = 273*f126890aSEmmanuel Vadot <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */ 274*f126890aSEmmanuel Vadot AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */ 275*f126890aSEmmanuel Vadot AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */ 276*f126890aSEmmanuel Vadot AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */ 277*f126890aSEmmanuel Vadot AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */ 278*f126890aSEmmanuel Vadot AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */ 279*f126890aSEmmanuel Vadot AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */ 280*f126890aSEmmanuel Vadot AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */ 281*f126890aSEmmanuel Vadot AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */ 282*f126890aSEmmanuel Vadot AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */ 283*f126890aSEmmanuel Vadot AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */ 284*f126890aSEmmanuel Vadot }; 285*f126890aSEmmanuel Vadot 286*f126890aSEmmanuel Vadot pinctrl_isi_data_8_9: isi-0-data-8-9 { 287*f126890aSEmmanuel Vadot atmel,pins = 288*f126890aSEmmanuel Vadot <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */ 289*f126890aSEmmanuel Vadot AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */ 290*f126890aSEmmanuel Vadot }; 291*f126890aSEmmanuel Vadot 292*f126890aSEmmanuel Vadot pinctrl_isi_data_10_11: isi-0-data-10-11 { 293*f126890aSEmmanuel Vadot atmel,pins = 294*f126890aSEmmanuel Vadot <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */ 295*f126890aSEmmanuel Vadot AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */ 296*f126890aSEmmanuel Vadot }; 297*f126890aSEmmanuel Vadot }; 298*f126890aSEmmanuel Vadot 299*f126890aSEmmanuel Vadot usart0 { 300*f126890aSEmmanuel Vadot pinctrl_usart0: usart0-0 { 301*f126890aSEmmanuel Vadot atmel,pins = 302*f126890aSEmmanuel Vadot <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 303*f126890aSEmmanuel Vadot AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 304*f126890aSEmmanuel Vadot }; 305*f126890aSEmmanuel Vadot 306*f126890aSEmmanuel Vadot pinctrl_usart0_rts: usart0_rts-0 { 307*f126890aSEmmanuel Vadot atmel,pins = 308*f126890aSEmmanuel Vadot <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */ 309*f126890aSEmmanuel Vadot }; 310*f126890aSEmmanuel Vadot 311*f126890aSEmmanuel Vadot pinctrl_usart0_cts: usart0_cts-0 { 312*f126890aSEmmanuel Vadot atmel,pins = 313*f126890aSEmmanuel Vadot <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */ 314*f126890aSEmmanuel Vadot }; 315*f126890aSEmmanuel Vadot }; 316*f126890aSEmmanuel Vadot 317*f126890aSEmmanuel Vadot usart1 { 318*f126890aSEmmanuel Vadot pinctrl_usart1: usart1-0 { 319*f126890aSEmmanuel Vadot atmel,pins = 320*f126890aSEmmanuel Vadot <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 321*f126890aSEmmanuel Vadot AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 322*f126890aSEmmanuel Vadot }; 323*f126890aSEmmanuel Vadot 324*f126890aSEmmanuel Vadot pinctrl_usart1_rts: usart1_rts-0 { 325*f126890aSEmmanuel Vadot atmel,pins = 326*f126890aSEmmanuel Vadot <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */ 327*f126890aSEmmanuel Vadot }; 328*f126890aSEmmanuel Vadot 329*f126890aSEmmanuel Vadot pinctrl_usart1_cts: usart1_cts-0 { 330*f126890aSEmmanuel Vadot atmel,pins = 331*f126890aSEmmanuel Vadot <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */ 332*f126890aSEmmanuel Vadot }; 333*f126890aSEmmanuel Vadot }; 334*f126890aSEmmanuel Vadot 335*f126890aSEmmanuel Vadot usart2 { 336*f126890aSEmmanuel Vadot pinctrl_usart2: usart2-0 { 337*f126890aSEmmanuel Vadot atmel,pins = 338*f126890aSEmmanuel Vadot <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 339*f126890aSEmmanuel Vadot AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 340*f126890aSEmmanuel Vadot }; 341*f126890aSEmmanuel Vadot 342*f126890aSEmmanuel Vadot pinctrl_usart2_rts: usart2_rts-0 { 343*f126890aSEmmanuel Vadot atmel,pins = 344*f126890aSEmmanuel Vadot <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */ 345*f126890aSEmmanuel Vadot }; 346*f126890aSEmmanuel Vadot 347*f126890aSEmmanuel Vadot pinctrl_usart2_cts: usart2_cts-0 { 348*f126890aSEmmanuel Vadot atmel,pins = 349*f126890aSEmmanuel Vadot <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */ 350*f126890aSEmmanuel Vadot }; 351*f126890aSEmmanuel Vadot }; 352*f126890aSEmmanuel Vadot 353*f126890aSEmmanuel Vadot usart3 { 354*f126890aSEmmanuel Vadot pinctrl_usart3: usart3-0 { 355*f126890aSEmmanuel Vadot atmel,pins = 356*f126890aSEmmanuel Vadot <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 357*f126890aSEmmanuel Vadot AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 358*f126890aSEmmanuel Vadot }; 359*f126890aSEmmanuel Vadot 360*f126890aSEmmanuel Vadot pinctrl_usart3_rts: usart3_rts-0 { 361*f126890aSEmmanuel Vadot atmel,pins = 362*f126890aSEmmanuel Vadot <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */ 363*f126890aSEmmanuel Vadot }; 364*f126890aSEmmanuel Vadot 365*f126890aSEmmanuel Vadot pinctrl_usart3_cts: usart3_cts-0 { 366*f126890aSEmmanuel Vadot atmel,pins = 367*f126890aSEmmanuel Vadot <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */ 368*f126890aSEmmanuel Vadot }; 369*f126890aSEmmanuel Vadot }; 370*f126890aSEmmanuel Vadot 371*f126890aSEmmanuel Vadot nand { 372*f126890aSEmmanuel Vadot pinctrl_nand_rb: nand-rb-0 { 373*f126890aSEmmanuel Vadot atmel,pins = 374*f126890aSEmmanuel Vadot <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 375*f126890aSEmmanuel Vadot }; 376*f126890aSEmmanuel Vadot 377*f126890aSEmmanuel Vadot pinctrl_nand_cs: nand-cs-0 { 378*f126890aSEmmanuel Vadot atmel,pins = 379*f126890aSEmmanuel Vadot <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 380*f126890aSEmmanuel Vadot }; 381*f126890aSEmmanuel Vadot }; 382*f126890aSEmmanuel Vadot 383*f126890aSEmmanuel Vadot macb { 384*f126890aSEmmanuel Vadot pinctrl_macb_rmii: macb_rmii-0 { 385*f126890aSEmmanuel Vadot atmel,pins = 386*f126890aSEmmanuel Vadot <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */ 387*f126890aSEmmanuel Vadot AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */ 388*f126890aSEmmanuel Vadot AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ 389*f126890aSEmmanuel Vadot AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ 390*f126890aSEmmanuel Vadot AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ 391*f126890aSEmmanuel Vadot AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ 392*f126890aSEmmanuel Vadot AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ 393*f126890aSEmmanuel Vadot AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ 394*f126890aSEmmanuel Vadot AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ 395*f126890aSEmmanuel Vadot AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */ 396*f126890aSEmmanuel Vadot }; 397*f126890aSEmmanuel Vadot 398*f126890aSEmmanuel Vadot pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 399*f126890aSEmmanuel Vadot atmel,pins = 400*f126890aSEmmanuel Vadot <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */ 401*f126890aSEmmanuel Vadot AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */ 402*f126890aSEmmanuel Vadot AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */ 403*f126890aSEmmanuel Vadot AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */ 404*f126890aSEmmanuel Vadot AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ 405*f126890aSEmmanuel Vadot AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ 406*f126890aSEmmanuel Vadot AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */ 407*f126890aSEmmanuel Vadot AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ 408*f126890aSEmmanuel Vadot }; 409*f126890aSEmmanuel Vadot }; 410*f126890aSEmmanuel Vadot 411*f126890aSEmmanuel Vadot mmc0 { 412*f126890aSEmmanuel Vadot pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 413*f126890aSEmmanuel Vadot atmel,pins = 414*f126890aSEmmanuel Vadot <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */ 415*f126890aSEmmanuel Vadot AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 416*f126890aSEmmanuel Vadot AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */ 417*f126890aSEmmanuel Vadot }; 418*f126890aSEmmanuel Vadot 419*f126890aSEmmanuel Vadot pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 420*f126890aSEmmanuel Vadot atmel,pins = 421*f126890aSEmmanuel Vadot <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ 422*f126890aSEmmanuel Vadot AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ 423*f126890aSEmmanuel Vadot AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ 424*f126890aSEmmanuel Vadot }; 425*f126890aSEmmanuel Vadot 426*f126890aSEmmanuel Vadot pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { 427*f126890aSEmmanuel Vadot atmel,pins = 428*f126890aSEmmanuel Vadot <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ 429*f126890aSEmmanuel Vadot AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ 430*f126890aSEmmanuel Vadot AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ 431*f126890aSEmmanuel Vadot AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */ 432*f126890aSEmmanuel Vadot }; 433*f126890aSEmmanuel Vadot }; 434*f126890aSEmmanuel Vadot 435*f126890aSEmmanuel Vadot mmc1 { 436*f126890aSEmmanuel Vadot pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { 437*f126890aSEmmanuel Vadot atmel,pins = 438*f126890aSEmmanuel Vadot <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */ 439*f126890aSEmmanuel Vadot AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */ 440*f126890aSEmmanuel Vadot AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */ 441*f126890aSEmmanuel Vadot }; 442*f126890aSEmmanuel Vadot 443*f126890aSEmmanuel Vadot pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 444*f126890aSEmmanuel Vadot atmel,pins = 445*f126890aSEmmanuel Vadot <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ 446*f126890aSEmmanuel Vadot AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */ 447*f126890aSEmmanuel Vadot AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */ 448*f126890aSEmmanuel Vadot }; 449*f126890aSEmmanuel Vadot 450*f126890aSEmmanuel Vadot pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 { 451*f126890aSEmmanuel Vadot atmel,pins = 452*f126890aSEmmanuel Vadot <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */ 453*f126890aSEmmanuel Vadot AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */ 454*f126890aSEmmanuel Vadot AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */ 455*f126890aSEmmanuel Vadot AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */ 456*f126890aSEmmanuel Vadot }; 457*f126890aSEmmanuel Vadot }; 458*f126890aSEmmanuel Vadot 459*f126890aSEmmanuel Vadot ssc0 { 460*f126890aSEmmanuel Vadot pinctrl_ssc0_tx: ssc0_tx-0 { 461*f126890aSEmmanuel Vadot atmel,pins = 462*f126890aSEmmanuel Vadot <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */ 463*f126890aSEmmanuel Vadot AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */ 464*f126890aSEmmanuel Vadot AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */ 465*f126890aSEmmanuel Vadot }; 466*f126890aSEmmanuel Vadot 467*f126890aSEmmanuel Vadot pinctrl_ssc0_rx: ssc0_rx-0 { 468*f126890aSEmmanuel Vadot atmel,pins = 469*f126890aSEmmanuel Vadot <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */ 470*f126890aSEmmanuel Vadot AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */ 471*f126890aSEmmanuel Vadot AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */ 472*f126890aSEmmanuel Vadot }; 473*f126890aSEmmanuel Vadot }; 474*f126890aSEmmanuel Vadot 475*f126890aSEmmanuel Vadot ssc1 { 476*f126890aSEmmanuel Vadot pinctrl_ssc1_tx: ssc1_tx-0 { 477*f126890aSEmmanuel Vadot atmel,pins = 478*f126890aSEmmanuel Vadot <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */ 479*f126890aSEmmanuel Vadot AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */ 480*f126890aSEmmanuel Vadot AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */ 481*f126890aSEmmanuel Vadot }; 482*f126890aSEmmanuel Vadot 483*f126890aSEmmanuel Vadot pinctrl_ssc1_rx: ssc1_rx-0 { 484*f126890aSEmmanuel Vadot atmel,pins = 485*f126890aSEmmanuel Vadot <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */ 486*f126890aSEmmanuel Vadot AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */ 487*f126890aSEmmanuel Vadot AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */ 488*f126890aSEmmanuel Vadot }; 489*f126890aSEmmanuel Vadot }; 490*f126890aSEmmanuel Vadot 491*f126890aSEmmanuel Vadot spi0 { 492*f126890aSEmmanuel Vadot pinctrl_spi0: spi0-0 { 493*f126890aSEmmanuel Vadot atmel,pins = 494*f126890aSEmmanuel Vadot <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */ 495*f126890aSEmmanuel Vadot AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */ 496*f126890aSEmmanuel Vadot AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */ 497*f126890aSEmmanuel Vadot }; 498*f126890aSEmmanuel Vadot }; 499*f126890aSEmmanuel Vadot 500*f126890aSEmmanuel Vadot spi1 { 501*f126890aSEmmanuel Vadot pinctrl_spi1: spi1-0 { 502*f126890aSEmmanuel Vadot atmel,pins = 503*f126890aSEmmanuel Vadot <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */ 504*f126890aSEmmanuel Vadot AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */ 505*f126890aSEmmanuel Vadot AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */ 506*f126890aSEmmanuel Vadot }; 507*f126890aSEmmanuel Vadot }; 508*f126890aSEmmanuel Vadot 509*f126890aSEmmanuel Vadot tcb0 { 510*f126890aSEmmanuel Vadot pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 511*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 512*f126890aSEmmanuel Vadot }; 513*f126890aSEmmanuel Vadot 514*f126890aSEmmanuel Vadot pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 515*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 516*f126890aSEmmanuel Vadot }; 517*f126890aSEmmanuel Vadot 518*f126890aSEmmanuel Vadot pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 519*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; 520*f126890aSEmmanuel Vadot }; 521*f126890aSEmmanuel Vadot 522*f126890aSEmmanuel Vadot pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 523*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 524*f126890aSEmmanuel Vadot }; 525*f126890aSEmmanuel Vadot 526*f126890aSEmmanuel Vadot pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 527*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; 528*f126890aSEmmanuel Vadot }; 529*f126890aSEmmanuel Vadot 530*f126890aSEmmanuel Vadot pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 531*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 532*f126890aSEmmanuel Vadot }; 533*f126890aSEmmanuel Vadot 534*f126890aSEmmanuel Vadot pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 535*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 536*f126890aSEmmanuel Vadot }; 537*f126890aSEmmanuel Vadot 538*f126890aSEmmanuel Vadot pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 539*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 540*f126890aSEmmanuel Vadot }; 541*f126890aSEmmanuel Vadot 542*f126890aSEmmanuel Vadot pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 543*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; 544*f126890aSEmmanuel Vadot }; 545*f126890aSEmmanuel Vadot }; 546*f126890aSEmmanuel Vadot 547*f126890aSEmmanuel Vadot tcb1 { 548*f126890aSEmmanuel Vadot pinctrl_tcb1_tclk0: tcb1_tclk0-0 { 549*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; 550*f126890aSEmmanuel Vadot }; 551*f126890aSEmmanuel Vadot 552*f126890aSEmmanuel Vadot pinctrl_tcb1_tclk1: tcb1_tclk1-0 { 553*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 554*f126890aSEmmanuel Vadot }; 555*f126890aSEmmanuel Vadot 556*f126890aSEmmanuel Vadot pinctrl_tcb1_tclk2: tcb1_tclk2-0 { 557*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 558*f126890aSEmmanuel Vadot }; 559*f126890aSEmmanuel Vadot 560*f126890aSEmmanuel Vadot pinctrl_tcb1_tioa0: tcb1_tioa0-0 { 561*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; 562*f126890aSEmmanuel Vadot }; 563*f126890aSEmmanuel Vadot 564*f126890aSEmmanuel Vadot pinctrl_tcb1_tioa1: tcb1_tioa1-0 { 565*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 566*f126890aSEmmanuel Vadot }; 567*f126890aSEmmanuel Vadot 568*f126890aSEmmanuel Vadot pinctrl_tcb1_tioa2: tcb1_tioa2-0 { 569*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; 570*f126890aSEmmanuel Vadot }; 571*f126890aSEmmanuel Vadot 572*f126890aSEmmanuel Vadot pinctrl_tcb1_tiob0: tcb1_tiob0-0 { 573*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 574*f126890aSEmmanuel Vadot }; 575*f126890aSEmmanuel Vadot 576*f126890aSEmmanuel Vadot pinctrl_tcb1_tiob1: tcb1_tiob1-0 { 577*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 578*f126890aSEmmanuel Vadot }; 579*f126890aSEmmanuel Vadot 580*f126890aSEmmanuel Vadot pinctrl_tcb1_tiob2: tcb1_tiob2-0 { 581*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 582*f126890aSEmmanuel Vadot }; 583*f126890aSEmmanuel Vadot }; 584*f126890aSEmmanuel Vadot 585*f126890aSEmmanuel Vadot fb { 586*f126890aSEmmanuel Vadot pinctrl_fb: fb-0 { 587*f126890aSEmmanuel Vadot atmel,pins = 588*f126890aSEmmanuel Vadot <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */ 589*f126890aSEmmanuel Vadot AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */ 590*f126890aSEmmanuel Vadot AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */ 591*f126890aSEmmanuel Vadot AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */ 592*f126890aSEmmanuel Vadot AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */ 593*f126890aSEmmanuel Vadot AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */ 594*f126890aSEmmanuel Vadot AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */ 595*f126890aSEmmanuel Vadot AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */ 596*f126890aSEmmanuel Vadot AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */ 597*f126890aSEmmanuel Vadot AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */ 598*f126890aSEmmanuel Vadot AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */ 599*f126890aSEmmanuel Vadot AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */ 600*f126890aSEmmanuel Vadot AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */ 601*f126890aSEmmanuel Vadot AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */ 602*f126890aSEmmanuel Vadot AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */ 603*f126890aSEmmanuel Vadot AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */ 604*f126890aSEmmanuel Vadot AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */ 605*f126890aSEmmanuel Vadot AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */ 606*f126890aSEmmanuel Vadot AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */ 607*f126890aSEmmanuel Vadot AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */ 608*f126890aSEmmanuel Vadot AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ 609*f126890aSEmmanuel Vadot AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */ 610*f126890aSEmmanuel Vadot AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ 611*f126890aSEmmanuel Vadot AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ 612*f126890aSEmmanuel Vadot AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ 613*f126890aSEmmanuel Vadot AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ 614*f126890aSEmmanuel Vadot AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ 615*f126890aSEmmanuel Vadot AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ 616*f126890aSEmmanuel Vadot AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ 617*f126890aSEmmanuel Vadot AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ 618*f126890aSEmmanuel Vadot }; 619*f126890aSEmmanuel Vadot }; 620*f126890aSEmmanuel Vadot 621*f126890aSEmmanuel Vadot pioA: gpio@fffff200 { 622*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-gpio"; 623*f126890aSEmmanuel Vadot reg = <0xfffff200 0x200>; 624*f126890aSEmmanuel Vadot interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 625*f126890aSEmmanuel Vadot #gpio-cells = <2>; 626*f126890aSEmmanuel Vadot gpio-controller; 627*f126890aSEmmanuel Vadot interrupt-controller; 628*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 629*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 630*f126890aSEmmanuel Vadot }; 631*f126890aSEmmanuel Vadot 632*f126890aSEmmanuel Vadot pioB: gpio@fffff400 { 633*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-gpio"; 634*f126890aSEmmanuel Vadot reg = <0xfffff400 0x200>; 635*f126890aSEmmanuel Vadot interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 636*f126890aSEmmanuel Vadot #gpio-cells = <2>; 637*f126890aSEmmanuel Vadot gpio-controller; 638*f126890aSEmmanuel Vadot interrupt-controller; 639*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 640*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 641*f126890aSEmmanuel Vadot }; 642*f126890aSEmmanuel Vadot 643*f126890aSEmmanuel Vadot pioC: gpio@fffff600 { 644*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-gpio"; 645*f126890aSEmmanuel Vadot reg = <0xfffff600 0x200>; 646*f126890aSEmmanuel Vadot interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 647*f126890aSEmmanuel Vadot #gpio-cells = <2>; 648*f126890aSEmmanuel Vadot gpio-controller; 649*f126890aSEmmanuel Vadot interrupt-controller; 650*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 651*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 652*f126890aSEmmanuel Vadot }; 653*f126890aSEmmanuel Vadot 654*f126890aSEmmanuel Vadot pioD: gpio@fffff800 { 655*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-gpio"; 656*f126890aSEmmanuel Vadot reg = <0xfffff800 0x200>; 657*f126890aSEmmanuel Vadot interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 658*f126890aSEmmanuel Vadot #gpio-cells = <2>; 659*f126890aSEmmanuel Vadot gpio-controller; 660*f126890aSEmmanuel Vadot interrupt-controller; 661*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 662*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 663*f126890aSEmmanuel Vadot }; 664*f126890aSEmmanuel Vadot 665*f126890aSEmmanuel Vadot pioE: gpio@fffffa00 { 666*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-gpio"; 667*f126890aSEmmanuel Vadot reg = <0xfffffa00 0x200>; 668*f126890aSEmmanuel Vadot interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 669*f126890aSEmmanuel Vadot #gpio-cells = <2>; 670*f126890aSEmmanuel Vadot gpio-controller; 671*f126890aSEmmanuel Vadot interrupt-controller; 672*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 673*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 674*f126890aSEmmanuel Vadot }; 675*f126890aSEmmanuel Vadot }; 676*f126890aSEmmanuel Vadot 677*f126890aSEmmanuel Vadot dbgu: serial@ffffee00 { 678*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 679*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 680*f126890aSEmmanuel Vadot reg = <0xffffee00 0x200>; 681*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 682*f126890aSEmmanuel Vadot pinctrl-names = "default"; 683*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_dbgu>; 684*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 685*f126890aSEmmanuel Vadot clock-names = "usart"; 686*f126890aSEmmanuel Vadot status = "disabled"; 687*f126890aSEmmanuel Vadot }; 688*f126890aSEmmanuel Vadot 689*f126890aSEmmanuel Vadot usart0: serial@fff8c000 { 690*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-usart"; 691*f126890aSEmmanuel Vadot reg = <0xfff8c000 0x200>; 692*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 693*f126890aSEmmanuel Vadot interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 694*f126890aSEmmanuel Vadot atmel,use-dma-rx; 695*f126890aSEmmanuel Vadot atmel,use-dma-tx; 696*f126890aSEmmanuel Vadot pinctrl-names = "default"; 697*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usart0>; 698*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 699*f126890aSEmmanuel Vadot clock-names = "usart"; 700*f126890aSEmmanuel Vadot status = "disabled"; 701*f126890aSEmmanuel Vadot }; 702*f126890aSEmmanuel Vadot 703*f126890aSEmmanuel Vadot usart1: serial@fff90000 { 704*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-usart"; 705*f126890aSEmmanuel Vadot reg = <0xfff90000 0x200>; 706*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 707*f126890aSEmmanuel Vadot interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 708*f126890aSEmmanuel Vadot atmel,use-dma-rx; 709*f126890aSEmmanuel Vadot atmel,use-dma-tx; 710*f126890aSEmmanuel Vadot pinctrl-names = "default"; 711*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usart1>; 712*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 713*f126890aSEmmanuel Vadot clock-names = "usart"; 714*f126890aSEmmanuel Vadot status = "disabled"; 715*f126890aSEmmanuel Vadot }; 716*f126890aSEmmanuel Vadot 717*f126890aSEmmanuel Vadot usart2: serial@fff94000 { 718*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-usart"; 719*f126890aSEmmanuel Vadot reg = <0xfff94000 0x200>; 720*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 721*f126890aSEmmanuel Vadot interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 722*f126890aSEmmanuel Vadot atmel,use-dma-rx; 723*f126890aSEmmanuel Vadot atmel,use-dma-tx; 724*f126890aSEmmanuel Vadot pinctrl-names = "default"; 725*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usart2>; 726*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 727*f126890aSEmmanuel Vadot clock-names = "usart"; 728*f126890aSEmmanuel Vadot status = "disabled"; 729*f126890aSEmmanuel Vadot }; 730*f126890aSEmmanuel Vadot 731*f126890aSEmmanuel Vadot usart3: serial@fff98000 { 732*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-usart"; 733*f126890aSEmmanuel Vadot reg = <0xfff98000 0x200>; 734*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 735*f126890aSEmmanuel Vadot interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>; 736*f126890aSEmmanuel Vadot atmel,use-dma-rx; 737*f126890aSEmmanuel Vadot atmel,use-dma-tx; 738*f126890aSEmmanuel Vadot pinctrl-names = "default"; 739*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usart3>; 740*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 741*f126890aSEmmanuel Vadot clock-names = "usart"; 742*f126890aSEmmanuel Vadot status = "disabled"; 743*f126890aSEmmanuel Vadot }; 744*f126890aSEmmanuel Vadot 745*f126890aSEmmanuel Vadot macb0: ethernet@fffbc000 { 746*f126890aSEmmanuel Vadot compatible = "cdns,at91sam9260-macb", "cdns,macb"; 747*f126890aSEmmanuel Vadot reg = <0xfffbc000 0x100>; 748*f126890aSEmmanuel Vadot interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; 749*f126890aSEmmanuel Vadot pinctrl-names = "default"; 750*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_macb_rmii>; 751*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_PERIPHERAL 25>; 752*f126890aSEmmanuel Vadot clock-names = "hclk", "pclk"; 753*f126890aSEmmanuel Vadot status = "disabled"; 754*f126890aSEmmanuel Vadot }; 755*f126890aSEmmanuel Vadot 756*f126890aSEmmanuel Vadot trng@fffcc000 { 757*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-trng"; 758*f126890aSEmmanuel Vadot reg = <0xfffcc000 0x100>; 759*f126890aSEmmanuel Vadot interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>; 760*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 761*f126890aSEmmanuel Vadot }; 762*f126890aSEmmanuel Vadot 763*f126890aSEmmanuel Vadot i2c0: i2c@fff84000 { 764*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g10-i2c"; 765*f126890aSEmmanuel Vadot reg = <0xfff84000 0x100>; 766*f126890aSEmmanuel Vadot interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 767*f126890aSEmmanuel Vadot pinctrl-names = "default"; 768*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c0>; 769*f126890aSEmmanuel Vadot #address-cells = <1>; 770*f126890aSEmmanuel Vadot #size-cells = <0>; 771*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 772*f126890aSEmmanuel Vadot status = "disabled"; 773*f126890aSEmmanuel Vadot }; 774*f126890aSEmmanuel Vadot 775*f126890aSEmmanuel Vadot i2c1: i2c@fff88000 { 776*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g10-i2c"; 777*f126890aSEmmanuel Vadot reg = <0xfff88000 0x100>; 778*f126890aSEmmanuel Vadot interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 779*f126890aSEmmanuel Vadot pinctrl-names = "default"; 780*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 781*f126890aSEmmanuel Vadot #address-cells = <1>; 782*f126890aSEmmanuel Vadot #size-cells = <0>; 783*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 784*f126890aSEmmanuel Vadot status = "disabled"; 785*f126890aSEmmanuel Vadot }; 786*f126890aSEmmanuel Vadot 787*f126890aSEmmanuel Vadot ssc0: ssc@fff9c000 { 788*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-ssc"; 789*f126890aSEmmanuel Vadot reg = <0xfff9c000 0x4000>; 790*f126890aSEmmanuel Vadot interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 791*f126890aSEmmanuel Vadot pinctrl-names = "default"; 792*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 793*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 794*f126890aSEmmanuel Vadot clock-names = "pclk"; 795*f126890aSEmmanuel Vadot status = "disabled"; 796*f126890aSEmmanuel Vadot }; 797*f126890aSEmmanuel Vadot 798*f126890aSEmmanuel Vadot ssc1: ssc@fffa0000 { 799*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-ssc"; 800*f126890aSEmmanuel Vadot reg = <0xfffa0000 0x4000>; 801*f126890aSEmmanuel Vadot interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 802*f126890aSEmmanuel Vadot pinctrl-names = "default"; 803*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 804*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; 805*f126890aSEmmanuel Vadot clock-names = "pclk"; 806*f126890aSEmmanuel Vadot status = "disabled"; 807*f126890aSEmmanuel Vadot }; 808*f126890aSEmmanuel Vadot 809*f126890aSEmmanuel Vadot ac97: sound@fffac000 { 810*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9263-ac97c"; 811*f126890aSEmmanuel Vadot reg = <0xfffac000 0x4000>; 812*f126890aSEmmanuel Vadot interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>; 813*f126890aSEmmanuel Vadot pinctrl-names = "default"; 814*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ac97>; 815*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 816*f126890aSEmmanuel Vadot clock-names = "ac97_clk"; 817*f126890aSEmmanuel Vadot status = "disabled"; 818*f126890aSEmmanuel Vadot }; 819*f126890aSEmmanuel Vadot 820*f126890aSEmmanuel Vadot adc0: adc@fffb0000 { 821*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-adc"; 822*f126890aSEmmanuel Vadot reg = <0xfffb0000 0x100>; 823*f126890aSEmmanuel Vadot interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 824*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>; 825*f126890aSEmmanuel Vadot clock-names = "adc_clk", "adc_op_clk"; 826*f126890aSEmmanuel Vadot atmel,adc-channels-used = <0xff>; 827*f126890aSEmmanuel Vadot atmel,adc-vref = <3300>; 828*f126890aSEmmanuel Vadot atmel,adc-startup-time = <40>; 829*f126890aSEmmanuel Vadot }; 830*f126890aSEmmanuel Vadot 831*f126890aSEmmanuel Vadot isi@fffb4000 { 832*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-isi"; 833*f126890aSEmmanuel Vadot reg = <0xfffb4000 0x4000>; 834*f126890aSEmmanuel Vadot interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>; 835*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 26>; 836*f126890aSEmmanuel Vadot clock-names = "isi_clk"; 837*f126890aSEmmanuel Vadot status = "disabled"; 838*f126890aSEmmanuel Vadot port { 839*f126890aSEmmanuel Vadot #address-cells = <1>; 840*f126890aSEmmanuel Vadot #size-cells = <0>; 841*f126890aSEmmanuel Vadot }; 842*f126890aSEmmanuel Vadot }; 843*f126890aSEmmanuel Vadot 844*f126890aSEmmanuel Vadot pwm0: pwm@fffb8000 { 845*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-pwm"; 846*f126890aSEmmanuel Vadot reg = <0xfffb8000 0x300>; 847*f126890aSEmmanuel Vadot interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; 848*f126890aSEmmanuel Vadot #pwm-cells = <3>; 849*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 850*f126890aSEmmanuel Vadot status = "disabled"; 851*f126890aSEmmanuel Vadot }; 852*f126890aSEmmanuel Vadot 853*f126890aSEmmanuel Vadot mmc0: mmc@fff80000 { 854*f126890aSEmmanuel Vadot compatible = "atmel,hsmci"; 855*f126890aSEmmanuel Vadot reg = <0xfff80000 0x600>; 856*f126890aSEmmanuel Vadot interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 857*f126890aSEmmanuel Vadot dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; 858*f126890aSEmmanuel Vadot dma-names = "rxtx"; 859*f126890aSEmmanuel Vadot #address-cells = <1>; 860*f126890aSEmmanuel Vadot #size-cells = <0>; 861*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 862*f126890aSEmmanuel Vadot clock-names = "mci_clk"; 863*f126890aSEmmanuel Vadot status = "disabled"; 864*f126890aSEmmanuel Vadot }; 865*f126890aSEmmanuel Vadot 866*f126890aSEmmanuel Vadot mmc1: mmc@fffd0000 { 867*f126890aSEmmanuel Vadot compatible = "atmel,hsmci"; 868*f126890aSEmmanuel Vadot reg = <0xfffd0000 0x600>; 869*f126890aSEmmanuel Vadot interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; 870*f126890aSEmmanuel Vadot dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>; 871*f126890aSEmmanuel Vadot dma-names = "rxtx"; 872*f126890aSEmmanuel Vadot #address-cells = <1>; 873*f126890aSEmmanuel Vadot #size-cells = <0>; 874*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 29>; 875*f126890aSEmmanuel Vadot clock-names = "mci_clk"; 876*f126890aSEmmanuel Vadot status = "disabled"; 877*f126890aSEmmanuel Vadot }; 878*f126890aSEmmanuel Vadot 879*f126890aSEmmanuel Vadot watchdog@fffffd40 { 880*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-wdt"; 881*f126890aSEmmanuel Vadot reg = <0xfffffd40 0x10>; 882*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 883*f126890aSEmmanuel Vadot clocks = <&clk32k>; 884*f126890aSEmmanuel Vadot atmel,watchdog-type = "hardware"; 885*f126890aSEmmanuel Vadot atmel,reset-type = "all"; 886*f126890aSEmmanuel Vadot atmel,dbg-halt; 887*f126890aSEmmanuel Vadot status = "disabled"; 888*f126890aSEmmanuel Vadot }; 889*f126890aSEmmanuel Vadot 890*f126890aSEmmanuel Vadot spi0: spi@fffa4000 { 891*f126890aSEmmanuel Vadot #address-cells = <1>; 892*f126890aSEmmanuel Vadot #size-cells = <0>; 893*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-spi"; 894*f126890aSEmmanuel Vadot reg = <0xfffa4000 0x200>; 895*f126890aSEmmanuel Vadot interrupts = <14 4 3>; 896*f126890aSEmmanuel Vadot pinctrl-names = "default"; 897*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_spi0>; 898*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 899*f126890aSEmmanuel Vadot clock-names = "spi_clk"; 900*f126890aSEmmanuel Vadot status = "disabled"; 901*f126890aSEmmanuel Vadot }; 902*f126890aSEmmanuel Vadot 903*f126890aSEmmanuel Vadot spi1: spi@fffa8000 { 904*f126890aSEmmanuel Vadot #address-cells = <1>; 905*f126890aSEmmanuel Vadot #size-cells = <0>; 906*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-spi"; 907*f126890aSEmmanuel Vadot reg = <0xfffa8000 0x200>; 908*f126890aSEmmanuel Vadot interrupts = <15 4 3>; 909*f126890aSEmmanuel Vadot pinctrl-names = "default"; 910*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_spi1>; 911*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 912*f126890aSEmmanuel Vadot clock-names = "spi_clk"; 913*f126890aSEmmanuel Vadot status = "disabled"; 914*f126890aSEmmanuel Vadot }; 915*f126890aSEmmanuel Vadot 916*f126890aSEmmanuel Vadot usb2: gadget@fff78000 { 917*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-udc"; 918*f126890aSEmmanuel Vadot reg = <0x00600000 0x80000 919*f126890aSEmmanuel Vadot 0xfff78000 0x400>; 920*f126890aSEmmanuel Vadot interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; 921*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 922*f126890aSEmmanuel Vadot clock-names = "pclk", "hclk"; 923*f126890aSEmmanuel Vadot status = "disabled"; 924*f126890aSEmmanuel Vadot }; 925*f126890aSEmmanuel Vadot 926*f126890aSEmmanuel Vadot clk32k: clock-controller@fffffd50 { 927*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9x5-sckc"; 928*f126890aSEmmanuel Vadot reg = <0xfffffd50 0x4>; 929*f126890aSEmmanuel Vadot clocks = <&slow_xtal>; 930*f126890aSEmmanuel Vadot #clock-cells = <0>; 931*f126890aSEmmanuel Vadot }; 932*f126890aSEmmanuel Vadot 933*f126890aSEmmanuel Vadot rtc@fffffd20 { 934*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-rtt"; 935*f126890aSEmmanuel Vadot reg = <0xfffffd20 0x10>; 936*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 937*f126890aSEmmanuel Vadot clocks = <&clk32k>; 938*f126890aSEmmanuel Vadot status = "disabled"; 939*f126890aSEmmanuel Vadot }; 940*f126890aSEmmanuel Vadot 941*f126890aSEmmanuel Vadot rtc@fffffdb0 { 942*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-rtc"; 943*f126890aSEmmanuel Vadot reg = <0xfffffdb0 0x30>; 944*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 945*f126890aSEmmanuel Vadot clocks = <&clk32k>; 946*f126890aSEmmanuel Vadot status = "disabled"; 947*f126890aSEmmanuel Vadot }; 948*f126890aSEmmanuel Vadot 949*f126890aSEmmanuel Vadot gpbr: syscon@fffffd60 { 950*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-gpbr", "syscon"; 951*f126890aSEmmanuel Vadot reg = <0xfffffd60 0x10>; 952*f126890aSEmmanuel Vadot status = "disabled"; 953*f126890aSEmmanuel Vadot }; 954*f126890aSEmmanuel Vadot }; 955*f126890aSEmmanuel Vadot 956*f126890aSEmmanuel Vadot fb0: fb@500000 { 957*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-lcdc"; 958*f126890aSEmmanuel Vadot reg = <0x00500000 0x1000>; 959*f126890aSEmmanuel Vadot interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; 960*f126890aSEmmanuel Vadot pinctrl-names = "default"; 961*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_fb>; 962*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>; 963*f126890aSEmmanuel Vadot clock-names = "hclk", "lcdc_clk"; 964*f126890aSEmmanuel Vadot status = "disabled"; 965*f126890aSEmmanuel Vadot }; 966*f126890aSEmmanuel Vadot 967*f126890aSEmmanuel Vadot usb0: ohci@700000 { 968*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 969*f126890aSEmmanuel Vadot reg = <0x00700000 0x100000>; 970*f126890aSEmmanuel Vadot interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 971*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>; 972*f126890aSEmmanuel Vadot clock-names = "ohci_clk", "hclk", "uhpck"; 973*f126890aSEmmanuel Vadot status = "disabled"; 974*f126890aSEmmanuel Vadot }; 975*f126890aSEmmanuel Vadot 976*f126890aSEmmanuel Vadot usb1: ehci@800000 { 977*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 978*f126890aSEmmanuel Vadot reg = <0x00800000 0x100000>; 979*f126890aSEmmanuel Vadot interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 980*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>; 981*f126890aSEmmanuel Vadot clock-names = "usb_clk", "ehci_clk"; 982*f126890aSEmmanuel Vadot status = "disabled"; 983*f126890aSEmmanuel Vadot }; 984*f126890aSEmmanuel Vadot 985*f126890aSEmmanuel Vadot ebi: ebi@10000000 { 986*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-ebi"; 987*f126890aSEmmanuel Vadot #address-cells = <2>; 988*f126890aSEmmanuel Vadot #size-cells = <1>; 989*f126890aSEmmanuel Vadot atmel,smc = <&smc>; 990*f126890aSEmmanuel Vadot atmel,matrix = <&matrix>; 991*f126890aSEmmanuel Vadot reg = <0x10000000 0x80000000>; 992*f126890aSEmmanuel Vadot ranges = <0x0 0x0 0x10000000 0x10000000 993*f126890aSEmmanuel Vadot 0x1 0x0 0x20000000 0x10000000 994*f126890aSEmmanuel Vadot 0x2 0x0 0x30000000 0x10000000 995*f126890aSEmmanuel Vadot 0x3 0x0 0x40000000 0x10000000 996*f126890aSEmmanuel Vadot 0x4 0x0 0x50000000 0x10000000 997*f126890aSEmmanuel Vadot 0x5 0x0 0x60000000 0x10000000>; 998*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 999*f126890aSEmmanuel Vadot status = "disabled"; 1000*f126890aSEmmanuel Vadot 1001*f126890aSEmmanuel Vadot nand_controller: nand-controller { 1002*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-nand-controller"; 1003*f126890aSEmmanuel Vadot #address-cells = <2>; 1004*f126890aSEmmanuel Vadot #size-cells = <1>; 1005*f126890aSEmmanuel Vadot ranges; 1006*f126890aSEmmanuel Vadot status = "disabled"; 1007*f126890aSEmmanuel Vadot }; 1008*f126890aSEmmanuel Vadot }; 1009*f126890aSEmmanuel Vadot }; 1010*f126890aSEmmanuel Vadot 1011*f126890aSEmmanuel Vadot i2c-gpio-0 { 1012*f126890aSEmmanuel Vadot compatible = "i2c-gpio"; 1013*f126890aSEmmanuel Vadot gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */ 1014*f126890aSEmmanuel Vadot &pioA 21 GPIO_ACTIVE_HIGH /* scl */ 1015*f126890aSEmmanuel Vadot >; 1016*f126890aSEmmanuel Vadot i2c-gpio,sda-open-drain; 1017*f126890aSEmmanuel Vadot i2c-gpio,scl-open-drain; 1018*f126890aSEmmanuel Vadot i2c-gpio,delay-us = <5>; /* ~100 kHz */ 1019*f126890aSEmmanuel Vadot #address-cells = <1>; 1020*f126890aSEmmanuel Vadot #size-cells = <0>; 1021*f126890aSEmmanuel Vadot status = "disabled"; 1022*f126890aSEmmanuel Vadot }; 1023*f126890aSEmmanuel Vadot}; 1024