1// SPDX-License-Identifier: GPL-2.0-or-later
2/* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX
3 *
4 * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
5 */
6
7/dts-v1/;
8#include "moxart.dtsi"
9
10/ {
11	model = "MOXA UC-7112-LX";
12	compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart";
13
14	memory {
15		device_type = "memory";
16		reg = <0x0 0x2000000>;
17	};
18
19	clocks {
20		ref12: ref12M {
21			compatible = "fixed-clock";
22			#clock-cells = <0>;
23			clock-frequency = <12000000>;
24		};
25	};
26
27	flash@80000000,0 {
28		compatible = "numonyx,js28f128", "cfi-flash";
29		reg = <0x80000000 0x1000000>;
30		bank-width = <2>;
31		#address-cells = <1>;
32		#size-cells = <1>;
33		partition@0 {
34			label = "bootloader";
35			reg = <0x0 0x40000>;
36		};
37		partition@40000 {
38			label = "linux kernel";
39			reg = <0x40000 0x1C0000>;
40		};
41		partition@200000 {
42			label = "root filesystem";
43			reg = <0x200000 0x800000>;
44		};
45		partition@a00000 {
46			label = "user filesystem";
47			reg = <0xa00000 0x600000>;
48		};
49	};
50
51	leds {
52		compatible = "gpio-leds";
53		user-led {
54			label = "ready-led";
55			gpios = <&gpio 27 0x1>;
56			default-state = "on";
57			linux,default-trigger = "default-on";
58		};
59	};
60
61	gpio_keys_polled {
62		compatible = "gpio-keys-polled";
63		#address-cells = <1>;
64		#size-cells = <0>;
65		poll-interval = <500>;
66		button@25 {
67			label = "GPIO Reset";
68			linux,code = <116>;
69			gpios = <&gpio 25 1>;
70		};
71	};
72
73	chosen {
74		bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/mmcblk0p1 rw rootwait";
75	};
76};
77
78&clk_pll {
79	clocks = <&ref12>;
80};
81
82&mmc {
83	status = "okay";
84};
85
86&mdio0 {
87	status = "okay";
88
89	ethphy0: ethernet-phy@1 {
90		device_type = "ethernet-phy";
91		compatible = "moxa,moxart-rtl8201cp", "ethernet-phy-ieee802.3-c22";
92		reg = <1>;
93	};
94};
95
96&mdio1 {
97	status = "okay";
98
99	ethphy1: ethernet-phy@1 {
100		device_type = "ethernet-phy";
101		compatible = "moxa,moxart-rtl8201cp", "ethernet-phy-ieee802.3-c22";
102		reg = <1>;
103	};
104};
105
106&mac0 {
107	status = "okay";
108};
109
110&mac1 {
111	status = "okay";
112};
113
114&uart0 {
115	status = "okay";
116};
117