1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright (C) 2016 Eckelmann AG. 4*f126890aSEmmanuel Vadot * Copyright (C) 2013 Freescale Semiconductor, Inc. 5*f126890aSEmmanuel Vadot */ 6*f126890aSEmmanuel Vadot 7*f126890aSEmmanuel Vadot/dts-v1/; 8*f126890aSEmmanuel Vadot 9*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 10*f126890aSEmmanuel Vadot 11*f126890aSEmmanuel Vadot#include "imx6dl.dtsi" 12*f126890aSEmmanuel Vadot 13*f126890aSEmmanuel Vadot/ { 14*f126890aSEmmanuel Vadot model = "Eckelmann CI 4X10 Board"; 15*f126890aSEmmanuel Vadot compatible = "eckelmann,imx6dl-ci4x10", "fsl,imx6dl"; 16*f126890aSEmmanuel Vadot 17*f126890aSEmmanuel Vadot chosen { 18*f126890aSEmmanuel Vadot stdout-path = &uart3; 19*f126890aSEmmanuel Vadot }; 20*f126890aSEmmanuel Vadot 21*f126890aSEmmanuel Vadot memory@10000000 { 22*f126890aSEmmanuel Vadot device_type = "memory"; 23*f126890aSEmmanuel Vadot reg = <0x10000000 0x40000000>; 24*f126890aSEmmanuel Vadot }; 25*f126890aSEmmanuel Vadot 26*f126890aSEmmanuel Vadot rmii_clk: clock-rmii { 27*f126890aSEmmanuel Vadot /* This clock is provided by the phy (KSZ8091RNB) */ 28*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 29*f126890aSEmmanuel Vadot #clock-cells = <0>; 30*f126890aSEmmanuel Vadot clock-frequency = <50000000>; 31*f126890aSEmmanuel Vadot clock-output-names = "enet_ref_pad"; 32*f126890aSEmmanuel Vadot }; 33*f126890aSEmmanuel Vadot 34*f126890aSEmmanuel Vadot reg_usb_h1_vbus: regulator-usb-h1-vbus { 35*f126890aSEmmanuel Vadot pinctrl-names = "default"; 36*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_reg_usb_h1_vbus>; 37*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 38*f126890aSEmmanuel Vadot regulator-name = "usb_h1_vbus"; 39*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 40*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 41*f126890aSEmmanuel Vadot gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; 42*f126890aSEmmanuel Vadot enable-active-high; 43*f126890aSEmmanuel Vadot }; 44*f126890aSEmmanuel Vadot 45*f126890aSEmmanuel Vadot siox { 46*f126890aSEmmanuel Vadot compatible = "eckelmann,siox-gpio"; 47*f126890aSEmmanuel Vadot pinctrl-names = "default"; 48*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_siox>; 49*f126890aSEmmanuel Vadot din-gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>; 50*f126890aSEmmanuel Vadot dout-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>; 51*f126890aSEmmanuel Vadot dclk-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; 52*f126890aSEmmanuel Vadot dld-gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>; 53*f126890aSEmmanuel Vadot }; 54*f126890aSEmmanuel Vadot}; 55*f126890aSEmmanuel Vadot 56*f126890aSEmmanuel Vadot&can1 { 57*f126890aSEmmanuel Vadot pinctrl-names = "default"; 58*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_flexcan1>; 59*f126890aSEmmanuel Vadot status = "okay"; 60*f126890aSEmmanuel Vadot}; 61*f126890aSEmmanuel Vadot 62*f126890aSEmmanuel Vadot&can2 { 63*f126890aSEmmanuel Vadot pinctrl-names = "default"; 64*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_flexcan2>; 65*f126890aSEmmanuel Vadot status = "okay"; 66*f126890aSEmmanuel Vadot}; 67*f126890aSEmmanuel Vadot 68*f126890aSEmmanuel Vadot&clks { 69*f126890aSEmmanuel Vadot clocks = <&rmii_clk>; 70*f126890aSEmmanuel Vadot clock-names = "enet_ref_pad"; 71*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>; 72*f126890aSEmmanuel Vadot assigned-clock-parents = <&rmii_clk>; 73*f126890aSEmmanuel Vadot}; 74*f126890aSEmmanuel Vadot 75*f126890aSEmmanuel Vadot&ecspi2 { 76*f126890aSEmmanuel Vadot pinctrl-names = "default"; 77*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi2>; 78*f126890aSEmmanuel Vadot cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; 79*f126890aSEmmanuel Vadot status = "okay"; 80*f126890aSEmmanuel Vadot 81*f126890aSEmmanuel Vadot flash@0 { 82*f126890aSEmmanuel Vadot compatible = "everspin,mr25h256"; 83*f126890aSEmmanuel Vadot reg = <0>; 84*f126890aSEmmanuel Vadot spi-max-frequency = <15000000>; 85*f126890aSEmmanuel Vadot }; 86*f126890aSEmmanuel Vadot}; 87*f126890aSEmmanuel Vadot 88*f126890aSEmmanuel Vadot&ecspi1 { 89*f126890aSEmmanuel Vadot pinctrl-names = "default"; 90*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi1>; 91*f126890aSEmmanuel Vadot cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; 92*f126890aSEmmanuel Vadot status = "okay"; 93*f126890aSEmmanuel Vadot 94*f126890aSEmmanuel Vadot tpm@0 { 95*f126890aSEmmanuel Vadot compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 96*f126890aSEmmanuel Vadot reg = <0>; 97*f126890aSEmmanuel Vadot spi-max-frequency = <10000000>; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot}; 100*f126890aSEmmanuel Vadot 101*f126890aSEmmanuel Vadot&gpio2 { 102*f126890aSEmmanuel Vadot gpio-line-names = "buzzer", "", "", "", "", "", "", "", 103*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 104*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 105*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", ""; 106*f126890aSEmmanuel Vadot}; 107*f126890aSEmmanuel Vadot 108*f126890aSEmmanuel Vadot&gpio4 { 109*f126890aSEmmanuel Vadot gpio-line-names = "", "", "", "", "", "", "", "in2", 110*f126890aSEmmanuel Vadot "prio2", "prio1", "aux", "", "", "", "", "", 111*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 112*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", ""; 113*f126890aSEmmanuel Vadot}; 114*f126890aSEmmanuel Vadot 115*f126890aSEmmanuel Vadot&gpio6 { 116*f126890aSEmmanuel Vadot gpio-line-names = "", "", "", "", "", "", "", "", 117*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "in1", 118*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 119*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", ""; 120*f126890aSEmmanuel Vadot}; 121*f126890aSEmmanuel Vadot 122*f126890aSEmmanuel Vadot&i2c1 { 123*f126890aSEmmanuel Vadot pinctrl-names = "default"; 124*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 125*f126890aSEmmanuel Vadot status = "okay"; 126*f126890aSEmmanuel Vadot 127*f126890aSEmmanuel Vadot temperature-sensor@49 { 128*f126890aSEmmanuel Vadot compatible = "ad,ad7414"; 129*f126890aSEmmanuel Vadot reg = <0x49>; 130*f126890aSEmmanuel Vadot }; 131*f126890aSEmmanuel Vadot 132*f126890aSEmmanuel Vadot rtc@51 { 133*f126890aSEmmanuel Vadot compatible = "nxp,pcf2127"; 134*f126890aSEmmanuel Vadot reg = <0x51>; 135*f126890aSEmmanuel Vadot }; 136*f126890aSEmmanuel Vadot}; 137*f126890aSEmmanuel Vadot 138*f126890aSEmmanuel Vadot&iomuxc { 139*f126890aSEmmanuel Vadot pinctrl-names = "default"; 140*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_hog>; 141*f126890aSEmmanuel Vadot 142*f126890aSEmmanuel Vadot pinctrl_hog: hog { 143*f126890aSEmmanuel Vadot fsl,pins = < 144*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00000018 /* buzzer */ 145*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x00000018 /* OUT_1 */ 146*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x00000018 /* OUT_2 */ 147*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x00000018 /* OUT_3 */ 148*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x00000000 /* In1 */ 149*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x00000000 /* In2 */ 150*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x00000018 /* unused watchdog pin */ 151*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x00000018 /* unused watchdog pin */ 152*f126890aSEmmanuel Vadot 153*f126890aSEmmanuel Vadot >; 154*f126890aSEmmanuel Vadot }; 155*f126890aSEmmanuel Vadot 156*f126890aSEmmanuel Vadot pinctrl_ecspi1: ecspi1grp { 157*f126890aSEmmanuel Vadot fsl,pins = < 158*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x000100a0 159*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x000100a0 160*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x000100a0 161*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 0x000100a0 162*f126890aSEmmanuel Vadot >; 163*f126890aSEmmanuel Vadot }; 164*f126890aSEmmanuel Vadot 165*f126890aSEmmanuel Vadot pinctrl_ecspi2: ecspi2grp { 166*f126890aSEmmanuel Vadot fsl,pins = < 167*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x000100b1 168*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x000100b1 169*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x000100b1 170*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000100b1 171*f126890aSEmmanuel Vadot >; 172*f126890aSEmmanuel Vadot }; 173*f126890aSEmmanuel Vadot 174*f126890aSEmmanuel Vadot pinctrl_enet: enetgrp { 175*f126890aSEmmanuel Vadot fsl,pins = < 176*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 177*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x0001b098 178*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDC__ENET_MDC 0x0001b098 179*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x0001b098 180*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x0001b098 181*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x0001b098 182*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x0001b0b0 183*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x0001b0b0 184*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x0001b0b0 185*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x0001b0b0 186*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x00000018 187*f126890aSEmmanuel Vadot >; 188*f126890aSEmmanuel Vadot }; 189*f126890aSEmmanuel Vadot 190*f126890aSEmmanuel Vadot pinctrl_flexcan1: flexcan1grp { 191*f126890aSEmmanuel Vadot fsl,pins = < 192*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x0001b020 193*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x0001b0b0 194*f126890aSEmmanuel Vadot >; 195*f126890aSEmmanuel Vadot }; 196*f126890aSEmmanuel Vadot 197*f126890aSEmmanuel Vadot pinctrl_flexcan2: flexcan2grp { 198*f126890aSEmmanuel Vadot fsl,pins = < 199*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x0001b020 200*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x0001b0b0 201*f126890aSEmmanuel Vadot >; 202*f126890aSEmmanuel Vadot }; 203*f126890aSEmmanuel Vadot 204*f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 205*f126890aSEmmanuel Vadot fsl,pins = < 206*f126890aSEmmanuel Vadot /* without SION i2c doesn't detect bus busy */ 207*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b820 208*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b820 209*f126890aSEmmanuel Vadot >; 210*f126890aSEmmanuel Vadot }; 211*f126890aSEmmanuel Vadot 212*f126890aSEmmanuel Vadot pinctrl_pcie: pciegrp { 213*f126890aSEmmanuel Vadot fsl,pins = < 214*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x00000018 215*f126890aSEmmanuel Vadot >; 216*f126890aSEmmanuel Vadot }; 217*f126890aSEmmanuel Vadot 218*f126890aSEmmanuel Vadot pinctrl_reg_usb_h1_vbus: reg_usb_h1_vbusgrp { 219*f126890aSEmmanuel Vadot fsl,pins = < 220*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x0001b0b0 221*f126890aSEmmanuel Vadot >; 222*f126890aSEmmanuel Vadot }; 223*f126890aSEmmanuel Vadot 224*f126890aSEmmanuel Vadot pinctrl_siox: sioxgrp { 225*f126890aSEmmanuel Vadot fsl,pins = < 226*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x0001b010 /* DIN */ 227*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x0001b010 /* DOUT */ 228*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0001b010 /* DCLK */ 229*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x0001b010 /* DLD */ 230*f126890aSEmmanuel Vadot >; 231*f126890aSEmmanuel Vadot }; 232*f126890aSEmmanuel Vadot 233*f126890aSEmmanuel Vadot pinctrl_uart1_dte: uart1grp { 234*f126890aSEmmanuel Vadot fsl,pins = < 235*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x0001b010 236*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x0001b010 237*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x0001b010 238*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x0001b010 239*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x0001b010 /* DCD */ 240*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x0001b010 /* DTR */ 241*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x0001b010 /* DSR */ 242*f126890aSEmmanuel Vadot >; 243*f126890aSEmmanuel Vadot }; 244*f126890aSEmmanuel Vadot 245*f126890aSEmmanuel Vadot pinctrl_uart2_dte: uart2grp { 246*f126890aSEmmanuel Vadot fsl,pins = < 247*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x0001b010 248*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x0001b010 249*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D28__UART2_RTS_B 0x0001b010 250*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x0001b010 251*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x0001b010 /* DCD */ 252*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x0001b010 /* DTR */ 253*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x0001b010 /* DSR */ 254*f126890aSEmmanuel Vadot >; 255*f126890aSEmmanuel Vadot }; 256*f126890aSEmmanuel Vadot 257*f126890aSEmmanuel Vadot pinctrl_uart3_dce: uart3grp { 258*f126890aSEmmanuel Vadot fsl,pins = < 259*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CLK__UART3_RX_DATA 0x0001b010 260*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CMD__UART3_TX_DATA 0x0001b010 261*f126890aSEmmanuel Vadot >; 262*f126890aSEmmanuel Vadot }; 263*f126890aSEmmanuel Vadot 264*f126890aSEmmanuel Vadot pinctrl_uart4_dce: uart4grp { 265*f126890aSEmmanuel Vadot fsl,pins = < 266*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x0001b010 267*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x0001b010 268*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x0001b010 269*f126890aSEmmanuel Vadot >; 270*f126890aSEmmanuel Vadot }; 271*f126890aSEmmanuel Vadot 272*f126890aSEmmanuel Vadot pinctrl_uart5_dce: uart5grp { 273*f126890aSEmmanuel Vadot fsl,pins = < 274*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x0001b010 275*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x0001b010 276*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x0001b010 /* RTS */ 277*f126890aSEmmanuel Vadot >; 278*f126890aSEmmanuel Vadot }; 279*f126890aSEmmanuel Vadot 280*f126890aSEmmanuel Vadot pinctrl_usbh1: usbh1grp { 281*f126890aSEmmanuel Vadot fsl,pins = < 282*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D30__USB_H1_OC 0x0001b0b0 283*f126890aSEmmanuel Vadot >; 284*f126890aSEmmanuel Vadot }; 285*f126890aSEmmanuel Vadot 286*f126890aSEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 287*f126890aSEmmanuel Vadot fsl,pins = < 288*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CMD__SD3_CMD 0x00017059 289*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CLK__SD3_CLK 0x00010059 290*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x00017059 291*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x00017059 292*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x00017059 293*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x00017059 294*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x00017059 295*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x00017059 296*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x00017059 297*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x00017059 298*f126890aSEmmanuel Vadot >; 299*f126890aSEmmanuel Vadot }; 300*f126890aSEmmanuel Vadot}; 301*f126890aSEmmanuel Vadot 302*f126890aSEmmanuel Vadot&fec { 303*f126890aSEmmanuel Vadot pinctrl-names = "default"; 304*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet>; 305*f126890aSEmmanuel Vadot phy-mode = "rmii"; 306*f126890aSEmmanuel Vadot phy-reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; 307*f126890aSEmmanuel Vadot phy-handle = <&phy>; 308*f126890aSEmmanuel Vadot status = "okay"; 309*f126890aSEmmanuel Vadot 310*f126890aSEmmanuel Vadot mdio { 311*f126890aSEmmanuel Vadot #address-cells = <1>; 312*f126890aSEmmanuel Vadot #size-cells = <0>; 313*f126890aSEmmanuel Vadot 314*f126890aSEmmanuel Vadot phy: ethernet-phy@1 { 315*f126890aSEmmanuel Vadot compatible = "ethernet-phy-ieee802.3-c22"; 316*f126890aSEmmanuel Vadot reg = <1>; 317*f126890aSEmmanuel Vadot }; 318*f126890aSEmmanuel Vadot }; 319*f126890aSEmmanuel Vadot}; 320*f126890aSEmmanuel Vadot 321*f126890aSEmmanuel Vadot&pcie { 322*f126890aSEmmanuel Vadot pinctrl-names = "default"; 323*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pcie>; 324*f126890aSEmmanuel Vadot reset-gpio = <&gpio1 20 GPIO_ACTIVE_LOW>; 325*f126890aSEmmanuel Vadot status = "okay"; 326*f126890aSEmmanuel Vadot}; 327*f126890aSEmmanuel Vadot 328*f126890aSEmmanuel Vadot&uart1 { 329*f126890aSEmmanuel Vadot pinctrl-names = "default"; 330*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart1_dte>; 331*f126890aSEmmanuel Vadot uart-has-rtscts; 332*f126890aSEmmanuel Vadot fsl,dte-mode; 333*f126890aSEmmanuel Vadot dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 334*f126890aSEmmanuel Vadot dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; 335*f126890aSEmmanuel Vadot dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 336*f126890aSEmmanuel Vadot status = "okay"; 337*f126890aSEmmanuel Vadot}; 338*f126890aSEmmanuel Vadot 339*f126890aSEmmanuel Vadot&uart2 { 340*f126890aSEmmanuel Vadot pinctrl-names = "default"; 341*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2_dte>; 342*f126890aSEmmanuel Vadot uart-has-rtscts; 343*f126890aSEmmanuel Vadot fsl,dte-mode; 344*f126890aSEmmanuel Vadot dcd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 345*f126890aSEmmanuel Vadot dtr-gpios = <&gpio7 13 GPIO_ACTIVE_LOW>; 346*f126890aSEmmanuel Vadot dsr-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; 347*f126890aSEmmanuel Vadot status = "okay"; 348*f126890aSEmmanuel Vadot}; 349*f126890aSEmmanuel Vadot 350*f126890aSEmmanuel Vadot&uart3 { 351*f126890aSEmmanuel Vadot pinctrl-names = "default"; 352*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart3_dce>; 353*f126890aSEmmanuel Vadot status = "okay"; 354*f126890aSEmmanuel Vadot}; 355*f126890aSEmmanuel Vadot 356*f126890aSEmmanuel Vadot&uart4 { 357*f126890aSEmmanuel Vadot pinctrl-names = "default"; 358*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart4_dce>; 359*f126890aSEmmanuel Vadot rts-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; 360*f126890aSEmmanuel Vadot status = "okay"; 361*f126890aSEmmanuel Vadot}; 362*f126890aSEmmanuel Vadot 363*f126890aSEmmanuel Vadot&uart5 { 364*f126890aSEmmanuel Vadot pinctrl-names = "default"; 365*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart5_dce>; 366*f126890aSEmmanuel Vadot rts-gpios = <&gpio6 5 GPIO_ACTIVE_HIGH>; 367*f126890aSEmmanuel Vadot status = "okay"; 368*f126890aSEmmanuel Vadot}; 369*f126890aSEmmanuel Vadot 370*f126890aSEmmanuel Vadot&usbh1 { 371*f126890aSEmmanuel Vadot pinctrl-names = "default"; 372*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbh1>; 373*f126890aSEmmanuel Vadot vbus-supply = <®_usb_h1_vbus>; 374*f126890aSEmmanuel Vadot status = "okay"; 375*f126890aSEmmanuel Vadot}; 376*f126890aSEmmanuel Vadot 377*f126890aSEmmanuel Vadot&usbotg { 378*f126890aSEmmanuel Vadot dr_mode = "peripheral"; 379*f126890aSEmmanuel Vadot status = "okay"; 380*f126890aSEmmanuel Vadot}; 381*f126890aSEmmanuel Vadot 382*f126890aSEmmanuel Vadot&usdhc3 { 383*f126890aSEmmanuel Vadot pinctrl-names = "default"; 384*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 385*f126890aSEmmanuel Vadot bus-width = <8>; 386*f126890aSEmmanuel Vadot non-removable; 387*f126890aSEmmanuel Vadot status = "okay"; 388*f126890aSEmmanuel Vadot}; 389