1/*
2 * support for the imx6 based aristainetos2 board
3 *
4 * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 *  a) This file is free software; you can redistribute it and/or
12 *     modify it under the terms of the GNU General Public License
13 *     version 2 as published by the Free Software Foundation.
14 *
15 *     This file is distributed in the hope that it will be useful,
16 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
17 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18 *     GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 *  b) Permission is hereby granted, free of charge, to any person
23 *     obtaining a copy of this software and associated documentation
24 *     files (the "Software"), to deal in the Software without
25 *     restriction, including without limitation the rights to use,
26 *     copy, modify, merge, publish, distribute, sublicense, and/or
27 *     sell copies of the Software, and to permit persons to whom the
28 *     Software is furnished to do so, subject to the following
29 *     conditions:
30 *
31 *     The above copyright notice and this permission notice shall be
32 *     included in all copies or substantial portions of the Software.
33 *
34 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 *     OTHER DEALINGS IN THE SOFTWARE.
42 */
43#include <dt-bindings/gpio/gpio.h>
44#include <dt-bindings/clock/imx6qdl-clock.h>
45
46/ {
47	backlight: backlight {
48		compatible = "pwm-backlight";
49		pwms = <&pwm1 0 5000000>;
50		brightness-levels = <0 4 8 16 32 64 128 255>;
51		default-brightness-level = <7>;
52		enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
53	};
54
55	reg_2p5v: regulator-2p5v {
56		compatible = "regulator-fixed";
57		regulator-name = "2P5V";
58		regulator-min-microvolt = <2500000>;
59		regulator-max-microvolt = <2500000>;
60		regulator-always-on;
61	};
62
63	reg_3p3v: regulator-3p3v {
64		compatible = "regulator-fixed";
65		regulator-name = "3P3V";
66		regulator-min-microvolt = <3300000>;
67		regulator-max-microvolt = <3300000>;
68		regulator-always-on;
69	};
70
71	reg_usbh1_vbus: regulator-usbh1-vbus {
72		compatible = "regulator-fixed";
73		enable-active-high;
74		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
75		pinctrl-names = "default";
76		pinctrl-0 = <&pinctrl_aristainetos2_usbh1_vbus>;
77		regulator-name = "usb_h1_vbus";
78		regulator-min-microvolt = <5000000>;
79		regulator-max-microvolt = <5000000>;
80	};
81
82	reg_usbotg_vbus: regulator-usbotg-vbus {
83		compatible = "regulator-fixed";
84		enable-active-high;
85		gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
86		pinctrl-names = "default";
87		pinctrl-0 = <&pinctrl_aristainetos2_usbotg_vbus>;
88		regulator-name = "usb_otg_vbus";
89		regulator-min-microvolt = <5000000>;
90		regulator-max-microvolt = <5000000>;
91	};
92};
93
94&audmux {
95	pinctrl-names = "default";
96	pinctrl-0 = <&pinctrl_audmux>;
97	status = "okay";
98};
99
100&can1 {
101	pinctrl-names = "default";
102	pinctrl-0 = <&pinctrl_flexcan1>;
103	status = "okay";
104};
105
106&can2 {
107	pinctrl-names = "default";
108	pinctrl-0 = <&pinctrl_flexcan2>;
109	status = "okay";
110};
111
112&ecspi1 {
113	cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW
114		    &gpio4 10 GPIO_ACTIVE_LOW
115		    &gpio4 11 GPIO_ACTIVE_LOW>;
116	pinctrl-names = "default";
117	pinctrl-0 = <&pinctrl_ecspi1>;
118	status = "okay";
119};
120
121&ecspi2 {
122	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW &gpio2 27 GPIO_ACTIVE_LOW>;
123	pinctrl-names = "default";
124	pinctrl-0 = <&pinctrl_ecspi2>;
125	status = "okay";
126};
127
128&ecspi4 {
129	cs-gpios = <&gpio3 29 GPIO_ACTIVE_LOW &gpio5 2 GPIO_ACTIVE_LOW>;
130	pinctrl-names = "default";
131	pinctrl-0 = <&pinctrl_ecspi4>;
132	status = "okay";
133
134	flash: flash@1 {
135		#address-cells = <1>;
136		#size-cells = <1>;
137		compatible = "micron,n25q128a11", "jedec,spi-nor";
138		spi-max-frequency = <20000000>;
139		reg = <1>;
140	};
141};
142
143&i2c1 {
144	pinctrl-names = "default";
145	pinctrl-0 = <&pinctrl_i2c1>;
146	status = "okay";
147
148	pmic@58 {
149		compatible = "dlg,da9063";
150		reg = <0x58>;
151		interrupt-parent = <&gpio1>;
152		interrupts = <04 0x8>;
153
154		regulators {
155			bcore1 {
156				regulator-name = "bcore1";
157				regulator-always-on;
158				regulator-min-microvolt = <300000>;
159				regulator-max-microvolt = <3300000>;
160			};
161
162			bcore2 {
163				regulator-name = "bcore2";
164				regulator-always-on;
165				regulator-min-microvolt = <300000>;
166				regulator-max-microvolt = <3300000>;
167			};
168
169			bpro {
170				regulator-name = "bpro";
171				regulator-always-on;
172				regulator-min-microvolt = <300000>;
173				regulator-max-microvolt = <3300000>;
174			};
175
176			bperi {
177				regulator-name = "bperi";
178				regulator-always-on;
179				regulator-min-microvolt = <300000>;
180				regulator-max-microvolt = <3300000>;
181			};
182
183			bmem {
184				regulator-name = "bmem";
185				regulator-always-on;
186				regulator-min-microvolt = <300000>;
187				regulator-max-microvolt = <3300000>;
188			};
189
190			ldo2 {
191				regulator-name = "ldo2";
192				regulator-always-on;
193				regulator-min-microvolt = <300000>;
194				regulator-max-microvolt = <1800000>;
195			};
196
197			ldo3 {
198				regulator-name = "ldo3";
199				regulator-always-on;
200				regulator-min-microvolt = <300000>;
201				regulator-max-microvolt = <3300000>;
202			};
203
204			ldo4 {
205				regulator-name = "ldo4";
206				regulator-always-on;
207				regulator-min-microvolt = <300000>;
208				regulator-max-microvolt = <3300000>;
209			};
210
211			ldo5 {
212				regulator-name = "ldo5";
213				regulator-always-on;
214				regulator-min-microvolt = <300000>;
215				regulator-max-microvolt = <3300000>;
216			};
217
218			ldo6 {
219				regulator-name = "ldo6";
220				regulator-always-on;
221				regulator-min-microvolt = <300000>;
222				regulator-max-microvolt = <3300000>;
223			};
224
225			ldo7 {
226				regulator-name = "ldo7";
227				regulator-always-on;
228				regulator-min-microvolt = <300000>;
229				regulator-max-microvolt = <3300000>;
230			};
231
232			ldo8 {
233				regulator-name = "ldo8";
234				regulator-always-on;
235				regulator-min-microvolt = <300000>;
236				regulator-max-microvolt = <3300000>;
237			};
238
239			ldo9 {
240				regulator-name = "ldo9";
241				regulator-always-on;
242				regulator-min-microvolt = <300000>;
243				regulator-max-microvolt = <3300000>;
244			};
245
246			ldo10 {
247				regulator-name = "ldo10";
248				regulator-always-on;
249				regulator-min-microvolt = <300000>;
250				regulator-max-microvolt = <3300000>;
251			};
252
253			ldo11 {
254				regulator-name = "ldo11";
255				regulator-always-on;
256				regulator-min-microvolt = <300000>;
257				regulator-max-microvolt = <3300000>;
258			};
259
260			bio {
261				regulator-name = "bio";
262				regulator-always-on;
263				regulator-min-microvolt = <1800000>;
264				regulator-max-microvolt = <1800000>;
265			};
266		};
267	};
268
269	tmp103: tmp103@71 {
270		compatible = "ti,tmp103";
271		reg = <0x71>;
272	};
273};
274
275&i2c2 {
276	pinctrl-names = "default";
277	pinctrl-0 = <&pinctrl_i2c2>;
278	status = "okay";
279};
280
281&i2c3 {
282	pinctrl-names = "default";
283	pinctrl-0 = <&pinctrl_i2c3>;
284	status = "okay";
285
286	expander: tca6416@20 {
287		compatible = "ti,tca6416";
288		reg = <0x20>;
289		#gpio-cells = <2>;
290		gpio-controller;
291	};
292
293	rtc@68 {
294		compatible = "dallas,m41t00";
295		reg = <0x68>;
296	};
297};
298
299&i2c4 {
300	pinctrl-names = "default";
301	pinctrl-0 = <&pinctrl_i2c4>;
302	status = "okay";
303
304	eeprom@50{
305		compatible = "atmel,24c64";
306		reg = <0x50>;
307	};
308
309	eeprom@57{
310		compatible = "atmel,24c64";
311		reg = <0x57>;
312	};
313};
314
315&fec {
316	pinctrl-names = "default";
317	pinctrl-0 = <&pinctrl_enet>;
318	phy-mode = "rgmii";
319	phy-handle = <&ethphy>;
320	phy-reset-gpios = <&gpio7 18 GPIO_ACTIVE_LOW>;
321	status = "okay";
322
323	mdio {
324		#address-cells = <1>;
325		#size-cells = <0>;
326
327		ethphy: ethernet-phy {
328			compatible = "ethernet-phy-ieee802.3-c22";
329			txd0-skew-ps = <0>;
330			txd1-skew-ps = <0>;
331			txd2-skew-ps = <0>;
332			txd3-skew-ps = <0>;
333		};
334	};
335};
336
337&gpmi {
338	pinctrl-names = "default";
339	pinctrl-0 = <&pinctrl_gpmi_nand>;
340	status = "okay";
341};
342
343&pcie {
344	reset-gpio = <&gpio2 16 GPIO_ACTIVE_LOW>;
345	status = "okay";
346};
347
348&pwm1 {
349	#pwm-cells = <2>;
350	pinctrl-names = "default";
351	pinctrl-0 = <&pinctrl_pwm1>;
352	status = "okay";
353};
354
355&uart1 {
356	pinctrl-names = "default";
357	pinctrl-0 = <&pinctrl_uart1>;
358	uart-has-rtscts;
359	status = "okay";
360};
361
362&uart2 {
363	pinctrl-names = "default";
364	pinctrl-0 = <&pinctrl_uart2>;
365	status = "okay";
366};
367
368&uart3 {
369	pinctrl-names = "default";
370	pinctrl-0 = <&pinctrl_uart3>;
371	uart-has-rtscts;
372	status = "okay";
373};
374
375&uart4 {
376	pinctrl-names = "default";
377	pinctrl-0 = <&pinctrl_uart4>;
378	status = "okay";
379};
380
381&usbh1 {
382	vbus-supply = <&reg_usbh1_vbus>;
383	dr_mode = "host";
384	status = "okay";
385};
386
387&usbotg {
388	vbus-supply = <&reg_usbotg_vbus>;
389	pinctrl-names = "default";
390	pinctrl-0 = <&pinctrl_usbotg>;
391	disable-over-current;
392	dr_mode = "host";
393	status = "okay";
394};
395
396&usdhc1 {
397	pinctrl-names = "default";
398	pinctrl-0 = <&pinctrl_usdhc1>;
399	cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
400	no-1-8-v;
401	status = "okay";
402};
403
404&usdhc2 {
405	pinctrl-names = "default";
406	pinctrl-0 = <&pinctrl_usdhc2>;
407	cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
408	wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
409	no-1-8-v;
410	status = "okay";
411};
412
413&iomuxc {
414	pinctrl-names = "default";
415	pinctrl-0 = <&pinctrl_gpio>;
416
417	pinctrl_audmux: audmux {
418		fsl,pins = <
419			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0
420			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0
421			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0
422			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
423		>;
424	};
425
426	pinctrl_ecspi1: ecspi1grp {
427		fsl,pins = <
428			MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
429			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
430			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
431			MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x100b1 /* SS0# */
432			MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1 /* SS1# */
433			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1 /* SS2# */
434		>;
435	};
436
437	pinctrl_ecspi2: ecspi2grp {
438		fsl,pins = <
439			MX6QDL_PAD_EIM_OE__ECSPI2_MISO  0x100b1
440			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
441			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
442			MX6QDL_PAD_EIM_RW__GPIO2_IO26   0x100b1 /* SS0# */
443			MX6QDL_PAD_EIM_LBA__GPIO2_IO27  0x100b1 /* SS1# */
444		>;
445	};
446
447	pinctrl_ecspi4: ecspi4grp {
448		fsl,pins = <
449			MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
450			MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
451			MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
452			MX6QDL_PAD_EIM_D29__GPIO3_IO29  0x100b1 /* SS0# */
453			MX6QDL_PAD_EIM_A25__GPIO5_IO02  0x100b1 /* SS1# */
454			MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 /* WP pin */
455		>;
456	};
457
458	pinctrl_enet: enetgrp {
459		fsl,pins = <
460			MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
461			MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
462			MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
463			MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
464			MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
465			MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
466			MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
467			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
468			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
469			MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
470			MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
471			MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
472			MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
473			MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
474			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
475		>;
476	};
477
478	pinctrl_flexcan1: flexcan1grp {
479		fsl,pins = <
480			MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0
481			MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0
482		>;
483	};
484
485	pinctrl_flexcan2: flexcan2grp {
486		fsl,pins = <
487			MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
488			MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
489		>;
490	};
491
492	pinctrl_gpio: gpiogrp {
493		fsl,pins = <
494			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0 /* led enable */
495			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x1b0b0 /* LCD power enable */
496			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x1b0b0 /* led yellow */
497			MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0x1b0b0 /* led red */
498			MX6QDL_PAD_EIM_A24__GPIO5_IO04		0x1b0b0 /* led green */
499			MX6QDL_PAD_EIM_EB1__GPIO2_IO29		0x1b0b0 /* led blue */
500			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0 /* Profibus IRQ */
501			MX6QDL_PAD_SD3_DAT6__GPIO6_IO18		0x1b0b0 /* FPGA IRQ */
502			MX6QDL_PAD_EIM_A23__GPIO6_IO06		0x1b0b0 /* spi bus #2 SS driver enable */
503			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0 /* RST_LOC# PHY reset input (has pull-down!)*/
504			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x1b0b0 /* USB_OTG_ID = GPIO1_24*/
505			MX6QDL_PAD_SD4_DAT1__GPIO2_IO09		0x1b0b0 /* Touchscreen IRQ */
506			MX6QDL_PAD_EIM_A22__GPIO2_IO16		0x1b0b0 /* PCIe reset */
507		>;
508	};
509
510	pinctrl_gpmi_nand: gpmi-nand {
511		fsl,pins = <
512			MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
513			MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
514			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
515			MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
516			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
517			MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
518			MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
519			MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
520			MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
521			MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
522			MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
523			MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
524			MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
525			MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
526			MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
527		>;
528	};
529
530	pinctrl_i2c1: i2c1grp {
531		fsl,pins = <
532			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
533			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
534		>;
535	};
536
537	pinctrl_i2c2: i2c2grp {
538		fsl,pins = <
539			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
540			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
541		>;
542	};
543
544	pinctrl_i2c3: i2c3grp {
545		fsl,pins = <
546			MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
547			MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
548		>;
549	};
550
551	pinctrl_i2c4: i2c4grp {
552		fsl,pins = <
553			MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
554			MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
555		>;
556	};
557
558	pinctrl_pwm1: pwm1grp {
559		fsl,pins = <
560			MX6QDL_PAD_GPIO_9__PWM1_OUT	0x1b0b0
561			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31	0x1b0b0 /* backlight enable */
562		>;
563	};
564
565	pinctrl_uart1: uart1grp {
566		fsl,pins = <
567			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
568			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
569			MX6QDL_PAD_EIM_D20__UART1_RTS_B		0x1b0b1
570			MX6QDL_PAD_EIM_D19__UART1_CTS_B		0x1b0b1
571		>;
572	};
573
574	pinctrl_uart2: uart2grp {
575		fsl,pins = <
576			MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
577			MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
578		>;
579	};
580
581	pinctrl_uart3: uart3grp {
582		fsl,pins = <
583			MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
584			MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
585			MX6QDL_PAD_EIM_D31__UART3_RTS_B	  0x1b0b1
586			MX6QDL_PAD_EIM_D23__UART3_CTS_B	  0x1b0b1
587		>;
588	};
589
590	pinctrl_uart4: uart4grp {
591		fsl,pins = <
592			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
593			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
594		>;
595	};
596
597	pinctrl_usbotg: usbotggrp {
598		fsl,pins = <
599			MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
600		>;
601	};
602
603	pinctrl_aristainetos2_usbh1_vbus: aristainetos-usbh1-vbus {
604		fsl,pins = <MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x130b0>;
605	};
606
607	pinctrl_aristainetos2_usbotg_vbus: aristainetos-usbotg-vbus {
608		fsl,pins = <MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0>;
609	};
610
611	pinctrl_usdhc1: usdhc1grp {
612		fsl,pins = <
613			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
614			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059
615			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
616			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
617			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
618			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
619			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x1b0b0 /* SD1 card detect input */
620			MX6QDL_PAD_DI0_PIN4__GPIO4_IO20		0x1b0b0 /* SD1 write protect input */
621		>;
622	};
623
624	pinctrl_usdhc2: usdhc2grp {
625		fsl,pins = <
626			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x71
627			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x71
628			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71
629			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71
630			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71
631			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71
632			MX6QDL_PAD_SD3_RST__GPIO7_IO08		0x1b0b0 /* SD2 level shifter output enable */
633			MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0 /* SD2 card detect input */
634			MX6QDL_PAD_SD4_DAT2__GPIO2_IO10		0x1b0b0 /* SD2 write protect input */
635		>;
636	};
637};
638