1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright 2013 Gateworks Corporation 4*f126890aSEmmanuel Vadot */ 5*f126890aSEmmanuel Vadot 6*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 7*f126890aSEmmanuel Vadot#include <dt-bindings/input/linux-event-codes.h> 8*f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 9*f126890aSEmmanuel Vadot 10*f126890aSEmmanuel Vadot/ { 11*f126890aSEmmanuel Vadot /* these are used by bootloader for disabling nodes */ 12*f126890aSEmmanuel Vadot aliases { 13*f126890aSEmmanuel Vadot led0 = &led0; 14*f126890aSEmmanuel Vadot led1 = &led1; 15*f126890aSEmmanuel Vadot nand = &gpmi; 16*f126890aSEmmanuel Vadot usb0 = &usbh1; 17*f126890aSEmmanuel Vadot usb1 = &usbotg; 18*f126890aSEmmanuel Vadot }; 19*f126890aSEmmanuel Vadot 20*f126890aSEmmanuel Vadot chosen { 21*f126890aSEmmanuel Vadot bootargs = "console=ttymxc1,115200"; 22*f126890aSEmmanuel Vadot }; 23*f126890aSEmmanuel Vadot 24*f126890aSEmmanuel Vadot gpio-keys { 25*f126890aSEmmanuel Vadot compatible = "gpio-keys"; 26*f126890aSEmmanuel Vadot 27*f126890aSEmmanuel Vadot user-pb { 28*f126890aSEmmanuel Vadot label = "user_pb"; 29*f126890aSEmmanuel Vadot gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; 30*f126890aSEmmanuel Vadot linux,code = <BTN_0>; 31*f126890aSEmmanuel Vadot }; 32*f126890aSEmmanuel Vadot 33*f126890aSEmmanuel Vadot user-pb1x { 34*f126890aSEmmanuel Vadot label = "user_pb1x"; 35*f126890aSEmmanuel Vadot linux,code = <BTN_1>; 36*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 37*f126890aSEmmanuel Vadot interrupts = <0>; 38*f126890aSEmmanuel Vadot }; 39*f126890aSEmmanuel Vadot 40*f126890aSEmmanuel Vadot key-erased { 41*f126890aSEmmanuel Vadot label = "key-erased"; 42*f126890aSEmmanuel Vadot linux,code = <BTN_2>; 43*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 44*f126890aSEmmanuel Vadot interrupts = <1>; 45*f126890aSEmmanuel Vadot }; 46*f126890aSEmmanuel Vadot 47*f126890aSEmmanuel Vadot eeprom-wp { 48*f126890aSEmmanuel Vadot label = "eeprom_wp"; 49*f126890aSEmmanuel Vadot linux,code = <BTN_3>; 50*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 51*f126890aSEmmanuel Vadot interrupts = <2>; 52*f126890aSEmmanuel Vadot }; 53*f126890aSEmmanuel Vadot 54*f126890aSEmmanuel Vadot tamper { 55*f126890aSEmmanuel Vadot label = "tamper"; 56*f126890aSEmmanuel Vadot linux,code = <BTN_4>; 57*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 58*f126890aSEmmanuel Vadot interrupts = <5>; 59*f126890aSEmmanuel Vadot }; 60*f126890aSEmmanuel Vadot 61*f126890aSEmmanuel Vadot switch-hold { 62*f126890aSEmmanuel Vadot label = "switch_hold"; 63*f126890aSEmmanuel Vadot linux,code = <BTN_5>; 64*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 65*f126890aSEmmanuel Vadot interrupts = <7>; 66*f126890aSEmmanuel Vadot }; 67*f126890aSEmmanuel Vadot }; 68*f126890aSEmmanuel Vadot 69*f126890aSEmmanuel Vadot leds { 70*f126890aSEmmanuel Vadot compatible = "gpio-leds"; 71*f126890aSEmmanuel Vadot pinctrl-names = "default"; 72*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpio_leds>; 73*f126890aSEmmanuel Vadot 74*f126890aSEmmanuel Vadot led0: led-user1 { 75*f126890aSEmmanuel Vadot label = "user1"; 76*f126890aSEmmanuel Vadot gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ 77*f126890aSEmmanuel Vadot default-state = "on"; 78*f126890aSEmmanuel Vadot linux,default-trigger = "heartbeat"; 79*f126890aSEmmanuel Vadot }; 80*f126890aSEmmanuel Vadot 81*f126890aSEmmanuel Vadot led1: led-user2 { 82*f126890aSEmmanuel Vadot label = "user2"; 83*f126890aSEmmanuel Vadot gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ 84*f126890aSEmmanuel Vadot default-state = "off"; 85*f126890aSEmmanuel Vadot }; 86*f126890aSEmmanuel Vadot }; 87*f126890aSEmmanuel Vadot 88*f126890aSEmmanuel Vadot memory@10000000 { 89*f126890aSEmmanuel Vadot device_type = "memory"; 90*f126890aSEmmanuel Vadot reg = <0x10000000 0x20000000>; 91*f126890aSEmmanuel Vadot }; 92*f126890aSEmmanuel Vadot 93*f126890aSEmmanuel Vadot pps { 94*f126890aSEmmanuel Vadot compatible = "pps-gpio"; 95*f126890aSEmmanuel Vadot pinctrl-names = "default"; 96*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pps>; 97*f126890aSEmmanuel Vadot gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 98*f126890aSEmmanuel Vadot status = "okay"; 99*f126890aSEmmanuel Vadot }; 100*f126890aSEmmanuel Vadot 101*f126890aSEmmanuel Vadot reg_3p3v: regulator-3p3v { 102*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 103*f126890aSEmmanuel Vadot regulator-name = "3P3V"; 104*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 105*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 106*f126890aSEmmanuel Vadot regulator-always-on; 107*f126890aSEmmanuel Vadot }; 108*f126890aSEmmanuel Vadot 109*f126890aSEmmanuel Vadot reg_5p0v: regulator-5p0v { 110*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 111*f126890aSEmmanuel Vadot regulator-name = "5P0V"; 112*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 113*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 114*f126890aSEmmanuel Vadot regulator-always-on; 115*f126890aSEmmanuel Vadot }; 116*f126890aSEmmanuel Vadot 117*f126890aSEmmanuel Vadot reg_usb_otg_vbus: regulator-usb-otg-vbus { 118*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 119*f126890aSEmmanuel Vadot regulator-name = "usb_otg_vbus"; 120*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 121*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 122*f126890aSEmmanuel Vadot gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 123*f126890aSEmmanuel Vadot enable-active-high; 124*f126890aSEmmanuel Vadot }; 125*f126890aSEmmanuel Vadot}; 126*f126890aSEmmanuel Vadot 127*f126890aSEmmanuel Vadot&fec { 128*f126890aSEmmanuel Vadot pinctrl-names = "default"; 129*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet>; 130*f126890aSEmmanuel Vadot phy-mode = "rgmii-id"; 131*f126890aSEmmanuel Vadot phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; 132*f126890aSEmmanuel Vadot status = "okay"; 133*f126890aSEmmanuel Vadot}; 134*f126890aSEmmanuel Vadot 135*f126890aSEmmanuel Vadot&gpmi { 136*f126890aSEmmanuel Vadot pinctrl-names = "default"; 137*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpmi_nand>; 138*f126890aSEmmanuel Vadot status = "okay"; 139*f126890aSEmmanuel Vadot}; 140*f126890aSEmmanuel Vadot 141*f126890aSEmmanuel Vadot&hdmi { 142*f126890aSEmmanuel Vadot ddc-i2c-bus = <&i2c3>; 143*f126890aSEmmanuel Vadot status = "okay"; 144*f126890aSEmmanuel Vadot}; 145*f126890aSEmmanuel Vadot 146*f126890aSEmmanuel Vadot&i2c1 { 147*f126890aSEmmanuel Vadot clock-frequency = <100000>; 148*f126890aSEmmanuel Vadot pinctrl-names = "default"; 149*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 150*f126890aSEmmanuel Vadot status = "okay"; 151*f126890aSEmmanuel Vadot 152*f126890aSEmmanuel Vadot gsc: gsc@20 { 153*f126890aSEmmanuel Vadot compatible = "gw,gsc"; 154*f126890aSEmmanuel Vadot reg = <0x20>; 155*f126890aSEmmanuel Vadot interrupt-parent = <&gpio1>; 156*f126890aSEmmanuel Vadot interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 157*f126890aSEmmanuel Vadot interrupt-controller; 158*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 159*f126890aSEmmanuel Vadot #size-cells = <0>; 160*f126890aSEmmanuel Vadot 161*f126890aSEmmanuel Vadot adc { 162*f126890aSEmmanuel Vadot compatible = "gw,gsc-adc"; 163*f126890aSEmmanuel Vadot #address-cells = <1>; 164*f126890aSEmmanuel Vadot #size-cells = <0>; 165*f126890aSEmmanuel Vadot 166*f126890aSEmmanuel Vadot channel@0 { 167*f126890aSEmmanuel Vadot gw,mode = <0>; 168*f126890aSEmmanuel Vadot reg = <0x00>; 169*f126890aSEmmanuel Vadot label = "temp"; 170*f126890aSEmmanuel Vadot }; 171*f126890aSEmmanuel Vadot 172*f126890aSEmmanuel Vadot channel@2 { 173*f126890aSEmmanuel Vadot gw,mode = <1>; 174*f126890aSEmmanuel Vadot reg = <0x02>; 175*f126890aSEmmanuel Vadot label = "vdd_vin"; 176*f126890aSEmmanuel Vadot }; 177*f126890aSEmmanuel Vadot 178*f126890aSEmmanuel Vadot channel@5 { 179*f126890aSEmmanuel Vadot gw,mode = <1>; 180*f126890aSEmmanuel Vadot reg = <0x05>; 181*f126890aSEmmanuel Vadot label = "vdd_3p3"; 182*f126890aSEmmanuel Vadot }; 183*f126890aSEmmanuel Vadot 184*f126890aSEmmanuel Vadot channel@8 { 185*f126890aSEmmanuel Vadot gw,mode = <1>; 186*f126890aSEmmanuel Vadot reg = <0x08>; 187*f126890aSEmmanuel Vadot label = "vdd_bat"; 188*f126890aSEmmanuel Vadot }; 189*f126890aSEmmanuel Vadot 190*f126890aSEmmanuel Vadot channel@b { 191*f126890aSEmmanuel Vadot gw,mode = <1>; 192*f126890aSEmmanuel Vadot reg = <0x0b>; 193*f126890aSEmmanuel Vadot label = "vdd_5p0"; 194*f126890aSEmmanuel Vadot }; 195*f126890aSEmmanuel Vadot 196*f126890aSEmmanuel Vadot channel@e { 197*f126890aSEmmanuel Vadot gw,mode = <1>; 198*f126890aSEmmanuel Vadot reg = <0xe>; 199*f126890aSEmmanuel Vadot label = "vdd_arm"; 200*f126890aSEmmanuel Vadot }; 201*f126890aSEmmanuel Vadot 202*f126890aSEmmanuel Vadot channel@11 { 203*f126890aSEmmanuel Vadot gw,mode = <1>; 204*f126890aSEmmanuel Vadot reg = <0x11>; 205*f126890aSEmmanuel Vadot label = "vdd_soc"; 206*f126890aSEmmanuel Vadot }; 207*f126890aSEmmanuel Vadot 208*f126890aSEmmanuel Vadot channel@14 { 209*f126890aSEmmanuel Vadot gw,mode = <1>; 210*f126890aSEmmanuel Vadot reg = <0x14>; 211*f126890aSEmmanuel Vadot label = "vdd_3p0"; 212*f126890aSEmmanuel Vadot }; 213*f126890aSEmmanuel Vadot 214*f126890aSEmmanuel Vadot channel@17 { 215*f126890aSEmmanuel Vadot gw,mode = <1>; 216*f126890aSEmmanuel Vadot reg = <0x17>; 217*f126890aSEmmanuel Vadot label = "vdd_1p5"; 218*f126890aSEmmanuel Vadot }; 219*f126890aSEmmanuel Vadot 220*f126890aSEmmanuel Vadot channel@1d { 221*f126890aSEmmanuel Vadot gw,mode = <1>; 222*f126890aSEmmanuel Vadot reg = <0x1d>; 223*f126890aSEmmanuel Vadot label = "vdd_1p8"; 224*f126890aSEmmanuel Vadot }; 225*f126890aSEmmanuel Vadot 226*f126890aSEmmanuel Vadot channel@20 { 227*f126890aSEmmanuel Vadot gw,mode = <1>; 228*f126890aSEmmanuel Vadot reg = <0x20>; 229*f126890aSEmmanuel Vadot label = "vdd_an1"; 230*f126890aSEmmanuel Vadot }; 231*f126890aSEmmanuel Vadot 232*f126890aSEmmanuel Vadot channel@23 { 233*f126890aSEmmanuel Vadot gw,mode = <1>; 234*f126890aSEmmanuel Vadot reg = <0x23>; 235*f126890aSEmmanuel Vadot label = "vdd_2p5"; 236*f126890aSEmmanuel Vadot }; 237*f126890aSEmmanuel Vadot }; 238*f126890aSEmmanuel Vadot }; 239*f126890aSEmmanuel Vadot 240*f126890aSEmmanuel Vadot gsc_gpio: gpio@23 { 241*f126890aSEmmanuel Vadot compatible = "nxp,pca9555"; 242*f126890aSEmmanuel Vadot reg = <0x23>; 243*f126890aSEmmanuel Vadot gpio-controller; 244*f126890aSEmmanuel Vadot #gpio-cells = <2>; 245*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 246*f126890aSEmmanuel Vadot interrupts = <4>; 247*f126890aSEmmanuel Vadot }; 248*f126890aSEmmanuel Vadot 249*f126890aSEmmanuel Vadot eeprom1: eeprom@50 { 250*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 251*f126890aSEmmanuel Vadot reg = <0x50>; 252*f126890aSEmmanuel Vadot pagesize = <16>; 253*f126890aSEmmanuel Vadot }; 254*f126890aSEmmanuel Vadot 255*f126890aSEmmanuel Vadot eeprom2: eeprom@51 { 256*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 257*f126890aSEmmanuel Vadot reg = <0x51>; 258*f126890aSEmmanuel Vadot pagesize = <16>; 259*f126890aSEmmanuel Vadot }; 260*f126890aSEmmanuel Vadot 261*f126890aSEmmanuel Vadot eeprom3: eeprom@52 { 262*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 263*f126890aSEmmanuel Vadot reg = <0x52>; 264*f126890aSEmmanuel Vadot pagesize = <16>; 265*f126890aSEmmanuel Vadot }; 266*f126890aSEmmanuel Vadot 267*f126890aSEmmanuel Vadot eeprom4: eeprom@53 { 268*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 269*f126890aSEmmanuel Vadot reg = <0x53>; 270*f126890aSEmmanuel Vadot pagesize = <16>; 271*f126890aSEmmanuel Vadot }; 272*f126890aSEmmanuel Vadot 273*f126890aSEmmanuel Vadot rtc: ds1672@68 { 274*f126890aSEmmanuel Vadot compatible = "dallas,ds1672"; 275*f126890aSEmmanuel Vadot reg = <0x68>; 276*f126890aSEmmanuel Vadot }; 277*f126890aSEmmanuel Vadot}; 278*f126890aSEmmanuel Vadot 279*f126890aSEmmanuel Vadot&i2c2 { 280*f126890aSEmmanuel Vadot clock-frequency = <100000>; 281*f126890aSEmmanuel Vadot pinctrl-names = "default"; 282*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 283*f126890aSEmmanuel Vadot status = "okay"; 284*f126890aSEmmanuel Vadot 285*f126890aSEmmanuel Vadot ltc3676: pmic@3c { 286*f126890aSEmmanuel Vadot compatible = "lltc,ltc3676"; 287*f126890aSEmmanuel Vadot reg = <0x3c>; 288*f126890aSEmmanuel Vadot pinctrl-names = "default"; 289*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pmic>; 290*f126890aSEmmanuel Vadot interrupt-parent = <&gpio1>; 291*f126890aSEmmanuel Vadot interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 292*f126890aSEmmanuel Vadot 293*f126890aSEmmanuel Vadot regulators { 294*f126890aSEmmanuel Vadot /* VDD_SOC (1+R1/R2 = 1.635) */ 295*f126890aSEmmanuel Vadot reg_vdd_soc: sw1 { 296*f126890aSEmmanuel Vadot regulator-name = "vddsoc"; 297*f126890aSEmmanuel Vadot regulator-min-microvolt = <674400>; 298*f126890aSEmmanuel Vadot regulator-max-microvolt = <1308000>; 299*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <127000 200000>; 300*f126890aSEmmanuel Vadot regulator-ramp-delay = <7000>; 301*f126890aSEmmanuel Vadot regulator-boot-on; 302*f126890aSEmmanuel Vadot regulator-always-on; 303*f126890aSEmmanuel Vadot }; 304*f126890aSEmmanuel Vadot 305*f126890aSEmmanuel Vadot /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */ 306*f126890aSEmmanuel Vadot reg_1p8v: sw2 { 307*f126890aSEmmanuel Vadot regulator-name = "vdd1p8"; 308*f126890aSEmmanuel Vadot regulator-min-microvolt = <1033310>; 309*f126890aSEmmanuel Vadot regulator-max-microvolt = <2004000>; 310*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <301000 200000>; 311*f126890aSEmmanuel Vadot regulator-ramp-delay = <7000>; 312*f126890aSEmmanuel Vadot regulator-boot-on; 313*f126890aSEmmanuel Vadot regulator-always-on; 314*f126890aSEmmanuel Vadot }; 315*f126890aSEmmanuel Vadot 316*f126890aSEmmanuel Vadot /* VDD_ARM (1+R1/R2 = 1.635) */ 317*f126890aSEmmanuel Vadot reg_vdd_arm: sw3 { 318*f126890aSEmmanuel Vadot regulator-name = "vddarm"; 319*f126890aSEmmanuel Vadot regulator-min-microvolt = <674400>; 320*f126890aSEmmanuel Vadot regulator-max-microvolt = <1308000>; 321*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <127000 200000>; 322*f126890aSEmmanuel Vadot regulator-ramp-delay = <7000>; 323*f126890aSEmmanuel Vadot regulator-boot-on; 324*f126890aSEmmanuel Vadot regulator-always-on; 325*f126890aSEmmanuel Vadot }; 326*f126890aSEmmanuel Vadot 327*f126890aSEmmanuel Vadot /* VDD_DDR (1+R1/R2 = 2.105) */ 328*f126890aSEmmanuel Vadot reg_vdd_ddr: sw4 { 329*f126890aSEmmanuel Vadot regulator-name = "vddddr"; 330*f126890aSEmmanuel Vadot regulator-min-microvolt = <868310>; 331*f126890aSEmmanuel Vadot regulator-max-microvolt = <1684000>; 332*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <221000 200000>; 333*f126890aSEmmanuel Vadot regulator-ramp-delay = <7000>; 334*f126890aSEmmanuel Vadot regulator-boot-on; 335*f126890aSEmmanuel Vadot regulator-always-on; 336*f126890aSEmmanuel Vadot }; 337*f126890aSEmmanuel Vadot 338*f126890aSEmmanuel Vadot /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */ 339*f126890aSEmmanuel Vadot reg_2p5v: ldo2 { 340*f126890aSEmmanuel Vadot regulator-name = "vdd2p5"; 341*f126890aSEmmanuel Vadot regulator-min-microvolt = <2490375>; 342*f126890aSEmmanuel Vadot regulator-max-microvolt = <2490375>; 343*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <487000 200000>; 344*f126890aSEmmanuel Vadot regulator-boot-on; 345*f126890aSEmmanuel Vadot regulator-always-on; 346*f126890aSEmmanuel Vadot }; 347*f126890aSEmmanuel Vadot 348*f126890aSEmmanuel Vadot /* VDD_HIGH (1+R1/R2 = 4.17) */ 349*f126890aSEmmanuel Vadot reg_3p0v: ldo4 { 350*f126890aSEmmanuel Vadot regulator-name = "vdd3p0"; 351*f126890aSEmmanuel Vadot regulator-min-microvolt = <3023250>; 352*f126890aSEmmanuel Vadot regulator-max-microvolt = <3023250>; 353*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <634000 200000>; 354*f126890aSEmmanuel Vadot regulator-boot-on; 355*f126890aSEmmanuel Vadot regulator-always-on; 356*f126890aSEmmanuel Vadot }; 357*f126890aSEmmanuel Vadot }; 358*f126890aSEmmanuel Vadot }; 359*f126890aSEmmanuel Vadot}; 360*f126890aSEmmanuel Vadot 361*f126890aSEmmanuel Vadot&i2c3 { 362*f126890aSEmmanuel Vadot clock-frequency = <100000>; 363*f126890aSEmmanuel Vadot pinctrl-names = "default"; 364*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c3>; 365*f126890aSEmmanuel Vadot status = "okay"; 366*f126890aSEmmanuel Vadot 367*f126890aSEmmanuel Vadot adv7180: camera@20 { 368*f126890aSEmmanuel Vadot compatible = "adi,adv7180"; 369*f126890aSEmmanuel Vadot pinctrl-names = "default"; 370*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_adv7180>; 371*f126890aSEmmanuel Vadot reg = <0x20>; 372*f126890aSEmmanuel Vadot powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; 373*f126890aSEmmanuel Vadot interrupt-parent = <&gpio5>; 374*f126890aSEmmanuel Vadot interrupts = <23 IRQ_TYPE_LEVEL_LOW>; 375*f126890aSEmmanuel Vadot 376*f126890aSEmmanuel Vadot port { 377*f126890aSEmmanuel Vadot adv7180_to_ipu1_csi0_mux: endpoint { 378*f126890aSEmmanuel Vadot remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; 379*f126890aSEmmanuel Vadot bus-width = <8>; 380*f126890aSEmmanuel Vadot }; 381*f126890aSEmmanuel Vadot }; 382*f126890aSEmmanuel Vadot }; 383*f126890aSEmmanuel Vadot}; 384*f126890aSEmmanuel Vadot 385*f126890aSEmmanuel Vadot&ipu1_csi0_from_ipu1_csi0_mux { 386*f126890aSEmmanuel Vadot bus-width = <8>; 387*f126890aSEmmanuel Vadot}; 388*f126890aSEmmanuel Vadot 389*f126890aSEmmanuel Vadot&ipu1_csi0_mux_from_parallel_sensor { 390*f126890aSEmmanuel Vadot remote-endpoint = <&adv7180_to_ipu1_csi0_mux>; 391*f126890aSEmmanuel Vadot bus-width = <8>; 392*f126890aSEmmanuel Vadot}; 393*f126890aSEmmanuel Vadot 394*f126890aSEmmanuel Vadot&ipu1_csi0 { 395*f126890aSEmmanuel Vadot pinctrl-names = "default"; 396*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ipu1_csi0>; 397*f126890aSEmmanuel Vadot}; 398*f126890aSEmmanuel Vadot 399*f126890aSEmmanuel Vadot&pcie { 400*f126890aSEmmanuel Vadot pinctrl-names = "default"; 401*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pcie>; 402*f126890aSEmmanuel Vadot reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; 403*f126890aSEmmanuel Vadot status = "okay"; 404*f126890aSEmmanuel Vadot}; 405*f126890aSEmmanuel Vadot 406*f126890aSEmmanuel Vadot&pwm2 { 407*f126890aSEmmanuel Vadot pinctrl-names = "default"; 408*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 409*f126890aSEmmanuel Vadot status = "disabled"; 410*f126890aSEmmanuel Vadot}; 411*f126890aSEmmanuel Vadot 412*f126890aSEmmanuel Vadot&pwm3 { 413*f126890aSEmmanuel Vadot pinctrl-names = "default"; 414*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 415*f126890aSEmmanuel Vadot status = "disabled"; 416*f126890aSEmmanuel Vadot}; 417*f126890aSEmmanuel Vadot 418*f126890aSEmmanuel Vadot&pwm4 { 419*f126890aSEmmanuel Vadot pinctrl-names = "default"; 420*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ 421*f126890aSEmmanuel Vadot status = "disabled"; 422*f126890aSEmmanuel Vadot}; 423*f126890aSEmmanuel Vadot 424*f126890aSEmmanuel Vadot&uart1 { 425*f126890aSEmmanuel Vadot pinctrl-names = "default"; 426*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart1>; 427*f126890aSEmmanuel Vadot status = "okay"; 428*f126890aSEmmanuel Vadot}; 429*f126890aSEmmanuel Vadot 430*f126890aSEmmanuel Vadot&uart2 { 431*f126890aSEmmanuel Vadot pinctrl-names = "default"; 432*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 433*f126890aSEmmanuel Vadot status = "okay"; 434*f126890aSEmmanuel Vadot}; 435*f126890aSEmmanuel Vadot 436*f126890aSEmmanuel Vadot&uart3 { 437*f126890aSEmmanuel Vadot pinctrl-names = "default"; 438*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart3>; 439*f126890aSEmmanuel Vadot status = "okay"; 440*f126890aSEmmanuel Vadot}; 441*f126890aSEmmanuel Vadot 442*f126890aSEmmanuel Vadot&uart5 { 443*f126890aSEmmanuel Vadot pinctrl-names = "default"; 444*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart5>; 445*f126890aSEmmanuel Vadot status = "okay"; 446*f126890aSEmmanuel Vadot}; 447*f126890aSEmmanuel Vadot 448*f126890aSEmmanuel Vadot&usbotg { 449*f126890aSEmmanuel Vadot vbus-supply = <®_usb_otg_vbus>; 450*f126890aSEmmanuel Vadot pinctrl-names = "default"; 451*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbotg>; 452*f126890aSEmmanuel Vadot disable-over-current; 453*f126890aSEmmanuel Vadot status = "okay"; 454*f126890aSEmmanuel Vadot}; 455*f126890aSEmmanuel Vadot 456*f126890aSEmmanuel Vadot&usbh1 { 457*f126890aSEmmanuel Vadot status = "okay"; 458*f126890aSEmmanuel Vadot}; 459*f126890aSEmmanuel Vadot 460*f126890aSEmmanuel Vadot&wdog1 { 461*f126890aSEmmanuel Vadot pinctrl-names = "default"; 462*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_wdog>; 463*f126890aSEmmanuel Vadot fsl,ext-reset-output; 464*f126890aSEmmanuel Vadot}; 465*f126890aSEmmanuel Vadot 466*f126890aSEmmanuel Vadot&iomuxc { 467*f126890aSEmmanuel Vadot pinctrl_adv7180: adv7180grp { 468*f126890aSEmmanuel Vadot fsl,pins = < 469*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0 470*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0 471*f126890aSEmmanuel Vadot >; 472*f126890aSEmmanuel Vadot }; 473*f126890aSEmmanuel Vadot 474*f126890aSEmmanuel Vadot pinctrl_enet: enetgrp { 475*f126890aSEmmanuel Vadot fsl,pins = < 476*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 477*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 478*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 479*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 480*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 481*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 482*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 483*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 484*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 485*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 486*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 487*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 488*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 489*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 490*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 491*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 492*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */ 493*f126890aSEmmanuel Vadot >; 494*f126890aSEmmanuel Vadot }; 495*f126890aSEmmanuel Vadot 496*f126890aSEmmanuel Vadot pinctrl_gpio_leds: gpioledsgrp { 497*f126890aSEmmanuel Vadot fsl,pins = < 498*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 499*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 500*f126890aSEmmanuel Vadot >; 501*f126890aSEmmanuel Vadot }; 502*f126890aSEmmanuel Vadot 503*f126890aSEmmanuel Vadot pinctrl_gpmi_nand: gpminandgrp { 504*f126890aSEmmanuel Vadot fsl,pins = < 505*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 506*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 507*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 508*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 509*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 510*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 511*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 512*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 513*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 514*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 515*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 516*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 517*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 518*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 519*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 520*f126890aSEmmanuel Vadot >; 521*f126890aSEmmanuel Vadot }; 522*f126890aSEmmanuel Vadot 523*f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 524*f126890aSEmmanuel Vadot fsl,pins = < 525*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 526*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 527*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */ 528*f126890aSEmmanuel Vadot >; 529*f126890aSEmmanuel Vadot }; 530*f126890aSEmmanuel Vadot 531*f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 532*f126890aSEmmanuel Vadot fsl,pins = < 533*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 534*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 535*f126890aSEmmanuel Vadot >; 536*f126890aSEmmanuel Vadot }; 537*f126890aSEmmanuel Vadot 538*f126890aSEmmanuel Vadot pinctrl_i2c3: i2c3grp { 539*f126890aSEmmanuel Vadot fsl,pins = < 540*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 541*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 542*f126890aSEmmanuel Vadot >; 543*f126890aSEmmanuel Vadot }; 544*f126890aSEmmanuel Vadot 545*f126890aSEmmanuel Vadot pinctrl_ipu1_csi0: ipu1csi0grp { 546*f126890aSEmmanuel Vadot fsl,pins = < 547*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 548*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 549*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 550*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 551*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 552*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 553*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 554*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 555*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 556*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 557*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 558*f126890aSEmmanuel Vadot >; 559*f126890aSEmmanuel Vadot }; 560*f126890aSEmmanuel Vadot 561*f126890aSEmmanuel Vadot pinctrl_pcie: pciegrp { 562*f126890aSEmmanuel Vadot fsl,pins = < 563*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 564*f126890aSEmmanuel Vadot >; 565*f126890aSEmmanuel Vadot }; 566*f126890aSEmmanuel Vadot 567*f126890aSEmmanuel Vadot pinctrl_pmic: pmicgrp { 568*f126890aSEmmanuel Vadot fsl,pins = < 569*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ 570*f126890aSEmmanuel Vadot >; 571*f126890aSEmmanuel Vadot }; 572*f126890aSEmmanuel Vadot 573*f126890aSEmmanuel Vadot pinctrl_pps: ppsgrp { 574*f126890aSEmmanuel Vadot fsl,pins = < 575*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 576*f126890aSEmmanuel Vadot >; 577*f126890aSEmmanuel Vadot }; 578*f126890aSEmmanuel Vadot 579*f126890aSEmmanuel Vadot pinctrl_pwm2: pwm2grp { 580*f126890aSEmmanuel Vadot fsl,pins = < 581*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 582*f126890aSEmmanuel Vadot >; 583*f126890aSEmmanuel Vadot }; 584*f126890aSEmmanuel Vadot 585*f126890aSEmmanuel Vadot pinctrl_pwm3: pwm3grp { 586*f126890aSEmmanuel Vadot fsl,pins = < 587*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 588*f126890aSEmmanuel Vadot >; 589*f126890aSEmmanuel Vadot }; 590*f126890aSEmmanuel Vadot 591*f126890aSEmmanuel Vadot pinctrl_pwm4: pwm4grp { 592*f126890aSEmmanuel Vadot fsl,pins = < 593*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 594*f126890aSEmmanuel Vadot >; 595*f126890aSEmmanuel Vadot }; 596*f126890aSEmmanuel Vadot 597*f126890aSEmmanuel Vadot pinctrl_uart1: uart1grp { 598*f126890aSEmmanuel Vadot fsl,pins = < 599*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 600*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 601*f126890aSEmmanuel Vadot >; 602*f126890aSEmmanuel Vadot }; 603*f126890aSEmmanuel Vadot 604*f126890aSEmmanuel Vadot pinctrl_uart2: uart2grp { 605*f126890aSEmmanuel Vadot fsl,pins = < 606*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 607*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 608*f126890aSEmmanuel Vadot >; 609*f126890aSEmmanuel Vadot }; 610*f126890aSEmmanuel Vadot 611*f126890aSEmmanuel Vadot pinctrl_uart3: uart3grp { 612*f126890aSEmmanuel Vadot fsl,pins = < 613*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 614*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 615*f126890aSEmmanuel Vadot >; 616*f126890aSEmmanuel Vadot }; 617*f126890aSEmmanuel Vadot 618*f126890aSEmmanuel Vadot pinctrl_uart5: uart5grp { 619*f126890aSEmmanuel Vadot fsl,pins = < 620*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 621*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 622*f126890aSEmmanuel Vadot >; 623*f126890aSEmmanuel Vadot }; 624*f126890aSEmmanuel Vadot 625*f126890aSEmmanuel Vadot pinctrl_usbotg: usbotggrp { 626*f126890aSEmmanuel Vadot fsl,pins = < 627*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 628*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */ 629*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059 630*f126890aSEmmanuel Vadot >; 631*f126890aSEmmanuel Vadot }; 632*f126890aSEmmanuel Vadot 633*f126890aSEmmanuel Vadot pinctrl_wdog: wdoggrp { 634*f126890aSEmmanuel Vadot fsl,pins = < 635*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 636*f126890aSEmmanuel Vadot >; 637*f126890aSEmmanuel Vadot }; 638*f126890aSEmmanuel Vadot}; 639