1// SPDX-License-Identifier: (GPL-2.0)
2/*
3 * Device tree for the Kobo Libra H2O ebook reader
4 *
5 * Name on mainboard is: 37NB-E70K0M+6A3
6 * Serials start with: E70K02 (a number also seen in
7 * vendor kernel sources)
8 *
9 * This mainboard seems to be equipped with different SoCs.
10 * In the Kobo Libra H2O ebook reader it is an i.MX6SLL
11 *
12 * Copyright 2021 Andreas Kemnade
13 * based on works
14 * Copyright 2016 Freescale Semiconductor, Inc.
15 */
16
17/dts-v1/;
18
19#include <dt-bindings/input/input.h>
20#include <dt-bindings/gpio/gpio.h>
21#include "imx6sll.dtsi"
22#include "e70k02.dtsi"
23
24/ {
25	model = "Kobo Libra H2O";
26	compatible = "kobo,librah2o", "fsl,imx6sll";
27};
28
29&clks {
30	assigned-clocks = <&clks IMX6SLL_CLK_PLL4_AUDIO_DIV>;
31	assigned-clock-rates = <393216000>;
32};
33
34&cpu0 {
35	arm-supply = <&dcdc3_reg>;
36	soc-supply = <&dcdc1_reg>;
37};
38
39&gpio_keys {
40	pinctrl-names = "default";
41	pinctrl-0 = <&pinctrl_gpio_keys>;
42};
43
44&i2c1 {
45	pinctrl-names = "default","sleep";
46	pinctrl-0 = <&pinctrl_i2c1>;
47	pinctrl-1 = <&pinctrl_i2c1_sleep>;
48};
49
50&i2c2 {
51	pinctrl-names = "default","sleep";
52	pinctrl-0 = <&pinctrl_i2c2>;
53	pinctrl-1 = <&pinctrl_i2c2_sleep>;
54};
55
56&i2c3 {
57	pinctrl-names = "default";
58	pinctrl-0 = <&pinctrl_i2c3>;
59};
60
61&iomuxc {
62	pinctrl-names = "default";
63	pinctrl-0 = <&pinctrl_hog>;
64
65	pinctrl_cyttsp5_gpio: cyttsp5-gpiogrp {
66		fsl,pins = <
67			MX6SLL_PAD_GPIO4_IO24__GPIO4_IO24	0x17059 /* TP_INT */
68			MX6SLL_PAD_GPIO4_IO18__GPIO4_IO18	0x10059 /* TP_RST */
69		>;
70	};
71
72	pinctrl_gpio_keys: gpio-keysgrp {
73		fsl,pins = <
74			MX6SLL_PAD_GPIO4_IO25__GPIO4_IO25	0x17059	/* PWR_SW */
75			MX6SLL_PAD_GPIO4_IO23__GPIO4_IO23	0x17059	/* HALL_EN */
76			MX6SLL_PAD_KEY_COL4__GPIO4_IO00		0x17059	/* PAGE_UP */
77			MX6SLL_PAD_KEY_COL5__GPIO4_IO02		0x17059	/* PAGE_DOWN */
78		>;
79	};
80
81	pinctrl_hog: hoggrp {
82		fsl,pins = <
83			MX6SLL_PAD_LCD_DATA01__GPIO2_IO21	0x79
84			MX6SLL_PAD_LCD_DATA04__GPIO2_IO24	0x79
85			MX6SLL_PAD_LCD_DATA05__GPIO2_IO25	0x79
86			MX6SLL_PAD_LCD_DATA06__GPIO2_IO26	0x79
87			MX6SLL_PAD_LCD_DATA07__GPIO2_IO27	0x79
88			MX6SLL_PAD_LCD_DATA08__GPIO2_IO28	0x79
89			MX6SLL_PAD_LCD_DATA09__GPIO2_IO29	0x79
90			MX6SLL_PAD_LCD_DATA10__GPIO2_IO30	0x79
91			MX6SLL_PAD_LCD_DATA11__GPIO2_IO31	0x79
92			MX6SLL_PAD_LCD_DATA12__GPIO3_IO00	0x79
93			MX6SLL_PAD_LCD_DATA13__GPIO3_IO01	0x79
94			MX6SLL_PAD_LCD_DATA14__GPIO3_IO02	0x79
95			MX6SLL_PAD_LCD_DATA15__GPIO3_IO03	0x79
96			MX6SLL_PAD_LCD_DATA16__GPIO3_IO04	0x79
97			MX6SLL_PAD_LCD_DATA17__GPIO3_IO05	0x79
98			MX6SLL_PAD_LCD_DATA18__GPIO3_IO06	0x79
99			MX6SLL_PAD_LCD_DATA19__GPIO3_IO07	0x79
100			MX6SLL_PAD_LCD_DATA20__GPIO3_IO08	0x79
101			MX6SLL_PAD_LCD_DATA21__GPIO3_IO09	0x79
102			MX6SLL_PAD_LCD_DATA22__GPIO3_IO10	0x79
103			MX6SLL_PAD_LCD_DATA23__GPIO3_IO11	0x79
104			MX6SLL_PAD_LCD_CLK__GPIO2_IO15		0x79
105			MX6SLL_PAD_LCD_ENABLE__GPIO2_IO16	0x79
106			MX6SLL_PAD_LCD_HSYNC__GPIO2_IO17	0x79
107			MX6SLL_PAD_LCD_VSYNC__GPIO2_IO18	0x79
108			MX6SLL_PAD_LCD_RESET__GPIO2_IO19	0x79
109			MX6SLL_PAD_GPIO4_IO21__GPIO4_IO21	0x79
110			MX6SLL_PAD_GPIO4_IO26__GPIO4_IO26	0x79
111			MX6SLL_PAD_KEY_COL3__GPIO3_IO30		0x79
112			MX6SLL_PAD_KEY_ROW7__GPIO4_IO07		0x79
113			MX6SLL_PAD_ECSPI2_MOSI__GPIO4_IO13	0x79
114		>;
115	};
116
117	pinctrl_i2c1: i2c1grp {
118		fsl,pins = <
119			MX6SLL_PAD_I2C1_SCL__I2C1_SCL   0x4001f8b1
120			MX6SLL_PAD_I2C1_SDA__I2C1_SDA   0x4001f8b1
121		>;
122	};
123
124	pinctrl_i2c1_sleep: i2c1grp-sleep {
125		fsl,pins = <
126			MX6SLL_PAD_I2C1_SCL__I2C1_SCL   0x400108b1
127			MX6SLL_PAD_I2C1_SDA__I2C1_SDA   0x400108b1
128		>;
129	};
130
131	pinctrl_i2c2: i2c2grp {
132		fsl,pins = <
133			MX6SLL_PAD_I2C2_SCL__I2C2_SCL   0x4001f8b1
134			MX6SLL_PAD_I2C2_SDA__I2C2_SDA   0x4001f8b1
135		>;
136	};
137
138	pinctrl_i2c2_sleep: i2c2grp-sleep {
139		fsl,pins = <
140			MX6SLL_PAD_I2C2_SCL__I2C2_SCL   0x400108b1
141			MX6SLL_PAD_I2C2_SDA__I2C2_SDA   0x400108b1
142		>;
143	};
144
145	pinctrl_i2c3: i2c3grp {
146		fsl,pins = <
147			MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1
148			MX6SLL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1
149		>;
150	};
151
152	pinctrl_led: ledgrp {
153		fsl,pins = <
154			MX6SLL_PAD_GPIO4_IO17__GPIO4_IO17	0x10059
155		>;
156	};
157
158	pinctrl_lm3630a_bl_gpio: lm3630a-bl-gpiogrp {
159		fsl,pins = <
160			MX6SLL_PAD_EPDC_PWR_CTRL3__GPIO2_IO10   0x10059 /* HWEN */
161		>;
162	};
163
164	pinctrl_ricoh_gpio: ricoh-gpiogrp {
165		fsl,pins = <
166			MX6SLL_PAD_GPIO4_IO20__GPIO4_IO20	0x1b8b1 /* ricoh619 chg */
167			MX6SLL_PAD_GPIO4_IO19__GPIO4_IO19	0x1b8b1 /* ricoh619 irq */
168			MX6SLL_PAD_KEY_COL2__GPIO3_IO28		0x1b8b1 /* ricoh619 bat_low_int */
169		>;
170	};
171
172	pinctrl_uart1: uart1grp {
173		fsl,pins = <
174			MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
175			MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1
176		>;
177	};
178
179	pinctrl_usbotg1: usbotg1grp {
180		fsl,pins = <
181			MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
182		>;
183	};
184
185	pinctrl_usdhc1: usdhc1grp {
186		fsl,pins = <
187			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x17059
188			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x17059
189			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x17059
190			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x17059
191			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x17059
192			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x17059
193			MX6SLL_PAD_SD1_DATA4__SD1_DATA4	0x17059
194			MX6SLL_PAD_SD1_DATA5__SD1_DATA5	0x17059
195			MX6SLL_PAD_SD1_DATA6__SD1_DATA6	0x17059
196			MX6SLL_PAD_SD1_DATA7__SD1_DATA7	0x17059
197		>;
198	};
199
200	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
201		fsl,pins = <
202			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170b9
203			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x170b9
204			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170b9
205			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170b9
206			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170b9
207			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170b9
208			MX6SLL_PAD_SD1_DATA4__SD1_DATA4	0x170b9
209			MX6SLL_PAD_SD1_DATA5__SD1_DATA5	0x170b9
210			MX6SLL_PAD_SD1_DATA6__SD1_DATA6	0x170b9
211			MX6SLL_PAD_SD1_DATA7__SD1_DATA7	0x170b9
212		>;
213	};
214
215	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
216		fsl,pins = <
217			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170f9
218			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x170f9
219			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170f9
220			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170f9
221			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170f9
222			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170f9
223			MX6SLL_PAD_SD1_DATA4__SD1_DATA4	0x170b9
224			MX6SLL_PAD_SD1_DATA5__SD1_DATA5	0x170b9
225			MX6SLL_PAD_SD1_DATA6__SD1_DATA6	0x170b9
226			MX6SLL_PAD_SD1_DATA7__SD1_DATA7	0x170b9
227		>;
228	};
229
230	pinctrl_usdhc1_sleep: usdhc1-sleepgrp {
231		fsl,pins = <
232			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x10059
233			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x10059
234			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x10059
235			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x10059
236			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x10059
237			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x10059
238			MX6SLL_PAD_SD1_DATA4__SD1_DATA4	0x10059
239			MX6SLL_PAD_SD1_DATA5__SD1_DATA5	0x10059
240			MX6SLL_PAD_SD1_DATA6__SD1_DATA6	0x10059
241			MX6SLL_PAD_SD1_DATA7__SD1_DATA7	0x10059
242		>;
243	};
244
245	pinctrl_usdhc3: usdhc3grp {
246		fsl,pins = <
247			MX6SLL_PAD_SD3_CMD__SD3_CMD	0x11059
248			MX6SLL_PAD_SD3_CLK__SD3_CLK	0x11059
249			MX6SLL_PAD_SD3_DATA0__SD3_DATA0	0x11059
250			MX6SLL_PAD_SD3_DATA1__SD3_DATA1	0x11059
251			MX6SLL_PAD_SD3_DATA2__SD3_DATA2	0x11059
252			MX6SLL_PAD_SD3_DATA3__SD3_DATA3	0x11059
253		>;
254	};
255
256	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
257		fsl,pins = <
258			MX6SLL_PAD_SD3_CMD__SD3_CMD	0x170b9
259			MX6SLL_PAD_SD3_CLK__SD3_CLK	0x170b9
260			MX6SLL_PAD_SD3_DATA0__SD3_DATA0	0x170b9
261			MX6SLL_PAD_SD3_DATA1__SD3_DATA1	0x170b9
262			MX6SLL_PAD_SD3_DATA2__SD3_DATA2	0x170b9
263			MX6SLL_PAD_SD3_DATA3__SD3_DATA3	0x170b9
264		>;
265	};
266
267	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
268		fsl,pins = <
269			MX6SLL_PAD_SD3_CMD__SD3_CMD	0x170f9
270			MX6SLL_PAD_SD3_CLK__SD3_CLK	0x170f9
271			MX6SLL_PAD_SD3_DATA0__SD3_DATA0	0x170f9
272			MX6SLL_PAD_SD3_DATA1__SD3_DATA1	0x170f9
273			MX6SLL_PAD_SD3_DATA2__SD3_DATA2	0x170f9
274			MX6SLL_PAD_SD3_DATA3__SD3_DATA3	0x170f9
275		>;
276	};
277
278	pinctrl_usdhc3_sleep: usdhc3-sleepgrp {
279		fsl,pins = <
280			MX6SLL_PAD_SD3_CMD__GPIO5_IO21	0x100c1
281			MX6SLL_PAD_SD3_CLK__GPIO5_IO18	0x100c1
282			MX6SLL_PAD_SD3_DATA0__GPIO5_IO19	0x100c1
283			MX6SLL_PAD_SD3_DATA1__GPIO5_IO20	0x100c1
284			MX6SLL_PAD_SD3_DATA2__GPIO5_IO16	0x100c1
285			MX6SLL_PAD_SD3_DATA3__GPIO5_IO17	0x100c1
286		>;
287	};
288
289	pinctrl_wifi_power: wifi-powergrp {
290		fsl,pins = <
291			MX6SLL_PAD_SD2_DATA6__GPIO4_IO29	0x10059	 /* WIFI_3V3_ON */
292		>;
293	};
294
295	pinctrl_wifi_reset: wifi-resetgrp {
296		fsl,pins = <
297			MX6SLL_PAD_SD2_DATA7__GPIO5_IO00	0x10059	 /* WIFI_RST */
298		>;
299	};
300};
301
302&leds {
303	pinctrl-names = "default";
304	pinctrl-0 = <&pinctrl_led>;
305};
306
307&lm3630a {
308	pinctrl-names = "default";
309	pinctrl-0 = <&pinctrl_lm3630a_bl_gpio>;
310};
311
312&reg_wifi {
313	pinctrl-names = "default";
314	pinctrl-0 = <&pinctrl_wifi_power>;
315};
316
317&ricoh619 {
318	pinctrl-names = "default";
319	pinctrl-0 = <&pinctrl_ricoh_gpio>;
320};
321
322&uart1 {
323	pinctrl-names = "default";
324	pinctrl-0 = <&pinctrl_uart1>;
325};
326
327&usdhc1 {
328	pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";
329	pinctrl-0 = <&pinctrl_usdhc1>;
330	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
331	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
332	pinctrl-3 = <&pinctrl_usdhc1_sleep>;
333};
334
335&usdhc3 {
336	pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";
337	pinctrl-0 = <&pinctrl_usdhc3>;
338	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
339	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
340	pinctrl-3 = <&pinctrl_usdhc3_sleep>;
341};
342
343&wifi_pwrseq {
344	pinctrl-names = "default";
345	pinctrl-0 = <&pinctrl_wifi_reset>;
346};
347