1f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2f126890aSEmmanuel Vadot//
3f126890aSEmmanuel Vadot// Copyright 2015 Technexion Ltd.
4f126890aSEmmanuel Vadot//
5f126890aSEmmanuel Vadot// Author: Wig Cheng  <wig.cheng@technexion.com>
6f126890aSEmmanuel Vadot//	   Richard Hu <richard.hu@technexion.com>
7f126890aSEmmanuel Vadot//	   Tapani Utriainen <tapani@technexion.com>
8f126890aSEmmanuel Vadot/dts-v1/;
9f126890aSEmmanuel Vadot
10f126890aSEmmanuel Vadot#include "imx6ul.dtsi"
11f126890aSEmmanuel Vadot
12f126890aSEmmanuel Vadot/ {
13f126890aSEmmanuel Vadot	/* Will be filled by the bootloader */
14f126890aSEmmanuel Vadot	memory@80000000 {
15f126890aSEmmanuel Vadot		device_type = "memory";
16f126890aSEmmanuel Vadot		reg = <0x80000000 0>;
17f126890aSEmmanuel Vadot	};
18f126890aSEmmanuel Vadot
19f126890aSEmmanuel Vadot	chosen {
20f126890aSEmmanuel Vadot		stdout-path = &uart6;
21f126890aSEmmanuel Vadot	};
22f126890aSEmmanuel Vadot
23f126890aSEmmanuel Vadot	backlight: backlight {
24f126890aSEmmanuel Vadot		compatible = "pwm-backlight";
25f126890aSEmmanuel Vadot		pwms = <&pwm3 0 5000000>;
26f126890aSEmmanuel Vadot		brightness-levels = <0 4 8 16 32 64 128 255>;
27f126890aSEmmanuel Vadot		default-brightness-level = <6>;
28f126890aSEmmanuel Vadot		status = "okay";
29f126890aSEmmanuel Vadot	};
30f126890aSEmmanuel Vadot
31f126890aSEmmanuel Vadot	reg_2p5v: regulator-2p5v {
32f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
33f126890aSEmmanuel Vadot		regulator-name = "2P5V";
34f126890aSEmmanuel Vadot		regulator-min-microvolt = <2500000>;
35f126890aSEmmanuel Vadot		regulator-max-microvolt = <2500000>;
36f126890aSEmmanuel Vadot	};
37f126890aSEmmanuel Vadot
38f126890aSEmmanuel Vadot	reg_3p3v: regulator-3p3v {
39f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
40f126890aSEmmanuel Vadot		regulator-name = "3P3V";
41f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
42f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
43f126890aSEmmanuel Vadot	};
44f126890aSEmmanuel Vadot
45f126890aSEmmanuel Vadot	reg_sd1_vmmc: regulator-sd1-vmmc {
46f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
47f126890aSEmmanuel Vadot		regulator-name = "VSD_3V3";
48f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
49f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
50f126890aSEmmanuel Vadot		gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
51f126890aSEmmanuel Vadot		enable-active-high;
52f126890aSEmmanuel Vadot	};
53f126890aSEmmanuel Vadot
54f126890aSEmmanuel Vadot	reg_usb_otg_vbus: regulator-usb-otg-vbus {
55f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
56f126890aSEmmanuel Vadot		pinctrl-names = "default";
57f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_usb_otg1>;
58f126890aSEmmanuel Vadot		regulator-name = "usb_otg_vbus";
59f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
60f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
61f126890aSEmmanuel Vadot		gpio = <&gpio1 6 0>;
62f126890aSEmmanuel Vadot	};
63f126890aSEmmanuel Vadot
64f126890aSEmmanuel Vadot	reg_brcm: regulator-brcm {
65f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
66f126890aSEmmanuel Vadot		enable-active-high;
67f126890aSEmmanuel Vadot		gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
68f126890aSEmmanuel Vadot		pinctrl-names = "default";
69f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_brcm_reg>;
70f126890aSEmmanuel Vadot		regulator-name = "brcm_reg";
71f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
72f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
73f126890aSEmmanuel Vadot		startup-delay-us = <200000>;
74f126890aSEmmanuel Vadot	};
75f126890aSEmmanuel Vadot
76f126890aSEmmanuel Vadot	panel {
77f126890aSEmmanuel Vadot		compatible = "vxt,vl050-8048nt-c01";
78f126890aSEmmanuel Vadot		backlight = <&backlight>;
79f126890aSEmmanuel Vadot
80f126890aSEmmanuel Vadot		port {
81f126890aSEmmanuel Vadot			panel_in: endpoint {
82f126890aSEmmanuel Vadot				remote-endpoint = <&display_out>;
83f126890aSEmmanuel Vadot			};
84f126890aSEmmanuel Vadot		};
85f126890aSEmmanuel Vadot	};
86f126890aSEmmanuel Vadot};
87f126890aSEmmanuel Vadot
88f126890aSEmmanuel Vadot&can1 {
89f126890aSEmmanuel Vadot	pinctrl-names = "default";
90f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_flexcan1>;
91f126890aSEmmanuel Vadot	status = "okay";
92f126890aSEmmanuel Vadot};
93f126890aSEmmanuel Vadot
94f126890aSEmmanuel Vadot&can2 {
95f126890aSEmmanuel Vadot	pinctrl-names = "default";
96f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_flexcan2>;
97f126890aSEmmanuel Vadot	status = "okay";
98f126890aSEmmanuel Vadot};
99f126890aSEmmanuel Vadot
100f126890aSEmmanuel Vadot&clks {
101f126890aSEmmanuel Vadot	assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
102f126890aSEmmanuel Vadot	assigned-clock-rates = <786432000>;
103f126890aSEmmanuel Vadot};
104f126890aSEmmanuel Vadot
105f126890aSEmmanuel Vadot&fec2 {
106f126890aSEmmanuel Vadot	pinctrl-names = "default";
107f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_enet2>;
108f126890aSEmmanuel Vadot	phy-mode = "rmii";
109f126890aSEmmanuel Vadot	phy-handle = <&ethphy1>;
110f126890aSEmmanuel Vadot	status = "okay";
111f126890aSEmmanuel Vadot	phy-reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
112f126890aSEmmanuel Vadot	phy-reset-duration = <1>;
113f126890aSEmmanuel Vadot
114f126890aSEmmanuel Vadot	mdio {
115f126890aSEmmanuel Vadot		#address-cells = <1>;
116f126890aSEmmanuel Vadot		#size-cells = <0>;
117f126890aSEmmanuel Vadot
118f126890aSEmmanuel Vadot		ethphy1: ethernet-phy@1 {
119f126890aSEmmanuel Vadot			compatible = "ethernet-phy-ieee802.3-c22";
120f126890aSEmmanuel Vadot			reg = <1>;
121f126890aSEmmanuel Vadot			max-speed = <100>;
122f126890aSEmmanuel Vadot			interrupt-parent = <&gpio5>;
123f126890aSEmmanuel Vadot			interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
124*84943d6fSEmmanuel Vadot			clocks = <&clks IMX6UL_CLK_ENET_REF>;
125*84943d6fSEmmanuel Vadot			clock-names = "rmii-ref";
126f126890aSEmmanuel Vadot		};
127f126890aSEmmanuel Vadot	};
128f126890aSEmmanuel Vadot};
129f126890aSEmmanuel Vadot
130f126890aSEmmanuel Vadot&i2c1 {
131f126890aSEmmanuel Vadot	clock-frequency = <100000>;
132f126890aSEmmanuel Vadot	pinctrl-names = "default";
133f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c1>;
134f126890aSEmmanuel Vadot	status = "okay";
135f126890aSEmmanuel Vadot
136f126890aSEmmanuel Vadot	pmic: pmic@8 {
137f126890aSEmmanuel Vadot		compatible = "fsl,pfuze3000";
138f126890aSEmmanuel Vadot		reg = <0x08>;
139f126890aSEmmanuel Vadot
140f126890aSEmmanuel Vadot		regulators {
141f126890aSEmmanuel Vadot			/* VDD_ARM_SOC_IN*/
142f126890aSEmmanuel Vadot			sw1b_reg: sw1b {
143f126890aSEmmanuel Vadot				regulator-min-microvolt = <700000>;
144f126890aSEmmanuel Vadot				regulator-max-microvolt = <1475000>;
145f126890aSEmmanuel Vadot				regulator-boot-on;
146f126890aSEmmanuel Vadot				regulator-always-on;
147f126890aSEmmanuel Vadot				regulator-ramp-delay = <6250>;
148f126890aSEmmanuel Vadot			};
149f126890aSEmmanuel Vadot
150f126890aSEmmanuel Vadot			/* DRAM */
151f126890aSEmmanuel Vadot			sw3a_reg: sw3 {
152f126890aSEmmanuel Vadot				regulator-min-microvolt = <900000>;
153f126890aSEmmanuel Vadot				regulator-max-microvolt = <1650000>;
154f126890aSEmmanuel Vadot				regulator-boot-on;
155f126890aSEmmanuel Vadot				regulator-always-on;
156f126890aSEmmanuel Vadot			};
157f126890aSEmmanuel Vadot
158f126890aSEmmanuel Vadot			/* DRAM */
159f126890aSEmmanuel Vadot			vref_reg: vrefddr {
160f126890aSEmmanuel Vadot				regulator-boot-on;
161f126890aSEmmanuel Vadot				regulator-always-on;
162f126890aSEmmanuel Vadot			};
163f126890aSEmmanuel Vadot		};
164f126890aSEmmanuel Vadot	};
165f126890aSEmmanuel Vadot};
166f126890aSEmmanuel Vadot
167f126890aSEmmanuel Vadot&lcdif {
168f126890aSEmmanuel Vadot	pinctrl-names = "default";
169f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>;
170f126890aSEmmanuel Vadot	status = "okay";
171f126890aSEmmanuel Vadot
172f126890aSEmmanuel Vadot	port {
173f126890aSEmmanuel Vadot		display_out: endpoint {
174f126890aSEmmanuel Vadot			remote-endpoint = <&panel_in>;
175f126890aSEmmanuel Vadot		};
176f126890aSEmmanuel Vadot	};
177f126890aSEmmanuel Vadot};
178f126890aSEmmanuel Vadot
179f126890aSEmmanuel Vadot&pwm3 {
180f126890aSEmmanuel Vadot	#pwm-cells = <2>;
181f126890aSEmmanuel Vadot	pinctrl-names = "default";
182f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm3>;
183f126890aSEmmanuel Vadot	status = "okay";
184f126890aSEmmanuel Vadot};
185f126890aSEmmanuel Vadot
186f126890aSEmmanuel Vadot&pwm7 {
187f126890aSEmmanuel Vadot	pinctrl-names = "default";
188f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm7>;
189f126890aSEmmanuel Vadot	status = "okay";
190f126890aSEmmanuel Vadot};
191f126890aSEmmanuel Vadot
192f126890aSEmmanuel Vadot&pwm8 {
193f126890aSEmmanuel Vadot	pinctrl-names = "default";
194f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm8>;
195f126890aSEmmanuel Vadot	status = "okay";
196f126890aSEmmanuel Vadot};
197f126890aSEmmanuel Vadot
198f126890aSEmmanuel Vadot&sai1 {
199f126890aSEmmanuel Vadot	pinctrl-names = "default";
200f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_sai1>;
201f126890aSEmmanuel Vadot	status = "okay";
202f126890aSEmmanuel Vadot};
203f126890aSEmmanuel Vadot
204f126890aSEmmanuel Vadot&uart3 {
205f126890aSEmmanuel Vadot	pinctrl-names = "default";
206f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart3>;
207f126890aSEmmanuel Vadot	uart-has-rtscts;
208f126890aSEmmanuel Vadot	status = "okay";
209f126890aSEmmanuel Vadot};
210f126890aSEmmanuel Vadot
211f126890aSEmmanuel Vadot&uart6 {
212f126890aSEmmanuel Vadot	pinctrl-names = "default";
213f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart6>;
214f126890aSEmmanuel Vadot	status = "okay";
215f126890aSEmmanuel Vadot};
216f126890aSEmmanuel Vadot
217f126890aSEmmanuel Vadot&usbotg1 {
218f126890aSEmmanuel Vadot	vbus-supply = <&reg_usb_otg_vbus>;
219f126890aSEmmanuel Vadot	pinctrl-names = "default";
220f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usb_otg1_id>;
221f126890aSEmmanuel Vadot	dr_mode = "otg";
222f126890aSEmmanuel Vadot	disable-over-current;
223f126890aSEmmanuel Vadot	status = "okay";
224f126890aSEmmanuel Vadot};
225f126890aSEmmanuel Vadot
226f126890aSEmmanuel Vadot&usbotg2 {
227f126890aSEmmanuel Vadot	dr_mode = "host";
228f126890aSEmmanuel Vadot	disable-over-current;
229f126890aSEmmanuel Vadot	status = "okay";
230f126890aSEmmanuel Vadot};
231f126890aSEmmanuel Vadot
232f126890aSEmmanuel Vadot&usdhc1 {
233f126890aSEmmanuel Vadot	pinctrl-names = "default";
234f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc1>;
235f126890aSEmmanuel Vadot	bus-width = <8>;
236f126890aSEmmanuel Vadot	no-1-8-v;
237f126890aSEmmanuel Vadot	non-removable;
238f126890aSEmmanuel Vadot	keep-power-in-suspend;
239f126890aSEmmanuel Vadot	status = "okay";
240f126890aSEmmanuel Vadot};
241f126890aSEmmanuel Vadot
242f126890aSEmmanuel Vadot&usdhc2 {  /* Wifi SDIO */
243f126890aSEmmanuel Vadot	pinctrl-names = "default";
244f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc2>;
245f126890aSEmmanuel Vadot	no-1-8-v;
246f126890aSEmmanuel Vadot	non-removable;
247f126890aSEmmanuel Vadot	keep-power-in-suspend;
248f126890aSEmmanuel Vadot	wakeup-source;
249f126890aSEmmanuel Vadot	vmmc-supply = <&reg_brcm>;
250f126890aSEmmanuel Vadot	status = "okay";
251f126890aSEmmanuel Vadot};
252f126890aSEmmanuel Vadot
253f126890aSEmmanuel Vadot&wdog1 {
254f126890aSEmmanuel Vadot	pinctrl-names = "default";
255f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_wdog>;
256f126890aSEmmanuel Vadot	fsl,ext-reset-output;
257f126890aSEmmanuel Vadot};
258f126890aSEmmanuel Vadot
259f126890aSEmmanuel Vadot&iomuxc {
260f126890aSEmmanuel Vadot	pinctrl_brcm_reg: brcmreggrp {
261f126890aSEmmanuel Vadot		fsl,pins = <
262f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_DATA06__GPIO4_IO08	0x10b0	/* WL_REG_ON */
263f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_DATA04__GPIO4_IO06	0x10b0	/* WL_HOST_WAKE */
264f126890aSEmmanuel Vadot		>;
265f126890aSEmmanuel Vadot	};
266f126890aSEmmanuel Vadot
267f126890aSEmmanuel Vadot	pinctrl_enet2: enet2grp {
268f126890aSEmmanuel Vadot		fsl,pins = <
269f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO	0x1b0b0
270f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_TX_EN__ENET2_MDC	0x1b0b0
271f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN	0x1b0b0
272f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER	0x1b0b0
273f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00	0x1b0b0
274f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01	0x1b0b0
275f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN	0x1b0b0
276f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	0x1b0b0
277f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	0x1b0b0
278f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b031
279f126890aSEmmanuel Vadot			MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x800
280f126890aSEmmanuel Vadot			MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28	0x79
281f126890aSEmmanuel Vadot		>;
282f126890aSEmmanuel Vadot	};
283f126890aSEmmanuel Vadot
284f126890aSEmmanuel Vadot	pinctrl_flexcan1: flexcan1grp {
285f126890aSEmmanuel Vadot		fsl,pins = <
286f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX	0x1b020
287f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX	0x1b020
288f126890aSEmmanuel Vadot		>;
289f126890aSEmmanuel Vadot	};
290f126890aSEmmanuel Vadot
291f126890aSEmmanuel Vadot	pinctrl_flexcan2: flexcan2grp {
292f126890aSEmmanuel Vadot		fsl,pins = <
293f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX	0x1b020
294f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX	0x1b020
295f126890aSEmmanuel Vadot		>;
296f126890aSEmmanuel Vadot	};
297f126890aSEmmanuel Vadot
298f126890aSEmmanuel Vadot	pinctrl_i2c1: i2c1grp {
299f126890aSEmmanuel Vadot		fsl,pins = <
300f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO02__I2C1_SCL		0x4001b8b0
301f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO03__I2C1_SDA		0x4001b8b0
302f126890aSEmmanuel Vadot		>;
303f126890aSEmmanuel Vadot	};
304f126890aSEmmanuel Vadot
305f126890aSEmmanuel Vadot	pinctrl_i2c2: i2c2grp {
306f126890aSEmmanuel Vadot		fsl,pins = <
307f126890aSEmmanuel Vadot			MX6UL_PAD_UART5_TX_DATA__I2C2_SCL	0x4001b8b0
308f126890aSEmmanuel Vadot			MX6UL_PAD_UART5_RX_DATA__I2C2_SDA	0x4001b8b0
309f126890aSEmmanuel Vadot		>;
310f126890aSEmmanuel Vadot	};
311f126890aSEmmanuel Vadot
312f126890aSEmmanuel Vadot	pinctrl_i2c3: i2c3grp {
313f126890aSEmmanuel Vadot		fsl,pins = <
314f126890aSEmmanuel Vadot			MX6UL_PAD_UART1_TX_DATA__I2C3_SCL	0x4001b8b0
315f126890aSEmmanuel Vadot			MX6UL_PAD_UART1_RX_DATA__I2C3_SDA	0x4001b8b0
316f126890aSEmmanuel Vadot			>;
317f126890aSEmmanuel Vadot	};
318f126890aSEmmanuel Vadot
319f126890aSEmmanuel Vadot	pinctrl_lcdif_dat: lcdifdatgrp {
320f126890aSEmmanuel Vadot		fsl,pins = <
321f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00	0x79
322f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01	0x79
323f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	0x79
324f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	0x79
325f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	0x79
326f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	0x79
327f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	0x79
328f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	0x79
329f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08	0x79
330f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09	0x79
331f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	0x79
332f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	0x79
333f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	0x79
334f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	0x79
335f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	0x79
336f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	0x79
337f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA16__LCDIF_DATA16	0x79
338f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA17__LCDIF_DATA17	0x79
339f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA18__LCDIF_DATA18	0x79
340f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA19__LCDIF_DATA19	0x79
341f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA20__LCDIF_DATA20	0x79
342f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA21__LCDIF_DATA21	0x79
343f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA22__LCDIF_DATA22	0x79
344f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA23__LCDIF_DATA23	0x79
345f126890aSEmmanuel Vadot		>;
346f126890aSEmmanuel Vadot	};
347f126890aSEmmanuel Vadot
348f126890aSEmmanuel Vadot	pinctrl_lcdif_ctrl: lcdifctrlgrp {
349f126890aSEmmanuel Vadot		fsl,pins = <
350f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_CLK__LCDIF_CLK		0x79
351f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	0x79
352f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	0x79
353f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	0x79
354f126890aSEmmanuel Vadot			/* LCD reset */
355f126890aSEmmanuel Vadot			MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09	0x79
356f126890aSEmmanuel Vadot		>;
357f126890aSEmmanuel Vadot	};
358f126890aSEmmanuel Vadot
359f126890aSEmmanuel Vadot	pinctrl_pwm3: pwm3grp {
360f126890aSEmmanuel Vadot		fsl,pins = <
361f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_ALE__PWM3_OUT		0x110b0
362f126890aSEmmanuel Vadot		>;
363f126890aSEmmanuel Vadot	};
364f126890aSEmmanuel Vadot
365f126890aSEmmanuel Vadot	pinctrl_pwm7: pwm7grp {
366f126890aSEmmanuel Vadot		fsl,pins = <
367f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT	0x110b0
368f126890aSEmmanuel Vadot		>;
369f126890aSEmmanuel Vadot	};
370f126890aSEmmanuel Vadot
371f126890aSEmmanuel Vadot	pinctrl_pwm8: pwm8grp {
372f126890aSEmmanuel Vadot		fsl,pins = <
373f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_RX_ER__PWM8_OUT		0x110b0
374f126890aSEmmanuel Vadot		>;
375f126890aSEmmanuel Vadot	};
376f126890aSEmmanuel Vadot
377f126890aSEmmanuel Vadot	pinctrl_sai1: sai1grp {
378f126890aSEmmanuel Vadot		fsl,pins = <
379f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC	0x1b0b0
380f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK	0x1b0b0
381f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA	0x110b0
382f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA	0x1f0b8
383f126890aSEmmanuel Vadot		>;
384f126890aSEmmanuel Vadot	};
385f126890aSEmmanuel Vadot
386f126890aSEmmanuel Vadot	pinctrl_uart3: uart3grp {
387f126890aSEmmanuel Vadot		fsl,pins = <
388f126890aSEmmanuel Vadot			MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX	0x1b0b0
389f126890aSEmmanuel Vadot			MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX	0x1b0b0
390f126890aSEmmanuel Vadot			MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS	0x1b0b0
391f126890aSEmmanuel Vadot			MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS	0x1b0b0
392f126890aSEmmanuel Vadot		>;
393f126890aSEmmanuel Vadot	};
394f126890aSEmmanuel Vadot
395f126890aSEmmanuel Vadot	pinctrl_uart5: uart5grp {
396f126890aSEmmanuel Vadot		fsl,pins = <
397f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX	0x1b0b1
398f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO05__UART5_DCE_RX	0x1b0b1
399f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS	0x1b0b1
400f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS	0x1b0b1
401f126890aSEmmanuel Vadot		>;
402f126890aSEmmanuel Vadot	};
403f126890aSEmmanuel Vadot
404f126890aSEmmanuel Vadot	pinctrl_uart6: uart6grp {
405f126890aSEmmanuel Vadot		fsl,pins = <
406f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_MCLK__UART6_DCE_TX	0x1b0b1
407f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX	0x1b0b1
408f126890aSEmmanuel Vadot		>;
409f126890aSEmmanuel Vadot	};
410f126890aSEmmanuel Vadot
411f126890aSEmmanuel Vadot	pinctrl_usb_otg1: usbotg1grp {
412f126890aSEmmanuel Vadot		fsl,pins = <
413f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO06__GPIO1_IO06	0x10b0
414f126890aSEmmanuel Vadot			>;
415f126890aSEmmanuel Vadot	};
416f126890aSEmmanuel Vadot
417f126890aSEmmanuel Vadot	pinctrl_usb_otg1_id: usbotg1idgrp {
418f126890aSEmmanuel Vadot		fsl,pins = <
419f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	0x17059
420f126890aSEmmanuel Vadot		>;
421f126890aSEmmanuel Vadot	};
422f126890aSEmmanuel Vadot
423f126890aSEmmanuel Vadot	pinctrl_usdhc1: usdhc1grp {
424f126890aSEmmanuel Vadot		fsl,pins = <
425f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059
426f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10071
427f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059
428f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059
429f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059
430f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059
431f126890aSEmmanuel Vadot			MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B	0x03029
432f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_READY_B__USDHC1_DATA4	0x17059
433f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5	0x17059
434f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6	0x17059
435f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_CLE__USDHC1_DATA7	0x17059
436f126890aSEmmanuel Vadot		>;
437f126890aSEmmanuel Vadot	};
438f126890aSEmmanuel Vadot
439f126890aSEmmanuel Vadot	pinctrl_usdhc2: usdhc2grp {
440f126890aSEmmanuel Vadot		fsl,pins = <
441f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x17059
442f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x10059
443f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x17059
444f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x17059
445f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x17059
446f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x17059
447f126890aSEmmanuel Vadot		>;
448f126890aSEmmanuel Vadot	};
449f126890aSEmmanuel Vadot
450f126890aSEmmanuel Vadot	pinctrl_wdog: wdoggrp {
451f126890aSEmmanuel Vadot		fsl,pins = <
452f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
453f126890aSEmmanuel Vadot		>;
454f126890aSEmmanuel Vadot	};
455f126890aSEmmanuel Vadot};
456