1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2021 PHYTEC Messtechnik GmbH
4 * Author: Alexander Bauer <a.bauer@phytec.de>
5 */
6
7/dts-v1/;
8#include "imx6ull.dtsi"
9#include "imx6ull-phytec-phycore-som.dtsi"
10
11/ {
12
13	model = "PHYTEC phyGate-Tauri i.MX6 UltraLite";
14	compatible = "phytec,imx6ull-phygate-tauri",
15		     "phytec,imx6ull-pcl063", "fsl,imx6ull";
16
17	aliases {
18		rtc0 = &i2c_rtc;
19		rtc1 = &snvs_rtc;
20	};
21
22	gpio_keys: gpio-keys {
23		compatible = "gpio-key";
24		pinctrl-names = "default";
25		pinctrl-0 = <&pinctrl_gpio_keys>;
26
27		key {
28			label = "KEY-A";
29			gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
30			linux,code = <KEY_A>;
31			wakeup-source;
32		};
33	};
34
35	reg_adc1_vref_3v3: regulator-vref-3v3 {
36		compatible = "regulator-fixed";
37		regulator-name = "vref-3v3";
38		regulator-min-microvolt = <3300000>;
39		regulator-max-microvolt = <3300000>;
40	};
41
42	reg_s25fl064_hold: regulator-s25fl064-hold {
43		pinctrl-names = "default";
44		pinctrl-0 = <&pinctrl_s25fl064_hold>;
45		compatible = "regulator-fixed";
46		regulator-name = "s25fl064_hold";
47		regulator-min-microvolt = <3300000>;
48		regulator-max-microvolt = <3300000>;
49		gpio = <&gpio3 17 GPIO_ACTIVE_HIGH>;
50		enable-active-high;
51		regulator-always-on;
52	};
53
54	reg_usb_hub_vbus: regulator-hub-otg1-vbus {
55		pinctrl-names = "default";
56		pinctrl-0 = <&pinctrl_usbhubpwr>;
57		compatible = "regulator-fixed";
58		regulator-name = "usb_hub_vbus";
59		regulator-min-microvolt = <3300000>;
60		regulator-max-microvolt = <3300000>;
61		gpio = <&gpio5 5 GPIO_ACTIVE_HIGH>;
62		enable-active-high;
63		regulator-always-on;
64	};
65
66	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
67		pinctrl-names = "default";
68		pinctrl-0 = <&pinctrl_usbotg1pwr>;
69		compatible = "regulator-fixed";
70		regulator-name = "usb_otg1_vbus";
71		regulator-min-microvolt = <3300000>;
72		regulator-max-microvolt = <3300000>;
73		gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
74		enable-active-high;
75		regulator-always-on;
76	};
77
78	user_leds: user-leds {
79		compatible = "gpio-leds";
80		pinctrl-names = "default";
81		pinctrl-0 = <&pinctrl_user_leds>,
82			    <&pinctrl_user_leds_snvs>;
83
84		user-led1 {
85			label = "yellow";
86			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
87			linux,default-trigger = "off";
88		};
89
90		user-led2 {
91			label = "red";
92			gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
93			linux,default-trigger = "off";
94		};
95	};
96};
97
98&can1 {
99	pinctrl-names = "default";
100	pinctrl-0 = <&pinctrl_flexcan1>;
101	status = "okay";
102};
103
104&can2 {
105	pinctrl-names = "default";
106	pinctrl-0 = <&pinctrl_flexcan2>;
107	status = "okay";
108};
109
110&ecspi1 {
111	#address-cells = <1>;
112	#size-cells = <0>;
113	pinctrl-names = "default";
114	pinctrl-0 = <&pinctrl_ecspi1>,
115		    <&pinctrl_ecspi1_cs>;
116	cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>,
117		   <&gpio3 10 GPIO_ACTIVE_LOW>,
118		   <&gpio3 11 GPIO_ACTIVE_LOW>;
119	status = "okay";
120
121	tpm_tis: tpm@1 {
122		pinctrl-names = "default";
123		pinctrl-0 = <&pinctrl_tpm>;
124		compatible = "tcg,tpm_tis-spi";
125		reg = <1>;
126		spi-max-frequency = <20000000>;
127		interrupt-parent = <&gpio5>;
128		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
129	};
130
131	s25fl064: flash@2 {
132		#address-cells = <1>;
133		#size-cells = <1>;
134		compatible = " jedec,spi-nor";
135		reg = <2>;
136		spi-max-frequency = <40000000>;
137		m25p,fast-read;
138		status = "disabled";
139	};
140};
141
142&ecspi3 {
143	pinctrl-names = "default";
144	pinctrl-0 = <&pinctrl_ecspi3>;
145	cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
146	dmas = <&sdma 7 8 0>,
147	       <&sdma 8 8 0>;
148	dma-names = "rx", "tx";
149	status = "okay";
150};
151
152&ethphy1 {
153	status = "okay";
154};
155
156&fec1 {
157	status = "okay";
158};
159
160&fec2 {
161	pinctrl-names = "default";
162	pinctrl-0 = <&pinctrl_enet2>;
163	phy-mode = "rmii";
164	phy-handle = <&ethphy2>;
165	status = "okay";
166};
167
168&i2c1 {
169	status = "okay";
170
171	tmp102: tmp@49 {
172		compatible = "ti,tmp102";
173		reg = <0x49>;
174		pinctrl-names = "default";
175		pinctrl-0 = <&pinctrl_tempsense>;
176		interrupt-parent = <&gpio5>;
177		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
178		#thermal-sensor-cells = <1>;
179	};
180
181	i2c_rtc: rtc@68 {
182		pinctrl-names = "default";
183		pinctrl-0 = <&pinctrl_rtc_int>;
184		compatible = "microcrystal,rv4162";
185		reg = <0x68>;
186		interrupt-parent = <&gpio5>;
187		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
188	};
189};
190
191&i2c2 {
192	pinctrl-names = "default", "gpio";
193	pinctrl-0 = <&pinctrl_i2c2>;
194	pinctrl-1 = <&pinctrl_i2c2_gpio>;
195	sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
196	scl-gpios = <&gpio1 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
197	status = "okay";
198};
199
200&i2c3 {
201	pinctrl-names = "default", "gpio";
202	pinctrl-0 = <&pinctrl_i2c3>;
203	pinctrl-1 = <&pinctrl_i2c3_gpio>;
204	sda-gpios = <&gpio3 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
205	scl-gpios = <&gpio3 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
206	status = "okay";
207};
208
209&i2c4 {
210	pinctrl-names = "default", "gpio";
211	pinctrl-0 = <&pinctrl_i2c4>;
212	pinctrl-1 = <&pinctrl_i2c4_gpio>;
213	sda-gpios = <&gpio3 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
214	scl-gpios = <&gpio3 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
215	status = "okay";
216};
217
218&mdio {
219	ethphy2: ethernet-phy@2 {
220		reg = <2>;
221		micrel,led-mode = <1>;
222		clocks = <&clks IMX6UL_CLK_ENET2_REF>;
223		clock-names = "rmii-ref";
224		status = "okay";
225	};
226};
227
228&pwm3 {
229	pinctrl-names = "default";
230	pinctrl-0 = <&pinctrl_pwm3>;
231	status = "okay";
232};
233
234&pwm6 {
235	pinctrl-names = "default";
236	pinctrl-0 = <&pinctrl_pwm6>;
237	status = "okay";
238};
239
240&pwm7 {
241	pinctrl-names = "default";
242	pinctrl-0 = <&pinctrl_pwm7>;
243	status = "okay";
244};
245
246&pwm8 {
247	pinctrl-names = "default";
248	pinctrl-0 = <&pinctrl_pwm8>;
249	status = "okay";
250};
251
252&uart3 {
253	pinctrl-names = "default";
254	pinctrl-0 = <&pinctrl_uart3>;
255	status = "okay";
256};
257
258/* UART4 * RS485  */
259&uart4 {
260	pinctrl-names = "default";
261	pinctrl-0 = <&pinctrl_uart4>;
262	rts-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
263	linux,rs485-enabled-at-boot-time;
264	status = "okay";
265};
266
267/* UART5 * RS232  */
268&uart5 {
269	pinctrl-names = "default";
270	pinctrl-0 = <&pinctrl_uart5>;
271	uart-has-rtscts;
272	status = "okay";
273};
274
275&uart7 {
276	pinctrl-names = "default";
277	pinctrl-0 = <&pinctrl_uart7>;
278	status = "okay";
279};
280
281/* USB */
282&usbotg1 {
283	pinctrl-names = "default";
284	pinctrl-0 = <&pinctrl_usb_otg1>;
285	vbus-supply = <&reg_usb_otg1_vbus>;
286	dr_mode = "host";
287	disable-over-current;
288	status = "okay";
289};
290
291&usbotg2 {
292	vbus-supply = <&reg_usb_hub_vbus>;
293	disable-over-current;
294	dr_mode = "host";
295	status = "okay";
296};
297
298&usdhc1 {
299	pinctrl-names = "default", "state_100mhz", "state_200mhz";
300	pinctrl-0 = <&pinctrl_usdhc1>;
301	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
302	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
303	cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
304	no-1-8-v;
305	keep-power-in-suspend;
306	wakeup-source;
307	status = "okay";
308};
309
310&usdhc2 {
311	status = "disabled";
312};
313
314&iomuxc_snvs {
315	pinctrl_rtc_int: rtcintgrp {
316		fsl,pins = <
317			MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01	0x17059
318		>;
319	};
320
321	pinctrl_stmpe: stmpegrp {
322		fsl,pins = <
323			MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03	0x17059
324		>;
325	};
326
327	pinctrl_tempsense: tempsensegrp {
328		fsl,pins = <
329			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x17059
330		>;
331	};
332
333	pinctrl_tpm: tpmgrp {
334		fsl,pins = <
335			MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02	0x17059
336		>;
337	};
338
339	pinctrl_usbhubpwr: usbhubpwrgrp {
340		fsl,pins = <
341			MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05	0x17059
342		>;
343	};
344
345	pinctrl_user_leds_snvs: user_ledsgrp {
346		fsl,pins = <
347			MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09	0x79
348		>;
349	};
350};
351
352&iomuxc {
353	pinctrl_gpio: gpiogrp {
354		fsl,pins = <
355			MX6UL_PAD_CSI_DATA05__GPIO4_IO26	0x17059  /* nUART_MUX_RS232 */
356			MX6UL_PAD_CSI_DATA04__GPIO4_IO25	0x17059  /* nUART_MUX_DUAL_RX_TX */
357		>;
358	};
359
360	pinctrl_gpio_keys: gpiokeysgrp {
361		fsl,pins = <
362			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x79
363		>;
364	};
365
366	pinctrl_ecspi3: ecspi3grp {
367		fsl,pins = <
368			MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK	0x100b1
369			MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO	0x100b1
370			MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI	0x100b1
371			MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20	0x10b0
372		>;
373	};
374
375	pinctrl_ecspi1: ecspi1grp {
376		fsl,pins = <
377			MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK	0x100b1
378			MX6UL_PAD_LCD_DATA23__ECSPI1_MISO	0x100b1
379			MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI	0x100b1
380		>;
381	};
382
383	pinctrl_ecspi1_cs: ecspi1csgrp {
384		fsl,pins = <
385			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x10b0
386			MX6UL_PAD_LCD_DATA05__GPIO3_IO10	0x10b0
387			MX6UL_PAD_LCD_DATA06__GPIO3_IO11	0x10b0
388		>;
389	};
390
391
392	pinctrl_enet2: enet2grp {
393		fsl,pins = <
394			MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN	0x1b0b0
395			MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER	0x1b0b0
396			MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00	0x1b0b0
397			MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01	0x1b0b0
398			MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN	0x1b010
399			MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	0x1b010
400			MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	0x1b010
401			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b010
402		>;
403	};
404
405	pinctrl_flexcan1: flexcan1grp {
406		fsl,pins = <
407			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x0b0b0
408			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x0b0b0
409		>;
410	};
411
412	pinctrl_flexcan2: flexcan2grp {
413		fsl,pins = <
414			MX6UL_PAD_LCD_DATA10__FLEXCAN2_TX	0x0b0b0
415			MX6UL_PAD_LCD_DATA11__FLEXCAN2_RX	0x0b0b0
416		>;
417	};
418
419	princtrl_flexcan2_en: flexcan2engrp {
420		fsl,pins = <
421			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x17059
422		>;
423	};
424
425	pinctrl_i2c2: i2c2grp {
426		fsl,pins = <
427			MX6UL_PAD_GPIO1_IO00__I2C2_SCL	0xb0
428			MX6UL_PAD_GPIO1_IO01__I2C2_SDA	0xb0
429		>;
430	};
431
432	pinctrl_i2c2_gpio: i2c2gpiogrp {
433		fsl,pins = <
434			MX6UL_PAD_GPIO1_IO00__GPIO1_IO00	0xb0
435			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0xb0
436		>;
437	};
438
439	pinctrl_i2c3: i2c3grp {
440		fsl,pins = <
441			MX6UL_PAD_LCD_DATA01__I2C3_SCL	0xb0
442			MX6UL_PAD_LCD_DATA00__I2C3_SDA	0xb0
443		>;
444	};
445
446	pinctrl_i2c3_gpio: i2c3gpiogrp {
447		fsl,pins = <
448			MX6UL_PAD_LCD_DATA01__GPIO3_IO06	0xb0
449			MX6UL_PAD_LCD_DATA00__GPIO3_IO05	0xb0
450		>;
451	};
452
453	pinctrl_i2c4: i2c4grp {
454		fsl,pins = <
455			MX6UL_PAD_LCD_DATA03__I2C4_SCL	0xb0
456			MX6UL_PAD_LCD_DATA02__I2C4_SDA	0xb0
457		>;
458	};
459
460	pinctrl_i2c4_gpio: i2c4gpiogrp {
461		fsl,pins = <
462			MX6UL_PAD_LCD_DATA03__GPIO3_IO08	0xb0
463			MX6UL_PAD_LCD_DATA02__GPIO3_IO07	0xb0
464		>;
465	};
466
467	pinctrl_pwm3: pwm3grp {
468		fsl,pins = <
469			MX6UL_PAD_GPIO1_IO04__PWM3_OUT	0x0b0b0
470		>;
471	};
472
473	pinctrl_pwm6: pwm6grp {
474		fsl,pins = <
475			MX6UL_PAD_JTAG_TDI__PWM6_OUT	0x0b0b0
476		>;
477	};
478
479	pinctrl_pwm7: pwm7grp {
480		fsl,pins = <
481			MX6UL_PAD_JTAG_TCK__PWM7_OUT	0x0b0b0
482		>;
483	};
484
485	pinctrl_pwm8: pwm8grp {
486		fsl,pins = <
487			MX6UL_PAD_JTAG_TRST_B__PWM8_OUT	0x0b0b0
488		>;
489	};
490
491	pinctrl_s25fl064_hold: s25fl064holdgrp {
492		fsl,pins = <
493			MX6UL_PAD_LCD_DATA12__GPIO3_IO17	0x100b1
494		>;
495	};
496
497	pinctrl_sai2: sai2grp {
498		fsl,pins = <
499			MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	0x17088
500			MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	0x17088
501			MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	0x11088
502			MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	0x11088
503			MX6UL_PAD_JTAG_TMS__SAI2_MCLK		0x17088
504		>;
505	};
506
507	pinctrl_uart3: uart3grp {
508		fsl,pins = <
509			MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX	0x1b0b1
510			MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX	0x1b0b1
511		>;
512	};
513
514	pinctrl_uart4: uart4grp {
515		fsl,pins = <
516			MX6UL_PAD_LCD_CLK__UART4_DCE_TX		0x1b0b1
517			MX6UL_PAD_LCD_ENABLE__UART4_DCE_RX	0x1b0b1
518			MX6UL_PAD_LCD_HSYNC__GPIO3_IO02	0x1b0b1
519		>;
520	};
521
522	pinctrl_uart5: uart5grp {
523		fsl,pins = <
524			MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX	0x1b0b1
525			MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX	0x1b0b1
526		>;
527	};
528
529	pinctrl_uart7: uart7grp {
530		fsl,pins = <
531			MX6UL_PAD_LCD_DATA16__UART7_DCE_TX	0x1b0b1
532			MX6UL_PAD_LCD_DATA17__UART7_DCE_RX	0x1b0b1
533		>;
534	};
535
536	pinctrl_usb_otg1: usbotg1grp {
537		fsl,pins = <
538			MX6UL_PAD_CSI_DATA06__GPIO4_IO27	0x80
539		>;
540	};
541
542	pinctrl_usbotg1pwr: usbotg1pwrgrp {
543		fsl,pins = <
544			MX6UL_PAD_CSI_DATA07__GPIO4_IO28	0x17059
545		>;
546	};
547
548	pinctrl_usdhc1: usdhc1grp {
549		fsl,pins = <
550			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059
551			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10059
552			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059
553			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059
554			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059
555			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059
556			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19	0x17059
557		>;
558	};
559
560	pinctrl_usdhc1_100mhz: usdhc1100mhzgrp {
561		fsl,pins = <
562			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170b9
563			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100b9
564			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170b9
565			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170b9
566			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170b9
567			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170b9
568		>;
569	};
570
571	pinctrl_usdhc1_200mhz: usdhc1200mhzgrp {
572		fsl,pins = <
573			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170f9
574			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100f9
575			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170f9
576			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170f9
577			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170f9
578			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170f9
579		>;
580	};
581
582	pinctrl_user_leds: userledsgrp {
583		fsl,pins = <
584			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x79
585		>;
586	};
587};
588