1// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
2/*
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
5 */
6
7#include "imx6ull.dtsi"
8#include "imx6ul-tqma6ul-common.dtsi"
9#include "imx6ul-tqma6ulx-common.dtsi"
10
11/ {
12	model = "TQ-Systems TQMa6ULL2 SoM";
13	compatible = "tq,imx6ull-tqma6ull2", "fsl,imx6ull";
14};
15
16&usdhc2 {
17	fsl,tuning-step = <6>;
18	/* Errata ERR010450 Workaround */
19	max-frequency = <99000000>;
20	assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
21	assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
22	assigned-clock-rates = <0>, <198000000>;
23};
24
25&iomuxc {
26	pinctrl_usdhc2: usdhc2grp {
27		fsl,pins = <
28			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x00017031
29			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x00017039
30			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x00017039
31			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x00017039
32			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x00017039
33			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x00017039
34			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	0x00017039
35			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	0x00017039
36			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	0x00017039
37			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	0x00017039
38			/* rst */
39			MX6UL_PAD_NAND_ALE__GPIO4_IO10		0x0001b051
40		>;
41	};
42
43	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
44		fsl,pins = <
45			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x000170f1
46			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x000170f1
47			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x000170f1
48			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x000170f1
49			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x000170f1
50			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x000170f1
51			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	0x000170f1
52			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	0x000170f1
53			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	0x000170f1
54			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	0x000170f1
55			/* rst */
56			MX6UL_PAD_NAND_ALE__GPIO4_IO10		0x0001b051
57		>;
58	};
59
60	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
61		fsl,pins = <
62			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x000170f1
63			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x000170f1
64			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x000170f1
65			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x000170f1
66			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x000170f1
67			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x000170f1
68			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	0x000170f1
69			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	0x000170f1
70			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	0x000170f1
71			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	0x000170f1
72			/* rst */
73			MX6UL_PAD_NAND_ALE__GPIO4_IO10		0x0001b051
74		>;
75	};
76};
77