1f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2f126890aSEmmanuel Vadot 3f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 4f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 5f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/arm-gic.h> 6f126890aSEmmanuel Vadot#include <dt-bindings/pinctrl/rockchip.h> 7f126890aSEmmanuel Vadot#include <dt-bindings/clock/rk3228-cru.h> 8f126890aSEmmanuel Vadot#include <dt-bindings/thermal/thermal.h> 9f126890aSEmmanuel Vadot#include <dt-bindings/power/rk3228-power.h> 10f126890aSEmmanuel Vadot 11f126890aSEmmanuel Vadot/ { 12f126890aSEmmanuel Vadot #address-cells = <1>; 13f126890aSEmmanuel Vadot #size-cells = <1>; 14f126890aSEmmanuel Vadot 15f126890aSEmmanuel Vadot interrupt-parent = <&gic>; 16f126890aSEmmanuel Vadot 17f126890aSEmmanuel Vadot aliases { 18*8d13bc63SEmmanuel Vadot gpio0 = &gpio0; 19*8d13bc63SEmmanuel Vadot gpio1 = &gpio1; 20*8d13bc63SEmmanuel Vadot gpio2 = &gpio2; 21*8d13bc63SEmmanuel Vadot gpio3 = &gpio3; 22f126890aSEmmanuel Vadot serial0 = &uart0; 23f126890aSEmmanuel Vadot serial1 = &uart1; 24f126890aSEmmanuel Vadot serial2 = &uart2; 25f126890aSEmmanuel Vadot spi0 = &spi0; 26f126890aSEmmanuel Vadot }; 27f126890aSEmmanuel Vadot 28f126890aSEmmanuel Vadot cpus { 29f126890aSEmmanuel Vadot #address-cells = <1>; 30f126890aSEmmanuel Vadot #size-cells = <0>; 31f126890aSEmmanuel Vadot 32f126890aSEmmanuel Vadot cpu0: cpu@f00 { 33f126890aSEmmanuel Vadot device_type = "cpu"; 34f126890aSEmmanuel Vadot compatible = "arm,cortex-a7"; 35f126890aSEmmanuel Vadot reg = <0xf00>; 36f126890aSEmmanuel Vadot resets = <&cru SRST_CORE0>; 37f126890aSEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 38f126890aSEmmanuel Vadot #cooling-cells = <2>; /* min followed by max */ 39f126890aSEmmanuel Vadot clock-latency = <40000>; 40f126890aSEmmanuel Vadot clocks = <&cru ARMCLK>; 41f126890aSEmmanuel Vadot enable-method = "psci"; 42f126890aSEmmanuel Vadot }; 43f126890aSEmmanuel Vadot 44f126890aSEmmanuel Vadot cpu1: cpu@f01 { 45f126890aSEmmanuel Vadot device_type = "cpu"; 46f126890aSEmmanuel Vadot compatible = "arm,cortex-a7"; 47f126890aSEmmanuel Vadot reg = <0xf01>; 48f126890aSEmmanuel Vadot resets = <&cru SRST_CORE1>; 49f126890aSEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 50f126890aSEmmanuel Vadot #cooling-cells = <2>; /* min followed by max */ 51f126890aSEmmanuel Vadot enable-method = "psci"; 52f126890aSEmmanuel Vadot }; 53f126890aSEmmanuel Vadot 54f126890aSEmmanuel Vadot cpu2: cpu@f02 { 55f126890aSEmmanuel Vadot device_type = "cpu"; 56f126890aSEmmanuel Vadot compatible = "arm,cortex-a7"; 57f126890aSEmmanuel Vadot reg = <0xf02>; 58f126890aSEmmanuel Vadot resets = <&cru SRST_CORE2>; 59f126890aSEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 60f126890aSEmmanuel Vadot #cooling-cells = <2>; /* min followed by max */ 61f126890aSEmmanuel Vadot enable-method = "psci"; 62f126890aSEmmanuel Vadot }; 63f126890aSEmmanuel Vadot 64f126890aSEmmanuel Vadot cpu3: cpu@f03 { 65f126890aSEmmanuel Vadot device_type = "cpu"; 66f126890aSEmmanuel Vadot compatible = "arm,cortex-a7"; 67f126890aSEmmanuel Vadot reg = <0xf03>; 68f126890aSEmmanuel Vadot resets = <&cru SRST_CORE3>; 69f126890aSEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 70f126890aSEmmanuel Vadot #cooling-cells = <2>; /* min followed by max */ 71f126890aSEmmanuel Vadot enable-method = "psci"; 72f126890aSEmmanuel Vadot }; 73f126890aSEmmanuel Vadot }; 74f126890aSEmmanuel Vadot 75f126890aSEmmanuel Vadot cpu0_opp_table: opp-table-0 { 76f126890aSEmmanuel Vadot compatible = "operating-points-v2"; 77f126890aSEmmanuel Vadot opp-shared; 78f126890aSEmmanuel Vadot 79f126890aSEmmanuel Vadot opp-408000000 { 80f126890aSEmmanuel Vadot opp-hz = /bits/ 64 <408000000>; 81f126890aSEmmanuel Vadot opp-microvolt = <950000>; 82f126890aSEmmanuel Vadot clock-latency-ns = <40000>; 83f126890aSEmmanuel Vadot opp-suspend; 84f126890aSEmmanuel Vadot }; 85f126890aSEmmanuel Vadot opp-600000000 { 86f126890aSEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 87f126890aSEmmanuel Vadot opp-microvolt = <975000>; 88f126890aSEmmanuel Vadot }; 89f126890aSEmmanuel Vadot opp-816000000 { 90f126890aSEmmanuel Vadot opp-hz = /bits/ 64 <816000000>; 91f126890aSEmmanuel Vadot opp-microvolt = <1000000>; 92f126890aSEmmanuel Vadot }; 93f126890aSEmmanuel Vadot opp-1008000000 { 94f126890aSEmmanuel Vadot opp-hz = /bits/ 64 <1008000000>; 95f126890aSEmmanuel Vadot opp-microvolt = <1175000>; 96f126890aSEmmanuel Vadot }; 97f126890aSEmmanuel Vadot opp-1200000000 { 98f126890aSEmmanuel Vadot opp-hz = /bits/ 64 <1200000000>; 99f126890aSEmmanuel Vadot opp-microvolt = <1275000>; 100f126890aSEmmanuel Vadot }; 101f126890aSEmmanuel Vadot }; 102f126890aSEmmanuel Vadot 103f126890aSEmmanuel Vadot arm-pmu { 104f126890aSEmmanuel Vadot compatible = "arm,cortex-a7-pmu"; 105f126890aSEmmanuel Vadot interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, 106f126890aSEmmanuel Vadot <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, 107f126890aSEmmanuel Vadot <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, 108f126890aSEmmanuel Vadot <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 109f126890aSEmmanuel Vadot interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 110f126890aSEmmanuel Vadot }; 111f126890aSEmmanuel Vadot 112f126890aSEmmanuel Vadot psci { 113f126890aSEmmanuel Vadot compatible = "arm,psci-1.0", "arm,psci-0.2"; 114f126890aSEmmanuel Vadot method = "smc"; 115f126890aSEmmanuel Vadot }; 116f126890aSEmmanuel Vadot 117f126890aSEmmanuel Vadot timer { 118f126890aSEmmanuel Vadot compatible = "arm,armv7-timer"; 119f126890aSEmmanuel Vadot arm,cpu-registers-not-fw-configured; 120f126890aSEmmanuel Vadot interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 121f126890aSEmmanuel Vadot <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 122f126890aSEmmanuel Vadot <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 123f126890aSEmmanuel Vadot <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 124f126890aSEmmanuel Vadot clock-frequency = <24000000>; 125f126890aSEmmanuel Vadot }; 126f126890aSEmmanuel Vadot 127f126890aSEmmanuel Vadot xin24m: oscillator { 128f126890aSEmmanuel Vadot compatible = "fixed-clock"; 129f126890aSEmmanuel Vadot clock-frequency = <24000000>; 130f126890aSEmmanuel Vadot clock-output-names = "xin24m"; 131f126890aSEmmanuel Vadot #clock-cells = <0>; 132f126890aSEmmanuel Vadot }; 133f126890aSEmmanuel Vadot 134f126890aSEmmanuel Vadot display_subsystem: display-subsystem { 135f126890aSEmmanuel Vadot compatible = "rockchip,display-subsystem"; 136f126890aSEmmanuel Vadot ports = <&vop_out>; 137f126890aSEmmanuel Vadot }; 138f126890aSEmmanuel Vadot 139f126890aSEmmanuel Vadot i2s1: i2s1@100b0000 { 140f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s"; 141f126890aSEmmanuel Vadot reg = <0x100b0000 0x4000>; 142f126890aSEmmanuel Vadot interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 143f126890aSEmmanuel Vadot clock-names = "i2s_clk", "i2s_hclk"; 144f126890aSEmmanuel Vadot clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>; 145f126890aSEmmanuel Vadot dmas = <&pdma 14>, <&pdma 15>; 146f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 147f126890aSEmmanuel Vadot pinctrl-names = "default"; 148f126890aSEmmanuel Vadot pinctrl-0 = <&i2s1_bus>; 149f126890aSEmmanuel Vadot status = "disabled"; 150f126890aSEmmanuel Vadot }; 151f126890aSEmmanuel Vadot 152f126890aSEmmanuel Vadot i2s0: i2s0@100c0000 { 153f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s"; 154f126890aSEmmanuel Vadot reg = <0x100c0000 0x4000>; 155f126890aSEmmanuel Vadot interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 156f126890aSEmmanuel Vadot clock-names = "i2s_clk", "i2s_hclk"; 157f126890aSEmmanuel Vadot clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>; 158f126890aSEmmanuel Vadot dmas = <&pdma 11>, <&pdma 12>; 159f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 160f126890aSEmmanuel Vadot status = "disabled"; 161f126890aSEmmanuel Vadot }; 162f126890aSEmmanuel Vadot 163f126890aSEmmanuel Vadot spdif: spdif@100d0000 { 164f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-spdif"; 165f126890aSEmmanuel Vadot reg = <0x100d0000 0x1000>; 166f126890aSEmmanuel Vadot interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 167f126890aSEmmanuel Vadot clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>; 168f126890aSEmmanuel Vadot clock-names = "mclk", "hclk"; 169f126890aSEmmanuel Vadot dmas = <&pdma 10>; 170f126890aSEmmanuel Vadot dma-names = "tx"; 171f126890aSEmmanuel Vadot pinctrl-names = "default"; 172f126890aSEmmanuel Vadot pinctrl-0 = <&spdif_tx>; 173f126890aSEmmanuel Vadot status = "disabled"; 174f126890aSEmmanuel Vadot }; 175f126890aSEmmanuel Vadot 176f126890aSEmmanuel Vadot i2s2: i2s2@100e0000 { 177f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s"; 178f126890aSEmmanuel Vadot reg = <0x100e0000 0x4000>; 179f126890aSEmmanuel Vadot interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 180f126890aSEmmanuel Vadot clock-names = "i2s_clk", "i2s_hclk"; 181f126890aSEmmanuel Vadot clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>; 182f126890aSEmmanuel Vadot dmas = <&pdma 0>, <&pdma 1>; 183f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 184f126890aSEmmanuel Vadot status = "disabled"; 185f126890aSEmmanuel Vadot }; 186f126890aSEmmanuel Vadot 187f126890aSEmmanuel Vadot grf: syscon@11000000 { 188f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-grf", "syscon", "simple-mfd"; 189f126890aSEmmanuel Vadot reg = <0x11000000 0x1000>; 190f126890aSEmmanuel Vadot #address-cells = <1>; 191f126890aSEmmanuel Vadot #size-cells = <1>; 192f126890aSEmmanuel Vadot 193f126890aSEmmanuel Vadot io_domains: io-domains { 194f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-io-voltage-domain"; 195f126890aSEmmanuel Vadot status = "disabled"; 196f126890aSEmmanuel Vadot }; 197f126890aSEmmanuel Vadot 198f126890aSEmmanuel Vadot power: power-controller { 199f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-power-controller"; 200f126890aSEmmanuel Vadot #power-domain-cells = <1>; 201f126890aSEmmanuel Vadot #address-cells = <1>; 202f126890aSEmmanuel Vadot #size-cells = <0>; 203f126890aSEmmanuel Vadot 204f126890aSEmmanuel Vadot power-domain@RK3228_PD_VIO { 205f126890aSEmmanuel Vadot reg = <RK3228_PD_VIO>; 206f126890aSEmmanuel Vadot clocks = <&cru ACLK_HDCP>, 207f126890aSEmmanuel Vadot <&cru SCLK_HDCP>, 208f126890aSEmmanuel Vadot <&cru ACLK_IEP>, 209f126890aSEmmanuel Vadot <&cru HCLK_IEP>, 210f126890aSEmmanuel Vadot <&cru ACLK_RGA>, 211f126890aSEmmanuel Vadot <&cru HCLK_RGA>, 212f126890aSEmmanuel Vadot <&cru SCLK_RGA>; 213f126890aSEmmanuel Vadot pm_qos = <&qos_hdcp>, 214f126890aSEmmanuel Vadot <&qos_iep>, 215f126890aSEmmanuel Vadot <&qos_rga_r>, 216f126890aSEmmanuel Vadot <&qos_rga_w>; 217f126890aSEmmanuel Vadot #power-domain-cells = <0>; 218f126890aSEmmanuel Vadot }; 219f126890aSEmmanuel Vadot 220f126890aSEmmanuel Vadot power-domain@RK3228_PD_VOP { 221f126890aSEmmanuel Vadot reg = <RK3228_PD_VOP>; 222f126890aSEmmanuel Vadot clocks = <&cru ACLK_VOP>, 223f126890aSEmmanuel Vadot <&cru DCLK_VOP>, 224f126890aSEmmanuel Vadot <&cru HCLK_VOP>; 225f126890aSEmmanuel Vadot pm_qos = <&qos_vop>; 226f126890aSEmmanuel Vadot #power-domain-cells = <0>; 227f126890aSEmmanuel Vadot }; 228f126890aSEmmanuel Vadot 229f126890aSEmmanuel Vadot power-domain@RK3228_PD_VPU { 230f126890aSEmmanuel Vadot reg = <RK3228_PD_VPU>; 231f126890aSEmmanuel Vadot clocks = <&cru ACLK_VPU>, 232f126890aSEmmanuel Vadot <&cru HCLK_VPU>; 233f126890aSEmmanuel Vadot pm_qos = <&qos_vpu>; 234f126890aSEmmanuel Vadot #power-domain-cells = <0>; 235f126890aSEmmanuel Vadot }; 236f126890aSEmmanuel Vadot 237f126890aSEmmanuel Vadot power-domain@RK3228_PD_RKVDEC { 238f126890aSEmmanuel Vadot reg = <RK3228_PD_RKVDEC>; 239f126890aSEmmanuel Vadot clocks = <&cru ACLK_RKVDEC>, 240f126890aSEmmanuel Vadot <&cru HCLK_RKVDEC>, 241f126890aSEmmanuel Vadot <&cru SCLK_VDEC_CABAC>, 242f126890aSEmmanuel Vadot <&cru SCLK_VDEC_CORE>; 243f126890aSEmmanuel Vadot pm_qos = <&qos_rkvdec_r>, 244f126890aSEmmanuel Vadot <&qos_rkvdec_w>; 245f126890aSEmmanuel Vadot #power-domain-cells = <0>; 246f126890aSEmmanuel Vadot }; 247f126890aSEmmanuel Vadot 248f126890aSEmmanuel Vadot power-domain@RK3228_PD_GPU { 249f126890aSEmmanuel Vadot reg = <RK3228_PD_GPU>; 250f126890aSEmmanuel Vadot clocks = <&cru ACLK_GPU>; 251f126890aSEmmanuel Vadot pm_qos = <&qos_gpu>; 252f126890aSEmmanuel Vadot #power-domain-cells = <0>; 253f126890aSEmmanuel Vadot }; 254f126890aSEmmanuel Vadot }; 255f126890aSEmmanuel Vadot 256f126890aSEmmanuel Vadot u2phy0: usb2phy@760 { 257f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-usb2phy"; 258f126890aSEmmanuel Vadot reg = <0x0760 0x0c>; 259f126890aSEmmanuel Vadot clocks = <&cru SCLK_OTGPHY0>; 260f126890aSEmmanuel Vadot clock-names = "phyclk"; 261f126890aSEmmanuel Vadot clock-output-names = "usb480m_phy0"; 262f126890aSEmmanuel Vadot #clock-cells = <0>; 263f126890aSEmmanuel Vadot status = "disabled"; 264f126890aSEmmanuel Vadot 265f126890aSEmmanuel Vadot u2phy0_otg: otg-port { 266f126890aSEmmanuel Vadot interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 267f126890aSEmmanuel Vadot <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 268f126890aSEmmanuel Vadot <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 269f126890aSEmmanuel Vadot interrupt-names = "otg-bvalid", "otg-id", 270f126890aSEmmanuel Vadot "linestate"; 271f126890aSEmmanuel Vadot #phy-cells = <0>; 272f126890aSEmmanuel Vadot status = "disabled"; 273f126890aSEmmanuel Vadot }; 274f126890aSEmmanuel Vadot 275f126890aSEmmanuel Vadot u2phy0_host: host-port { 276f126890aSEmmanuel Vadot interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 277f126890aSEmmanuel Vadot interrupt-names = "linestate"; 278f126890aSEmmanuel Vadot #phy-cells = <0>; 279f126890aSEmmanuel Vadot status = "disabled"; 280f126890aSEmmanuel Vadot }; 281f126890aSEmmanuel Vadot }; 282f126890aSEmmanuel Vadot 283f126890aSEmmanuel Vadot u2phy1: usb2phy@800 { 284f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-usb2phy"; 285f126890aSEmmanuel Vadot reg = <0x0800 0x0c>; 286f126890aSEmmanuel Vadot clocks = <&cru SCLK_OTGPHY1>; 287f126890aSEmmanuel Vadot clock-names = "phyclk"; 288f126890aSEmmanuel Vadot clock-output-names = "usb480m_phy1"; 289f126890aSEmmanuel Vadot #clock-cells = <0>; 290f126890aSEmmanuel Vadot status = "disabled"; 291f126890aSEmmanuel Vadot 292f126890aSEmmanuel Vadot u2phy1_otg: otg-port { 293f126890aSEmmanuel Vadot interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 294f126890aSEmmanuel Vadot interrupt-names = "linestate"; 295f126890aSEmmanuel Vadot #phy-cells = <0>; 296f126890aSEmmanuel Vadot status = "disabled"; 297f126890aSEmmanuel Vadot }; 298f126890aSEmmanuel Vadot 299f126890aSEmmanuel Vadot u2phy1_host: host-port { 300f126890aSEmmanuel Vadot interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 301f126890aSEmmanuel Vadot interrupt-names = "linestate"; 302f126890aSEmmanuel Vadot #phy-cells = <0>; 303f126890aSEmmanuel Vadot status = "disabled"; 304f126890aSEmmanuel Vadot }; 305f126890aSEmmanuel Vadot }; 306f126890aSEmmanuel Vadot }; 307f126890aSEmmanuel Vadot 308f126890aSEmmanuel Vadot uart0: serial@11010000 { 309f126890aSEmmanuel Vadot compatible = "snps,dw-apb-uart"; 310f126890aSEmmanuel Vadot reg = <0x11010000 0x100>; 311f126890aSEmmanuel Vadot interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 312f126890aSEmmanuel Vadot clock-frequency = <24000000>; 313f126890aSEmmanuel Vadot clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; 314f126890aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 315f126890aSEmmanuel Vadot pinctrl-names = "default"; 316f126890aSEmmanuel Vadot pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 317f126890aSEmmanuel Vadot reg-shift = <2>; 318f126890aSEmmanuel Vadot reg-io-width = <4>; 319f126890aSEmmanuel Vadot status = "disabled"; 320f126890aSEmmanuel Vadot }; 321f126890aSEmmanuel Vadot 322f126890aSEmmanuel Vadot uart1: serial@11020000 { 323f126890aSEmmanuel Vadot compatible = "snps,dw-apb-uart"; 324f126890aSEmmanuel Vadot reg = <0x11020000 0x100>; 325f126890aSEmmanuel Vadot interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 326f126890aSEmmanuel Vadot clock-frequency = <24000000>; 327f126890aSEmmanuel Vadot clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; 328f126890aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 329f126890aSEmmanuel Vadot pinctrl-names = "default"; 330f126890aSEmmanuel Vadot pinctrl-0 = <&uart1_xfer>; 331f126890aSEmmanuel Vadot reg-shift = <2>; 332f126890aSEmmanuel Vadot reg-io-width = <4>; 333f126890aSEmmanuel Vadot status = "disabled"; 334f126890aSEmmanuel Vadot }; 335f126890aSEmmanuel Vadot 336f126890aSEmmanuel Vadot uart2: serial@11030000 { 337f126890aSEmmanuel Vadot compatible = "snps,dw-apb-uart"; 338f126890aSEmmanuel Vadot reg = <0x11030000 0x100>; 339f126890aSEmmanuel Vadot interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 340f126890aSEmmanuel Vadot clock-frequency = <24000000>; 341f126890aSEmmanuel Vadot clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; 342f126890aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 343f126890aSEmmanuel Vadot pinctrl-names = "default"; 344f126890aSEmmanuel Vadot pinctrl-0 = <&uart2_xfer>; 345f126890aSEmmanuel Vadot reg-shift = <2>; 346f126890aSEmmanuel Vadot reg-io-width = <4>; 347f126890aSEmmanuel Vadot status = "disabled"; 348f126890aSEmmanuel Vadot }; 349f126890aSEmmanuel Vadot 350f126890aSEmmanuel Vadot efuse: efuse@11040000 { 351f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-efuse"; 352f126890aSEmmanuel Vadot reg = <0x11040000 0x20>; 353f126890aSEmmanuel Vadot clocks = <&cru PCLK_EFUSE_256>; 354f126890aSEmmanuel Vadot clock-names = "pclk_efuse"; 355f126890aSEmmanuel Vadot #address-cells = <1>; 356f126890aSEmmanuel Vadot #size-cells = <1>; 357f126890aSEmmanuel Vadot 358f126890aSEmmanuel Vadot /* Data cells */ 359f126890aSEmmanuel Vadot efuse_id: id@7 { 360f126890aSEmmanuel Vadot reg = <0x7 0x10>; 361f126890aSEmmanuel Vadot }; 362f126890aSEmmanuel Vadot cpu_leakage: cpu_leakage@17 { 363f126890aSEmmanuel Vadot reg = <0x17 0x1>; 364f126890aSEmmanuel Vadot }; 365f126890aSEmmanuel Vadot }; 366f126890aSEmmanuel Vadot 367f126890aSEmmanuel Vadot i2c0: i2c@11050000 { 368f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-i2c"; 369f126890aSEmmanuel Vadot reg = <0x11050000 0x1000>; 370f126890aSEmmanuel Vadot interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 371f126890aSEmmanuel Vadot #address-cells = <1>; 372f126890aSEmmanuel Vadot #size-cells = <0>; 373f126890aSEmmanuel Vadot clock-names = "i2c"; 374f126890aSEmmanuel Vadot clocks = <&cru PCLK_I2C0>; 375f126890aSEmmanuel Vadot pinctrl-names = "default"; 376f126890aSEmmanuel Vadot pinctrl-0 = <&i2c0_xfer>; 377f126890aSEmmanuel Vadot status = "disabled"; 378f126890aSEmmanuel Vadot }; 379f126890aSEmmanuel Vadot 380f126890aSEmmanuel Vadot i2c1: i2c@11060000 { 381f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-i2c"; 382f126890aSEmmanuel Vadot reg = <0x11060000 0x1000>; 383f126890aSEmmanuel Vadot interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 384f126890aSEmmanuel Vadot #address-cells = <1>; 385f126890aSEmmanuel Vadot #size-cells = <0>; 386f126890aSEmmanuel Vadot clock-names = "i2c"; 387f126890aSEmmanuel Vadot clocks = <&cru PCLK_I2C1>; 388f126890aSEmmanuel Vadot pinctrl-names = "default"; 389f126890aSEmmanuel Vadot pinctrl-0 = <&i2c1_xfer>; 390f126890aSEmmanuel Vadot status = "disabled"; 391f126890aSEmmanuel Vadot }; 392f126890aSEmmanuel Vadot 393f126890aSEmmanuel Vadot i2c2: i2c@11070000 { 394f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-i2c"; 395f126890aSEmmanuel Vadot reg = <0x11070000 0x1000>; 396f126890aSEmmanuel Vadot interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 397f126890aSEmmanuel Vadot #address-cells = <1>; 398f126890aSEmmanuel Vadot #size-cells = <0>; 399f126890aSEmmanuel Vadot clock-names = "i2c"; 400f126890aSEmmanuel Vadot clocks = <&cru PCLK_I2C2>; 401f126890aSEmmanuel Vadot pinctrl-names = "default"; 402f126890aSEmmanuel Vadot pinctrl-0 = <&i2c2_xfer>; 403f126890aSEmmanuel Vadot status = "disabled"; 404f126890aSEmmanuel Vadot }; 405f126890aSEmmanuel Vadot 406f126890aSEmmanuel Vadot i2c3: i2c@11080000 { 407f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-i2c"; 408f126890aSEmmanuel Vadot reg = <0x11080000 0x1000>; 409f126890aSEmmanuel Vadot interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 410f126890aSEmmanuel Vadot #address-cells = <1>; 411f126890aSEmmanuel Vadot #size-cells = <0>; 412f126890aSEmmanuel Vadot clock-names = "i2c"; 413f126890aSEmmanuel Vadot clocks = <&cru PCLK_I2C3>; 414f126890aSEmmanuel Vadot pinctrl-names = "default"; 415f126890aSEmmanuel Vadot pinctrl-0 = <&i2c3_xfer>; 416f126890aSEmmanuel Vadot status = "disabled"; 417f126890aSEmmanuel Vadot }; 418f126890aSEmmanuel Vadot 419f126890aSEmmanuel Vadot spi0: spi@11090000 { 420f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-spi"; 421f126890aSEmmanuel Vadot reg = <0x11090000 0x1000>; 422f126890aSEmmanuel Vadot interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 423f126890aSEmmanuel Vadot #address-cells = <1>; 424f126890aSEmmanuel Vadot #size-cells = <0>; 425f126890aSEmmanuel Vadot clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; 426f126890aSEmmanuel Vadot clock-names = "spiclk", "apb_pclk"; 427f126890aSEmmanuel Vadot pinctrl-names = "default"; 428f126890aSEmmanuel Vadot pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0 &spi0_cs1>; 429f126890aSEmmanuel Vadot status = "disabled"; 430f126890aSEmmanuel Vadot }; 431f126890aSEmmanuel Vadot 432f126890aSEmmanuel Vadot wdt: watchdog@110a0000 { 433f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-wdt", "snps,dw-wdt"; 434f126890aSEmmanuel Vadot reg = <0x110a0000 0x100>; 435f126890aSEmmanuel Vadot interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 436f126890aSEmmanuel Vadot clocks = <&cru PCLK_CPU>; 437f126890aSEmmanuel Vadot status = "disabled"; 438f126890aSEmmanuel Vadot }; 439f126890aSEmmanuel Vadot 440f126890aSEmmanuel Vadot pwm0: pwm@110b0000 { 441f126890aSEmmanuel Vadot compatible = "rockchip,rk3288-pwm"; 442f126890aSEmmanuel Vadot reg = <0x110b0000 0x10>; 443f126890aSEmmanuel Vadot #pwm-cells = <3>; 444f126890aSEmmanuel Vadot clocks = <&cru PCLK_PWM>; 445f126890aSEmmanuel Vadot pinctrl-names = "default"; 446f126890aSEmmanuel Vadot pinctrl-0 = <&pwm0_pin>; 447f126890aSEmmanuel Vadot status = "disabled"; 448f126890aSEmmanuel Vadot }; 449f126890aSEmmanuel Vadot 450f126890aSEmmanuel Vadot pwm1: pwm@110b0010 { 451f126890aSEmmanuel Vadot compatible = "rockchip,rk3288-pwm"; 452f126890aSEmmanuel Vadot reg = <0x110b0010 0x10>; 453f126890aSEmmanuel Vadot #pwm-cells = <3>; 454f126890aSEmmanuel Vadot clocks = <&cru PCLK_PWM>; 455f126890aSEmmanuel Vadot pinctrl-names = "default"; 456f126890aSEmmanuel Vadot pinctrl-0 = <&pwm1_pin>; 457f126890aSEmmanuel Vadot status = "disabled"; 458f126890aSEmmanuel Vadot }; 459f126890aSEmmanuel Vadot 460f126890aSEmmanuel Vadot pwm2: pwm@110b0020 { 461f126890aSEmmanuel Vadot compatible = "rockchip,rk3288-pwm"; 462f126890aSEmmanuel Vadot reg = <0x110b0020 0x10>; 463f126890aSEmmanuel Vadot #pwm-cells = <3>; 464f126890aSEmmanuel Vadot clocks = <&cru PCLK_PWM>; 465f126890aSEmmanuel Vadot pinctrl-names = "default"; 466f126890aSEmmanuel Vadot pinctrl-0 = <&pwm2_pin>; 467f126890aSEmmanuel Vadot status = "disabled"; 468f126890aSEmmanuel Vadot }; 469f126890aSEmmanuel Vadot 470f126890aSEmmanuel Vadot pwm3: pwm@110b0030 { 471f126890aSEmmanuel Vadot compatible = "rockchip,rk3288-pwm"; 472f126890aSEmmanuel Vadot reg = <0x110b0030 0x10>; 473f126890aSEmmanuel Vadot #pwm-cells = <2>; 474f126890aSEmmanuel Vadot clocks = <&cru PCLK_PWM>; 475f126890aSEmmanuel Vadot pinctrl-names = "default"; 476f126890aSEmmanuel Vadot pinctrl-0 = <&pwm3_pin>; 477f126890aSEmmanuel Vadot status = "disabled"; 478f126890aSEmmanuel Vadot }; 479f126890aSEmmanuel Vadot 480f126890aSEmmanuel Vadot timer: timer@110c0000 { 481f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-timer", "rockchip,rk3288-timer"; 482f126890aSEmmanuel Vadot reg = <0x110c0000 0x20>; 483f126890aSEmmanuel Vadot interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 484f126890aSEmmanuel Vadot clocks = <&cru PCLK_TIMER>, <&xin24m>; 485f126890aSEmmanuel Vadot clock-names = "pclk", "timer"; 486f126890aSEmmanuel Vadot }; 487f126890aSEmmanuel Vadot 488f126890aSEmmanuel Vadot cru: clock-controller@110e0000 { 489f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-cru"; 490f126890aSEmmanuel Vadot reg = <0x110e0000 0x1000>; 491f126890aSEmmanuel Vadot clocks = <&xin24m>; 492f126890aSEmmanuel Vadot clock-names = "xin24m"; 493f126890aSEmmanuel Vadot rockchip,grf = <&grf>; 494f126890aSEmmanuel Vadot #clock-cells = <1>; 495f126890aSEmmanuel Vadot #reset-cells = <1>; 496f126890aSEmmanuel Vadot assigned-clocks = 497f126890aSEmmanuel Vadot <&cru PLL_GPLL>, <&cru ARMCLK>, 498f126890aSEmmanuel Vadot <&cru PLL_CPLL>, <&cru ACLK_PERI>, 499f126890aSEmmanuel Vadot <&cru HCLK_PERI>, <&cru PCLK_PERI>, 500f126890aSEmmanuel Vadot <&cru ACLK_CPU>, <&cru HCLK_CPU>, 501f126890aSEmmanuel Vadot <&cru PCLK_CPU>; 502f126890aSEmmanuel Vadot assigned-clock-rates = 503f126890aSEmmanuel Vadot <594000000>, <816000000>, 504f126890aSEmmanuel Vadot <500000000>, <150000000>, 505f126890aSEmmanuel Vadot <150000000>, <75000000>, 506f126890aSEmmanuel Vadot <150000000>, <150000000>, 507f126890aSEmmanuel Vadot <75000000>; 508f126890aSEmmanuel Vadot }; 509f126890aSEmmanuel Vadot 510f126890aSEmmanuel Vadot pdma: dma-controller@110f0000 { 511f126890aSEmmanuel Vadot compatible = "arm,pl330", "arm,primecell"; 512f126890aSEmmanuel Vadot reg = <0x110f0000 0x4000>; 513f126890aSEmmanuel Vadot interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 514f126890aSEmmanuel Vadot <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; 515f126890aSEmmanuel Vadot #dma-cells = <1>; 516f126890aSEmmanuel Vadot arm,pl330-periph-burst; 517f126890aSEmmanuel Vadot clocks = <&cru ACLK_DMAC>; 518f126890aSEmmanuel Vadot clock-names = "apb_pclk"; 519f126890aSEmmanuel Vadot }; 520f126890aSEmmanuel Vadot 521f126890aSEmmanuel Vadot thermal-zones { 522f126890aSEmmanuel Vadot cpu_thermal: cpu-thermal { 523f126890aSEmmanuel Vadot polling-delay-passive = <100>; /* milliseconds */ 524f126890aSEmmanuel Vadot polling-delay = <5000>; /* milliseconds */ 525f126890aSEmmanuel Vadot 526f126890aSEmmanuel Vadot thermal-sensors = <&tsadc 0>; 527f126890aSEmmanuel Vadot 528f126890aSEmmanuel Vadot trips { 529f126890aSEmmanuel Vadot cpu_alert0: cpu_alert0 { 530f126890aSEmmanuel Vadot temperature = <70000>; /* millicelsius */ 531f126890aSEmmanuel Vadot hysteresis = <2000>; /* millicelsius */ 532f126890aSEmmanuel Vadot type = "passive"; 533f126890aSEmmanuel Vadot }; 534f126890aSEmmanuel Vadot cpu_alert1: cpu_alert1 { 535f126890aSEmmanuel Vadot temperature = <75000>; /* millicelsius */ 536f126890aSEmmanuel Vadot hysteresis = <2000>; /* millicelsius */ 537f126890aSEmmanuel Vadot type = "passive"; 538f126890aSEmmanuel Vadot }; 539f126890aSEmmanuel Vadot cpu_crit: cpu_crit { 540f126890aSEmmanuel Vadot temperature = <90000>; /* millicelsius */ 541f126890aSEmmanuel Vadot hysteresis = <2000>; /* millicelsius */ 542f126890aSEmmanuel Vadot type = "critical"; 543f126890aSEmmanuel Vadot }; 544f126890aSEmmanuel Vadot }; 545f126890aSEmmanuel Vadot 546f126890aSEmmanuel Vadot cooling-maps { 547f126890aSEmmanuel Vadot map0 { 548f126890aSEmmanuel Vadot trip = <&cpu_alert0>; 549f126890aSEmmanuel Vadot cooling-device = 550f126890aSEmmanuel Vadot <&cpu0 THERMAL_NO_LIMIT 6>, 551f126890aSEmmanuel Vadot <&cpu1 THERMAL_NO_LIMIT 6>, 552f126890aSEmmanuel Vadot <&cpu2 THERMAL_NO_LIMIT 6>, 553f126890aSEmmanuel Vadot <&cpu3 THERMAL_NO_LIMIT 6>; 554f126890aSEmmanuel Vadot }; 555f126890aSEmmanuel Vadot map1 { 556f126890aSEmmanuel Vadot trip = <&cpu_alert1>; 557f126890aSEmmanuel Vadot cooling-device = 558f126890aSEmmanuel Vadot <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 559f126890aSEmmanuel Vadot <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 560f126890aSEmmanuel Vadot <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 561f126890aSEmmanuel Vadot <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 562f126890aSEmmanuel Vadot }; 563f126890aSEmmanuel Vadot }; 564f126890aSEmmanuel Vadot }; 565f126890aSEmmanuel Vadot }; 566f126890aSEmmanuel Vadot 567f126890aSEmmanuel Vadot tsadc: tsadc@11150000 { 568f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-tsadc"; 569f126890aSEmmanuel Vadot reg = <0x11150000 0x100>; 570f126890aSEmmanuel Vadot interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 571f126890aSEmmanuel Vadot clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; 572f126890aSEmmanuel Vadot clock-names = "tsadc", "apb_pclk"; 573f126890aSEmmanuel Vadot assigned-clocks = <&cru SCLK_TSADC>; 574f126890aSEmmanuel Vadot assigned-clock-rates = <32768>; 575f126890aSEmmanuel Vadot resets = <&cru SRST_TSADC>; 576f126890aSEmmanuel Vadot reset-names = "tsadc-apb"; 577f126890aSEmmanuel Vadot pinctrl-names = "init", "default", "sleep"; 578f126890aSEmmanuel Vadot pinctrl-0 = <&otp_pin>; 579f126890aSEmmanuel Vadot pinctrl-1 = <&otp_out>; 580f126890aSEmmanuel Vadot pinctrl-2 = <&otp_pin>; 581f126890aSEmmanuel Vadot #thermal-sensor-cells = <1>; 582f126890aSEmmanuel Vadot rockchip,hw-tshut-temp = <95000>; 583f126890aSEmmanuel Vadot status = "disabled"; 584f126890aSEmmanuel Vadot }; 585f126890aSEmmanuel Vadot 586f126890aSEmmanuel Vadot hdmi_phy: hdmi-phy@12030000 { 587f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-hdmi-phy"; 588f126890aSEmmanuel Vadot reg = <0x12030000 0x10000>; 589f126890aSEmmanuel Vadot clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMI_PHY>; 590f126890aSEmmanuel Vadot clock-names = "sysclk", "refoclk", "refpclk"; 591f126890aSEmmanuel Vadot #clock-cells = <0>; 592f126890aSEmmanuel Vadot clock-output-names = "hdmiphy_phy"; 593f126890aSEmmanuel Vadot #phy-cells = <0>; 594f126890aSEmmanuel Vadot status = "disabled"; 595f126890aSEmmanuel Vadot }; 596f126890aSEmmanuel Vadot 597f126890aSEmmanuel Vadot gpu: gpu@20000000 { 598f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-mali", "arm,mali-400"; 599f126890aSEmmanuel Vadot reg = <0x20000000 0x10000>; 600f126890aSEmmanuel Vadot interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 601f126890aSEmmanuel Vadot <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 602f126890aSEmmanuel Vadot <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 603f126890aSEmmanuel Vadot <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 604f126890aSEmmanuel Vadot <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 605f126890aSEmmanuel Vadot <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 606f126890aSEmmanuel Vadot interrupt-names = "gp", 607f126890aSEmmanuel Vadot "gpmmu", 608f126890aSEmmanuel Vadot "pp0", 609f126890aSEmmanuel Vadot "ppmmu0", 610f126890aSEmmanuel Vadot "pp1", 611f126890aSEmmanuel Vadot "ppmmu1"; 612f126890aSEmmanuel Vadot clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; 613f126890aSEmmanuel Vadot clock-names = "bus", "core"; 614f126890aSEmmanuel Vadot power-domains = <&power RK3228_PD_GPU>; 615f126890aSEmmanuel Vadot resets = <&cru SRST_GPU_A>; 616f126890aSEmmanuel Vadot status = "disabled"; 617f126890aSEmmanuel Vadot }; 618f126890aSEmmanuel Vadot 619f126890aSEmmanuel Vadot vpu: video-codec@20020000 { 620f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-vpu", "rockchip,rk3399-vpu"; 621f126890aSEmmanuel Vadot reg = <0x20020000 0x800>; 622f126890aSEmmanuel Vadot interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 623f126890aSEmmanuel Vadot <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 624f126890aSEmmanuel Vadot interrupt-names = "vepu", "vdpu"; 625f126890aSEmmanuel Vadot clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; 626f126890aSEmmanuel Vadot clock-names = "aclk", "hclk"; 627f126890aSEmmanuel Vadot iommus = <&vpu_mmu>; 628f126890aSEmmanuel Vadot power-domains = <&power RK3228_PD_VPU>; 629f126890aSEmmanuel Vadot }; 630f126890aSEmmanuel Vadot 631f126890aSEmmanuel Vadot vpu_mmu: iommu@20020800 { 632f126890aSEmmanuel Vadot compatible = "rockchip,iommu"; 633f126890aSEmmanuel Vadot reg = <0x20020800 0x100>; 634f126890aSEmmanuel Vadot interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 635f126890aSEmmanuel Vadot clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; 636f126890aSEmmanuel Vadot clock-names = "aclk", "iface"; 637f126890aSEmmanuel Vadot power-domains = <&power RK3228_PD_VPU>; 638f126890aSEmmanuel Vadot #iommu-cells = <0>; 639f126890aSEmmanuel Vadot }; 640f126890aSEmmanuel Vadot 641f126890aSEmmanuel Vadot vdec: video-codec@20030000 { 642f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-vdec", "rockchip,rk3399-vdec"; 643f126890aSEmmanuel Vadot reg = <0x20030000 0x480>; 644f126890aSEmmanuel Vadot interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 645f126890aSEmmanuel Vadot clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, 646f126890aSEmmanuel Vadot <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>; 647f126890aSEmmanuel Vadot clock-names = "axi", "ahb", "cabac", "core"; 648f126890aSEmmanuel Vadot assigned-clocks = <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>; 649f126890aSEmmanuel Vadot assigned-clock-rates = <300000000>, <300000000>; 650f126890aSEmmanuel Vadot iommus = <&vdec_mmu>; 651f126890aSEmmanuel Vadot power-domains = <&power RK3228_PD_RKVDEC>; 652f126890aSEmmanuel Vadot }; 653f126890aSEmmanuel Vadot 654f126890aSEmmanuel Vadot vdec_mmu: iommu@20030480 { 655f126890aSEmmanuel Vadot compatible = "rockchip,iommu"; 656f126890aSEmmanuel Vadot reg = <0x20030480 0x40>, <0x200304c0 0x40>; 657f126890aSEmmanuel Vadot interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 658f126890aSEmmanuel Vadot clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; 659f126890aSEmmanuel Vadot clock-names = "aclk", "iface"; 660f126890aSEmmanuel Vadot power-domains = <&power RK3228_PD_RKVDEC>; 661f126890aSEmmanuel Vadot #iommu-cells = <0>; 662f126890aSEmmanuel Vadot }; 663f126890aSEmmanuel Vadot 664f126890aSEmmanuel Vadot vop: vop@20050000 { 665f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-vop"; 666f126890aSEmmanuel Vadot reg = <0x20050000 0x1ffc>; 667f126890aSEmmanuel Vadot interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 668f126890aSEmmanuel Vadot clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>; 669f126890aSEmmanuel Vadot clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; 670f126890aSEmmanuel Vadot resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>; 671f126890aSEmmanuel Vadot reset-names = "axi", "ahb", "dclk"; 672f126890aSEmmanuel Vadot iommus = <&vop_mmu>; 673f126890aSEmmanuel Vadot power-domains = <&power RK3228_PD_VOP>; 674f126890aSEmmanuel Vadot status = "disabled"; 675f126890aSEmmanuel Vadot 676f126890aSEmmanuel Vadot vop_out: port { 677f126890aSEmmanuel Vadot #address-cells = <1>; 678f126890aSEmmanuel Vadot #size-cells = <0>; 679f126890aSEmmanuel Vadot 680f126890aSEmmanuel Vadot vop_out_hdmi: endpoint@0 { 681f126890aSEmmanuel Vadot reg = <0>; 682f126890aSEmmanuel Vadot remote-endpoint = <&hdmi_in_vop>; 683f126890aSEmmanuel Vadot }; 684f126890aSEmmanuel Vadot }; 685f126890aSEmmanuel Vadot }; 686f126890aSEmmanuel Vadot 687f126890aSEmmanuel Vadot vop_mmu: iommu@20053f00 { 688f126890aSEmmanuel Vadot compatible = "rockchip,iommu"; 689f126890aSEmmanuel Vadot reg = <0x20053f00 0x100>; 690f126890aSEmmanuel Vadot interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 691f126890aSEmmanuel Vadot clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; 692f126890aSEmmanuel Vadot clock-names = "aclk", "iface"; 693f126890aSEmmanuel Vadot power-domains = <&power RK3228_PD_VOP>; 694f126890aSEmmanuel Vadot #iommu-cells = <0>; 695f126890aSEmmanuel Vadot status = "disabled"; 696f126890aSEmmanuel Vadot }; 697f126890aSEmmanuel Vadot 698f126890aSEmmanuel Vadot rga: rga@20060000 { 699f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-rga", "rockchip,rk3288-rga"; 700f126890aSEmmanuel Vadot reg = <0x20060000 0x1000>; 701f126890aSEmmanuel Vadot interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 702f126890aSEmmanuel Vadot clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; 703f126890aSEmmanuel Vadot clock-names = "aclk", "hclk", "sclk"; 704f126890aSEmmanuel Vadot power-domains = <&power RK3228_PD_VIO>; 705f126890aSEmmanuel Vadot resets = <&cru SRST_RGA>, <&cru SRST_RGA_A>, <&cru SRST_RGA_H>; 706f126890aSEmmanuel Vadot reset-names = "core", "axi", "ahb"; 707f126890aSEmmanuel Vadot }; 708f126890aSEmmanuel Vadot 709f126890aSEmmanuel Vadot iep_mmu: iommu@20070800 { 710f126890aSEmmanuel Vadot compatible = "rockchip,iommu"; 711f126890aSEmmanuel Vadot reg = <0x20070800 0x100>; 712f126890aSEmmanuel Vadot interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 713f126890aSEmmanuel Vadot clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; 714f126890aSEmmanuel Vadot clock-names = "aclk", "iface"; 715f126890aSEmmanuel Vadot power-domains = <&power RK3228_PD_VIO>; 716f126890aSEmmanuel Vadot #iommu-cells = <0>; 717f126890aSEmmanuel Vadot status = "disabled"; 718f126890aSEmmanuel Vadot }; 719f126890aSEmmanuel Vadot 720f126890aSEmmanuel Vadot hdmi: hdmi@200a0000 { 721f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-dw-hdmi"; 722f126890aSEmmanuel Vadot reg = <0x200a0000 0x20000>; 723f126890aSEmmanuel Vadot reg-io-width = <4>; 724f126890aSEmmanuel Vadot interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 725f126890aSEmmanuel Vadot assigned-clocks = <&cru SCLK_HDMI_PHY>; 726f126890aSEmmanuel Vadot assigned-clock-parents = <&hdmi_phy>; 727f126890aSEmmanuel Vadot clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>; 728f126890aSEmmanuel Vadot clock-names = "iahb", "isfr", "cec"; 729f126890aSEmmanuel Vadot pinctrl-names = "default"; 730f126890aSEmmanuel Vadot pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>; 731f126890aSEmmanuel Vadot resets = <&cru SRST_HDMI_P>; 732f126890aSEmmanuel Vadot reset-names = "hdmi"; 733f126890aSEmmanuel Vadot phys = <&hdmi_phy>; 734f126890aSEmmanuel Vadot phy-names = "hdmi"; 735f126890aSEmmanuel Vadot rockchip,grf = <&grf>; 736f126890aSEmmanuel Vadot status = "disabled"; 737f126890aSEmmanuel Vadot 738f126890aSEmmanuel Vadot ports { 739f126890aSEmmanuel Vadot hdmi_in: port { 740f126890aSEmmanuel Vadot #address-cells = <1>; 741f126890aSEmmanuel Vadot #size-cells = <0>; 742f126890aSEmmanuel Vadot hdmi_in_vop: endpoint@0 { 743f126890aSEmmanuel Vadot reg = <0>; 744f126890aSEmmanuel Vadot remote-endpoint = <&vop_out_hdmi>; 745f126890aSEmmanuel Vadot }; 746f126890aSEmmanuel Vadot }; 747f126890aSEmmanuel Vadot }; 748f126890aSEmmanuel Vadot }; 749f126890aSEmmanuel Vadot 750f126890aSEmmanuel Vadot sdmmc: mmc@30000000 { 751f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc"; 752f126890aSEmmanuel Vadot reg = <0x30000000 0x4000>; 753f126890aSEmmanuel Vadot interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 754f126890aSEmmanuel Vadot clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, 755f126890aSEmmanuel Vadot <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; 756f126890aSEmmanuel Vadot clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; 757f126890aSEmmanuel Vadot fifo-depth = <0x100>; 758f126890aSEmmanuel Vadot pinctrl-names = "default"; 759f126890aSEmmanuel Vadot pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; 760f126890aSEmmanuel Vadot status = "disabled"; 761f126890aSEmmanuel Vadot }; 762f126890aSEmmanuel Vadot 763f126890aSEmmanuel Vadot sdio: mmc@30010000 { 764f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc"; 765f126890aSEmmanuel Vadot reg = <0x30010000 0x4000>; 766f126890aSEmmanuel Vadot interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 767f126890aSEmmanuel Vadot clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, 768f126890aSEmmanuel Vadot <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; 769f126890aSEmmanuel Vadot clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; 770f126890aSEmmanuel Vadot fifo-depth = <0x100>; 771f126890aSEmmanuel Vadot pinctrl-names = "default"; 772f126890aSEmmanuel Vadot pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>; 773f126890aSEmmanuel Vadot status = "disabled"; 774f126890aSEmmanuel Vadot }; 775f126890aSEmmanuel Vadot 776f126890aSEmmanuel Vadot emmc: mmc@30020000 { 777f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc"; 778f126890aSEmmanuel Vadot reg = <0x30020000 0x4000>; 779f126890aSEmmanuel Vadot interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 780f126890aSEmmanuel Vadot clock-frequency = <37500000>; 781f126890aSEmmanuel Vadot max-frequency = <37500000>; 782f126890aSEmmanuel Vadot clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, 783f126890aSEmmanuel Vadot <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; 784f126890aSEmmanuel Vadot clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; 785f126890aSEmmanuel Vadot bus-width = <8>; 786f126890aSEmmanuel Vadot rockchip,default-sample-phase = <158>; 787f126890aSEmmanuel Vadot fifo-depth = <0x100>; 788f126890aSEmmanuel Vadot pinctrl-names = "default"; 789f126890aSEmmanuel Vadot pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 790f126890aSEmmanuel Vadot resets = <&cru SRST_EMMC>; 791f126890aSEmmanuel Vadot reset-names = "reset"; 792f126890aSEmmanuel Vadot status = "disabled"; 793f126890aSEmmanuel Vadot }; 794f126890aSEmmanuel Vadot 795f126890aSEmmanuel Vadot usb_otg: usb@30040000 { 796f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-usb", "rockchip,rk3066-usb", 797f126890aSEmmanuel Vadot "snps,dwc2"; 798f126890aSEmmanuel Vadot reg = <0x30040000 0x40000>; 799f126890aSEmmanuel Vadot interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 800f126890aSEmmanuel Vadot clocks = <&cru HCLK_OTG>; 801f126890aSEmmanuel Vadot clock-names = "otg"; 802f126890aSEmmanuel Vadot dr_mode = "otg"; 803f126890aSEmmanuel Vadot g-np-tx-fifo-size = <16>; 804f126890aSEmmanuel Vadot g-rx-fifo-size = <280>; 805f126890aSEmmanuel Vadot g-tx-fifo-size = <256 128 128 64 32 16>; 806f126890aSEmmanuel Vadot phys = <&u2phy0_otg>; 807f126890aSEmmanuel Vadot phy-names = "usb2-phy"; 808f126890aSEmmanuel Vadot status = "disabled"; 809f126890aSEmmanuel Vadot }; 810f126890aSEmmanuel Vadot 811f126890aSEmmanuel Vadot usb_host0_ehci: usb@30080000 { 812f126890aSEmmanuel Vadot compatible = "generic-ehci"; 813f126890aSEmmanuel Vadot reg = <0x30080000 0x20000>; 814f126890aSEmmanuel Vadot interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 815f126890aSEmmanuel Vadot clocks = <&cru HCLK_HOST0>, <&u2phy0>; 816f126890aSEmmanuel Vadot phys = <&u2phy0_host>; 817f126890aSEmmanuel Vadot phy-names = "usb"; 818f126890aSEmmanuel Vadot status = "disabled"; 819f126890aSEmmanuel Vadot }; 820f126890aSEmmanuel Vadot 821f126890aSEmmanuel Vadot usb_host0_ohci: usb@300a0000 { 822f126890aSEmmanuel Vadot compatible = "generic-ohci"; 823f126890aSEmmanuel Vadot reg = <0x300a0000 0x20000>; 824f126890aSEmmanuel Vadot interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 825f126890aSEmmanuel Vadot clocks = <&cru HCLK_HOST0>, <&u2phy0>; 826f126890aSEmmanuel Vadot phys = <&u2phy0_host>; 827f126890aSEmmanuel Vadot phy-names = "usb"; 828f126890aSEmmanuel Vadot status = "disabled"; 829f126890aSEmmanuel Vadot }; 830f126890aSEmmanuel Vadot 831f126890aSEmmanuel Vadot usb_host1_ehci: usb@300c0000 { 832f126890aSEmmanuel Vadot compatible = "generic-ehci"; 833f126890aSEmmanuel Vadot reg = <0x300c0000 0x20000>; 834f126890aSEmmanuel Vadot interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 835f126890aSEmmanuel Vadot clocks = <&cru HCLK_HOST1>, <&u2phy1>; 836f126890aSEmmanuel Vadot phys = <&u2phy1_otg>; 837f126890aSEmmanuel Vadot phy-names = "usb"; 838f126890aSEmmanuel Vadot status = "disabled"; 839f126890aSEmmanuel Vadot }; 840f126890aSEmmanuel Vadot 841f126890aSEmmanuel Vadot usb_host1_ohci: usb@300e0000 { 842f126890aSEmmanuel Vadot compatible = "generic-ohci"; 843f126890aSEmmanuel Vadot reg = <0x300e0000 0x20000>; 844f126890aSEmmanuel Vadot interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 845f126890aSEmmanuel Vadot clocks = <&cru HCLK_HOST1>, <&u2phy1>; 846f126890aSEmmanuel Vadot phys = <&u2phy1_otg>; 847f126890aSEmmanuel Vadot phy-names = "usb"; 848f126890aSEmmanuel Vadot status = "disabled"; 849f126890aSEmmanuel Vadot }; 850f126890aSEmmanuel Vadot 851f126890aSEmmanuel Vadot usb_host2_ehci: usb@30100000 { 852f126890aSEmmanuel Vadot compatible = "generic-ehci"; 853f126890aSEmmanuel Vadot reg = <0x30100000 0x20000>; 854f126890aSEmmanuel Vadot interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 855f126890aSEmmanuel Vadot clocks = <&cru HCLK_HOST2>, <&u2phy1>; 856f126890aSEmmanuel Vadot phys = <&u2phy1_host>; 857f126890aSEmmanuel Vadot phy-names = "usb"; 858f126890aSEmmanuel Vadot status = "disabled"; 859f126890aSEmmanuel Vadot }; 860f126890aSEmmanuel Vadot 861f126890aSEmmanuel Vadot usb_host2_ohci: usb@30120000 { 862f126890aSEmmanuel Vadot compatible = "generic-ohci"; 863f126890aSEmmanuel Vadot reg = <0x30120000 0x20000>; 864f126890aSEmmanuel Vadot interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 865f126890aSEmmanuel Vadot clocks = <&cru HCLK_HOST2>, <&u2phy1>; 866f126890aSEmmanuel Vadot phys = <&u2phy1_host>; 867f126890aSEmmanuel Vadot phy-names = "usb"; 868f126890aSEmmanuel Vadot status = "disabled"; 869f126890aSEmmanuel Vadot }; 870f126890aSEmmanuel Vadot 871f126890aSEmmanuel Vadot gmac: ethernet@30200000 { 872f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-gmac"; 873f126890aSEmmanuel Vadot reg = <0x30200000 0x10000>; 874f126890aSEmmanuel Vadot interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 875f126890aSEmmanuel Vadot interrupt-names = "macirq"; 876f126890aSEmmanuel Vadot clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>, 877f126890aSEmmanuel Vadot <&cru SCLK_MAC_TX>, <&cru SCLK_MAC_REF>, 878f126890aSEmmanuel Vadot <&cru SCLK_MAC_REFOUT>, <&cru ACLK_GMAC>, 879f126890aSEmmanuel Vadot <&cru PCLK_GMAC>; 880f126890aSEmmanuel Vadot clock-names = "stmmaceth", "mac_clk_rx", 881f126890aSEmmanuel Vadot "mac_clk_tx", "clk_mac_ref", 882f126890aSEmmanuel Vadot "clk_mac_refout", "aclk_mac", 883f126890aSEmmanuel Vadot "pclk_mac"; 884f126890aSEmmanuel Vadot resets = <&cru SRST_GMAC>; 885f126890aSEmmanuel Vadot reset-names = "stmmaceth"; 886f126890aSEmmanuel Vadot rockchip,grf = <&grf>; 887f126890aSEmmanuel Vadot status = "disabled"; 888f126890aSEmmanuel Vadot }; 889f126890aSEmmanuel Vadot 890f126890aSEmmanuel Vadot qos_iep: qos@31030080 { 891f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-qos", "syscon"; 892f126890aSEmmanuel Vadot reg = <0x31030080 0x20>; 893f126890aSEmmanuel Vadot }; 894f126890aSEmmanuel Vadot 895f126890aSEmmanuel Vadot qos_rga_w: qos@31030100 { 896f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-qos", "syscon"; 897f126890aSEmmanuel Vadot reg = <0x31030100 0x20>; 898f126890aSEmmanuel Vadot }; 899f126890aSEmmanuel Vadot 900f126890aSEmmanuel Vadot qos_hdcp: qos@31030180 { 901f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-qos", "syscon"; 902f126890aSEmmanuel Vadot reg = <0x31030180 0x20>; 903f126890aSEmmanuel Vadot }; 904f126890aSEmmanuel Vadot 905f126890aSEmmanuel Vadot qos_rga_r: qos@31030200 { 906f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-qos", "syscon"; 907f126890aSEmmanuel Vadot reg = <0x31030200 0x20>; 908f126890aSEmmanuel Vadot }; 909f126890aSEmmanuel Vadot 910f126890aSEmmanuel Vadot qos_vpu: qos@31040000 { 911f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-qos", "syscon"; 912f126890aSEmmanuel Vadot reg = <0x31040000 0x20>; 913f126890aSEmmanuel Vadot }; 914f126890aSEmmanuel Vadot 915f126890aSEmmanuel Vadot qos_gpu: qos@31050000 { 916f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-qos", "syscon"; 917f126890aSEmmanuel Vadot reg = <0x31050000 0x20>; 918f126890aSEmmanuel Vadot }; 919f126890aSEmmanuel Vadot 920f126890aSEmmanuel Vadot qos_vop: qos@31060000 { 921f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-qos", "syscon"; 922f126890aSEmmanuel Vadot reg = <0x31060000 0x20>; 923f126890aSEmmanuel Vadot }; 924f126890aSEmmanuel Vadot 925f126890aSEmmanuel Vadot qos_rkvdec_r: qos@31070000 { 926f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-qos", "syscon"; 927f126890aSEmmanuel Vadot reg = <0x31070000 0x20>; 928f126890aSEmmanuel Vadot }; 929f126890aSEmmanuel Vadot 930f126890aSEmmanuel Vadot qos_rkvdec_w: qos@31070080 { 931f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-qos", "syscon"; 932f126890aSEmmanuel Vadot reg = <0x31070080 0x20>; 933f126890aSEmmanuel Vadot }; 934f126890aSEmmanuel Vadot 935f126890aSEmmanuel Vadot gic: interrupt-controller@32010000 { 936f126890aSEmmanuel Vadot compatible = "arm,gic-400"; 937f126890aSEmmanuel Vadot interrupt-controller; 938f126890aSEmmanuel Vadot #interrupt-cells = <3>; 939f126890aSEmmanuel Vadot #address-cells = <0>; 940f126890aSEmmanuel Vadot 941f126890aSEmmanuel Vadot reg = <0x32011000 0x1000>, 942f126890aSEmmanuel Vadot <0x32012000 0x2000>, 943f126890aSEmmanuel Vadot <0x32014000 0x2000>, 944f126890aSEmmanuel Vadot <0x32016000 0x2000>; 945f126890aSEmmanuel Vadot interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 946f126890aSEmmanuel Vadot }; 947f126890aSEmmanuel Vadot 948f126890aSEmmanuel Vadot pinctrl: pinctrl { 949f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-pinctrl"; 950f126890aSEmmanuel Vadot rockchip,grf = <&grf>; 951f126890aSEmmanuel Vadot #address-cells = <1>; 952f126890aSEmmanuel Vadot #size-cells = <1>; 953f126890aSEmmanuel Vadot ranges; 954f126890aSEmmanuel Vadot 955f126890aSEmmanuel Vadot gpio0: gpio@11110000 { 956f126890aSEmmanuel Vadot compatible = "rockchip,gpio-bank"; 957f126890aSEmmanuel Vadot reg = <0x11110000 0x100>; 958f126890aSEmmanuel Vadot interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 959f126890aSEmmanuel Vadot clocks = <&cru PCLK_GPIO0>; 960f126890aSEmmanuel Vadot 961f126890aSEmmanuel Vadot gpio-controller; 962f126890aSEmmanuel Vadot #gpio-cells = <2>; 963f126890aSEmmanuel Vadot 964f126890aSEmmanuel Vadot interrupt-controller; 965f126890aSEmmanuel Vadot #interrupt-cells = <2>; 966f126890aSEmmanuel Vadot }; 967f126890aSEmmanuel Vadot 968f126890aSEmmanuel Vadot gpio1: gpio@11120000 { 969f126890aSEmmanuel Vadot compatible = "rockchip,gpio-bank"; 970f126890aSEmmanuel Vadot reg = <0x11120000 0x100>; 971f126890aSEmmanuel Vadot interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 972f126890aSEmmanuel Vadot clocks = <&cru PCLK_GPIO1>; 973f126890aSEmmanuel Vadot 974f126890aSEmmanuel Vadot gpio-controller; 975f126890aSEmmanuel Vadot #gpio-cells = <2>; 976f126890aSEmmanuel Vadot 977f126890aSEmmanuel Vadot interrupt-controller; 978f126890aSEmmanuel Vadot #interrupt-cells = <2>; 979f126890aSEmmanuel Vadot }; 980f126890aSEmmanuel Vadot 981f126890aSEmmanuel Vadot gpio2: gpio@11130000 { 982f126890aSEmmanuel Vadot compatible = "rockchip,gpio-bank"; 983f126890aSEmmanuel Vadot reg = <0x11130000 0x100>; 984f126890aSEmmanuel Vadot interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 985f126890aSEmmanuel Vadot clocks = <&cru PCLK_GPIO2>; 986f126890aSEmmanuel Vadot 987f126890aSEmmanuel Vadot gpio-controller; 988f126890aSEmmanuel Vadot #gpio-cells = <2>; 989f126890aSEmmanuel Vadot 990f126890aSEmmanuel Vadot interrupt-controller; 991f126890aSEmmanuel Vadot #interrupt-cells = <2>; 992f126890aSEmmanuel Vadot }; 993f126890aSEmmanuel Vadot 994f126890aSEmmanuel Vadot gpio3: gpio@11140000 { 995f126890aSEmmanuel Vadot compatible = "rockchip,gpio-bank"; 996f126890aSEmmanuel Vadot reg = <0x11140000 0x100>; 997f126890aSEmmanuel Vadot interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 998f126890aSEmmanuel Vadot clocks = <&cru PCLK_GPIO3>; 999f126890aSEmmanuel Vadot 1000f126890aSEmmanuel Vadot gpio-controller; 1001f126890aSEmmanuel Vadot #gpio-cells = <2>; 1002f126890aSEmmanuel Vadot 1003f126890aSEmmanuel Vadot interrupt-controller; 1004f126890aSEmmanuel Vadot #interrupt-cells = <2>; 1005f126890aSEmmanuel Vadot }; 1006f126890aSEmmanuel Vadot 1007f126890aSEmmanuel Vadot pcfg_pull_up: pcfg-pull-up { 1008f126890aSEmmanuel Vadot bias-pull-up; 1009f126890aSEmmanuel Vadot }; 1010f126890aSEmmanuel Vadot 1011f126890aSEmmanuel Vadot pcfg_pull_down: pcfg-pull-down { 1012f126890aSEmmanuel Vadot bias-pull-down; 1013f126890aSEmmanuel Vadot }; 1014f126890aSEmmanuel Vadot 1015f126890aSEmmanuel Vadot pcfg_pull_none: pcfg-pull-none { 1016f126890aSEmmanuel Vadot bias-disable; 1017f126890aSEmmanuel Vadot }; 1018f126890aSEmmanuel Vadot 1019f126890aSEmmanuel Vadot pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma { 1020f126890aSEmmanuel Vadot drive-strength = <12>; 1021f126890aSEmmanuel Vadot }; 1022f126890aSEmmanuel Vadot 1023f126890aSEmmanuel Vadot sdmmc { 1024f126890aSEmmanuel Vadot sdmmc_clk: sdmmc-clk { 1025f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none_drv_12ma>; 1026f126890aSEmmanuel Vadot }; 1027f126890aSEmmanuel Vadot 1028f126890aSEmmanuel Vadot sdmmc_cmd: sdmmc-cmd { 1029f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PB7 1 &pcfg_pull_none_drv_12ma>; 1030f126890aSEmmanuel Vadot }; 1031f126890aSEmmanuel Vadot 1032f126890aSEmmanuel Vadot sdmmc_bus4: sdmmc-bus4 { 1033f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PC2 1 &pcfg_pull_none_drv_12ma>, 1034f126890aSEmmanuel Vadot <1 RK_PC3 1 &pcfg_pull_none_drv_12ma>, 1035f126890aSEmmanuel Vadot <1 RK_PC4 1 &pcfg_pull_none_drv_12ma>, 1036f126890aSEmmanuel Vadot <1 RK_PC5 1 &pcfg_pull_none_drv_12ma>; 1037f126890aSEmmanuel Vadot }; 1038f126890aSEmmanuel Vadot }; 1039f126890aSEmmanuel Vadot 1040f126890aSEmmanuel Vadot sdio { 1041f126890aSEmmanuel Vadot sdio_clk: sdio-clk { 1042f126890aSEmmanuel Vadot rockchip,pins = <3 RK_PA0 1 &pcfg_pull_none_drv_12ma>; 1043f126890aSEmmanuel Vadot }; 1044f126890aSEmmanuel Vadot 1045f126890aSEmmanuel Vadot sdio_cmd: sdio-cmd { 1046f126890aSEmmanuel Vadot rockchip,pins = <3 RK_PA1 1 &pcfg_pull_none_drv_12ma>; 1047f126890aSEmmanuel Vadot }; 1048f126890aSEmmanuel Vadot 1049f126890aSEmmanuel Vadot sdio_bus4: sdio-bus4 { 1050f126890aSEmmanuel Vadot rockchip,pins = <3 RK_PA2 1 &pcfg_pull_none_drv_12ma>, 1051f126890aSEmmanuel Vadot <3 RK_PA3 1 &pcfg_pull_none_drv_12ma>, 1052f126890aSEmmanuel Vadot <3 RK_PA4 1 &pcfg_pull_none_drv_12ma>, 1053f126890aSEmmanuel Vadot <3 RK_PA5 1 &pcfg_pull_none_drv_12ma>; 1054f126890aSEmmanuel Vadot }; 1055f126890aSEmmanuel Vadot }; 1056f126890aSEmmanuel Vadot 1057f126890aSEmmanuel Vadot emmc { 1058f126890aSEmmanuel Vadot emmc_clk: emmc-clk { 1059f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PA7 2 &pcfg_pull_none>; 1060f126890aSEmmanuel Vadot }; 1061f126890aSEmmanuel Vadot 1062f126890aSEmmanuel Vadot emmc_cmd: emmc-cmd { 1063f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PC6 2 &pcfg_pull_none>; 1064f126890aSEmmanuel Vadot }; 1065f126890aSEmmanuel Vadot 1066f126890aSEmmanuel Vadot emmc_bus8: emmc-bus8 { 1067f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PD0 2 &pcfg_pull_none>, 1068f126890aSEmmanuel Vadot <1 RK_PD1 2 &pcfg_pull_none>, 1069f126890aSEmmanuel Vadot <1 RK_PD2 2 &pcfg_pull_none>, 1070f126890aSEmmanuel Vadot <1 RK_PD3 2 &pcfg_pull_none>, 1071f126890aSEmmanuel Vadot <1 RK_PD4 2 &pcfg_pull_none>, 1072f126890aSEmmanuel Vadot <1 RK_PD5 2 &pcfg_pull_none>, 1073f126890aSEmmanuel Vadot <1 RK_PD6 2 &pcfg_pull_none>, 1074f126890aSEmmanuel Vadot <1 RK_PD7 2 &pcfg_pull_none>; 1075f126890aSEmmanuel Vadot }; 1076f126890aSEmmanuel Vadot }; 1077f126890aSEmmanuel Vadot 1078f126890aSEmmanuel Vadot gmac { 1079f126890aSEmmanuel Vadot rgmii_pins: rgmii-pins { 1080f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PB6 1 &pcfg_pull_none>, 1081f126890aSEmmanuel Vadot <2 RK_PB4 1 &pcfg_pull_none>, 1082f126890aSEmmanuel Vadot <2 RK_PD1 1 &pcfg_pull_none>, 1083f126890aSEmmanuel Vadot <2 RK_PC3 1 &pcfg_pull_none_drv_12ma>, 1084f126890aSEmmanuel Vadot <2 RK_PC2 1 &pcfg_pull_none_drv_12ma>, 1085f126890aSEmmanuel Vadot <2 RK_PC6 1 &pcfg_pull_none_drv_12ma>, 1086f126890aSEmmanuel Vadot <2 RK_PC7 1 &pcfg_pull_none_drv_12ma>, 1087f126890aSEmmanuel Vadot <2 RK_PB1 1 &pcfg_pull_none_drv_12ma>, 1088f126890aSEmmanuel Vadot <2 RK_PB5 1 &pcfg_pull_none_drv_12ma>, 1089f126890aSEmmanuel Vadot <2 RK_PC1 1 &pcfg_pull_none>, 1090f126890aSEmmanuel Vadot <2 RK_PC0 1 &pcfg_pull_none>, 1091f126890aSEmmanuel Vadot <2 RK_PC5 2 &pcfg_pull_none>, 1092f126890aSEmmanuel Vadot <2 RK_PC4 2 &pcfg_pull_none>, 1093f126890aSEmmanuel Vadot <2 RK_PB3 1 &pcfg_pull_none>, 1094f126890aSEmmanuel Vadot <2 RK_PB0 1 &pcfg_pull_none>; 1095f126890aSEmmanuel Vadot }; 1096f126890aSEmmanuel Vadot 1097f126890aSEmmanuel Vadot rmii_pins: rmii-pins { 1098f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PB6 1 &pcfg_pull_none>, 1099f126890aSEmmanuel Vadot <2 RK_PB4 1 &pcfg_pull_none>, 1100f126890aSEmmanuel Vadot <2 RK_PD1 1 &pcfg_pull_none>, 1101f126890aSEmmanuel Vadot <2 RK_PC3 1 &pcfg_pull_none_drv_12ma>, 1102f126890aSEmmanuel Vadot <2 RK_PC2 1 &pcfg_pull_none_drv_12ma>, 1103f126890aSEmmanuel Vadot <2 RK_PB5 1 &pcfg_pull_none_drv_12ma>, 1104f126890aSEmmanuel Vadot <2 RK_PC1 1 &pcfg_pull_none>, 1105f126890aSEmmanuel Vadot <2 RK_PC0 1 &pcfg_pull_none>, 1106f126890aSEmmanuel Vadot <2 RK_PB0 1 &pcfg_pull_none>, 1107f126890aSEmmanuel Vadot <2 RK_PB7 1 &pcfg_pull_none>; 1108f126890aSEmmanuel Vadot }; 1109f126890aSEmmanuel Vadot 1110f126890aSEmmanuel Vadot phy_pins: phy-pins { 1111f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PB6 2 &pcfg_pull_none>, 1112f126890aSEmmanuel Vadot <2 RK_PB0 2 &pcfg_pull_none>; 1113f126890aSEmmanuel Vadot }; 1114f126890aSEmmanuel Vadot }; 1115f126890aSEmmanuel Vadot 1116f126890aSEmmanuel Vadot hdmi { 1117f126890aSEmmanuel Vadot hdmi_hpd: hdmi-hpd { 1118f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PB7 1 &pcfg_pull_down>; 1119f126890aSEmmanuel Vadot }; 1120f126890aSEmmanuel Vadot 1121f126890aSEmmanuel Vadot hdmii2c_xfer: hdmii2c-xfer { 1122f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PA6 2 &pcfg_pull_none>, 1123f126890aSEmmanuel Vadot <0 RK_PA7 2 &pcfg_pull_none>; 1124f126890aSEmmanuel Vadot }; 1125f126890aSEmmanuel Vadot 1126f126890aSEmmanuel Vadot hdmi_cec: hdmi-cec { 1127f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PC4 1 &pcfg_pull_none>; 1128f126890aSEmmanuel Vadot }; 1129f126890aSEmmanuel Vadot }; 1130f126890aSEmmanuel Vadot 1131f126890aSEmmanuel Vadot i2c0 { 1132f126890aSEmmanuel Vadot i2c0_xfer: i2c0-xfer { 1133f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>, 1134f126890aSEmmanuel Vadot <0 RK_PA1 1 &pcfg_pull_none>; 1135f126890aSEmmanuel Vadot }; 1136f126890aSEmmanuel Vadot }; 1137f126890aSEmmanuel Vadot 1138f126890aSEmmanuel Vadot i2c1 { 1139f126890aSEmmanuel Vadot i2c1_xfer: i2c1-xfer { 1140f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PA2 1 &pcfg_pull_none>, 1141f126890aSEmmanuel Vadot <0 RK_PA3 1 &pcfg_pull_none>; 1142f126890aSEmmanuel Vadot }; 1143f126890aSEmmanuel Vadot }; 1144f126890aSEmmanuel Vadot 1145f126890aSEmmanuel Vadot i2c2 { 1146f126890aSEmmanuel Vadot i2c2_xfer: i2c2-xfer { 1147f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PC4 1 &pcfg_pull_none>, 1148f126890aSEmmanuel Vadot <2 RK_PC5 1 &pcfg_pull_none>; 1149f126890aSEmmanuel Vadot }; 1150f126890aSEmmanuel Vadot }; 1151f126890aSEmmanuel Vadot 1152f126890aSEmmanuel Vadot i2c3 { 1153f126890aSEmmanuel Vadot i2c3_xfer: i2c3-xfer { 1154f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>, 1155f126890aSEmmanuel Vadot <0 RK_PA7 1 &pcfg_pull_none>; 1156f126890aSEmmanuel Vadot }; 1157f126890aSEmmanuel Vadot }; 1158f126890aSEmmanuel Vadot 1159f126890aSEmmanuel Vadot spi0 { 1160f126890aSEmmanuel Vadot spi0_clk: spi0-clk { 1161f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PB1 2 &pcfg_pull_up>; 1162f126890aSEmmanuel Vadot }; 1163f126890aSEmmanuel Vadot spi0_cs0: spi0-cs0 { 1164f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PB6 2 &pcfg_pull_up>; 1165f126890aSEmmanuel Vadot }; 1166f126890aSEmmanuel Vadot spi0_tx: spi0-tx { 1167f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PB3 2 &pcfg_pull_up>; 1168f126890aSEmmanuel Vadot }; 1169f126890aSEmmanuel Vadot spi0_rx: spi0-rx { 1170f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PB5 2 &pcfg_pull_up>; 1171f126890aSEmmanuel Vadot }; 1172f126890aSEmmanuel Vadot spi0_cs1: spi0-cs1 { 1173f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PB4 1 &pcfg_pull_up>; 1174f126890aSEmmanuel Vadot }; 1175f126890aSEmmanuel Vadot }; 1176f126890aSEmmanuel Vadot 1177f126890aSEmmanuel Vadot spi1 { 1178f126890aSEmmanuel Vadot spi1_clk: spi1-clk { 1179f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PC7 2 &pcfg_pull_up>; 1180f126890aSEmmanuel Vadot }; 1181f126890aSEmmanuel Vadot spi1_cs0: spi1-cs0 { 1182f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PA2 2 &pcfg_pull_up>; 1183f126890aSEmmanuel Vadot }; 1184f126890aSEmmanuel Vadot spi1_rx: spi1-rx { 1185f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PA0 2 &pcfg_pull_up>; 1186f126890aSEmmanuel Vadot }; 1187f126890aSEmmanuel Vadot spi1_tx: spi1-tx { 1188f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PA1 2 &pcfg_pull_up>; 1189f126890aSEmmanuel Vadot }; 1190f126890aSEmmanuel Vadot spi1_cs1: spi1-cs1 { 1191f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PA3 2 &pcfg_pull_up>; 1192f126890aSEmmanuel Vadot }; 1193f126890aSEmmanuel Vadot }; 1194f126890aSEmmanuel Vadot 1195f126890aSEmmanuel Vadot i2s1 { 1196f126890aSEmmanuel Vadot i2s1_bus: i2s1-bus { 1197f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PB0 1 &pcfg_pull_none>, 1198f126890aSEmmanuel Vadot <0 RK_PB1 1 &pcfg_pull_none>, 1199f126890aSEmmanuel Vadot <0 RK_PB3 1 &pcfg_pull_none>, 1200f126890aSEmmanuel Vadot <0 RK_PB4 1 &pcfg_pull_none>, 1201f126890aSEmmanuel Vadot <0 RK_PB5 1 &pcfg_pull_none>, 1202f126890aSEmmanuel Vadot <0 RK_PB6 1 &pcfg_pull_none>, 1203f126890aSEmmanuel Vadot <1 RK_PA2 2 &pcfg_pull_none>, 1204f126890aSEmmanuel Vadot <1 RK_PA4 2 &pcfg_pull_none>, 1205f126890aSEmmanuel Vadot <1 RK_PA5 2 &pcfg_pull_none>; 1206f126890aSEmmanuel Vadot }; 1207f126890aSEmmanuel Vadot }; 1208f126890aSEmmanuel Vadot 1209f126890aSEmmanuel Vadot pwm0 { 1210f126890aSEmmanuel Vadot pwm0_pin: pwm0-pin { 1211f126890aSEmmanuel Vadot rockchip,pins = <3 RK_PC5 1 &pcfg_pull_none>; 1212f126890aSEmmanuel Vadot }; 1213f126890aSEmmanuel Vadot }; 1214f126890aSEmmanuel Vadot 1215f126890aSEmmanuel Vadot pwm1 { 1216f126890aSEmmanuel Vadot pwm1_pin: pwm1-pin { 1217f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>; 1218f126890aSEmmanuel Vadot }; 1219f126890aSEmmanuel Vadot }; 1220f126890aSEmmanuel Vadot 1221f126890aSEmmanuel Vadot pwm2 { 1222f126890aSEmmanuel Vadot pwm2_pin: pwm2-pin { 1223f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PB4 2 &pcfg_pull_none>; 1224f126890aSEmmanuel Vadot }; 1225f126890aSEmmanuel Vadot }; 1226f126890aSEmmanuel Vadot 1227f126890aSEmmanuel Vadot pwm3 { 1228f126890aSEmmanuel Vadot pwm3_pin: pwm3-pin { 1229f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PB3 2 &pcfg_pull_none>; 1230f126890aSEmmanuel Vadot }; 1231f126890aSEmmanuel Vadot }; 1232f126890aSEmmanuel Vadot 1233f126890aSEmmanuel Vadot spdif { 1234f126890aSEmmanuel Vadot spdif_tx: spdif-tx { 1235f126890aSEmmanuel Vadot rockchip,pins = <3 RK_PD7 2 &pcfg_pull_none>; 1236f126890aSEmmanuel Vadot }; 1237f126890aSEmmanuel Vadot }; 1238f126890aSEmmanuel Vadot 1239f126890aSEmmanuel Vadot tsadc { 1240f126890aSEmmanuel Vadot otp_pin: otp-pin { 1241f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 1242f126890aSEmmanuel Vadot }; 1243f126890aSEmmanuel Vadot 1244f126890aSEmmanuel Vadot otp_out: otp-out { 1245f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PD0 2 &pcfg_pull_none>; 1246f126890aSEmmanuel Vadot }; 1247f126890aSEmmanuel Vadot }; 1248f126890aSEmmanuel Vadot 1249f126890aSEmmanuel Vadot uart0 { 1250f126890aSEmmanuel Vadot uart0_xfer: uart0-xfer { 1251f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PD2 1 &pcfg_pull_none>, 1252f126890aSEmmanuel Vadot <2 RK_PD3 1 &pcfg_pull_none>; 1253f126890aSEmmanuel Vadot }; 1254f126890aSEmmanuel Vadot 1255f126890aSEmmanuel Vadot uart0_cts: uart0-cts { 1256f126890aSEmmanuel Vadot rockchip,pins = <2 RK_PD5 1 &pcfg_pull_none>; 1257f126890aSEmmanuel Vadot }; 1258f126890aSEmmanuel Vadot 1259f126890aSEmmanuel Vadot uart0_rts: uart0-rts { 1260f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PC1 1 &pcfg_pull_none>; 1261f126890aSEmmanuel Vadot }; 1262f126890aSEmmanuel Vadot }; 1263f126890aSEmmanuel Vadot 1264f126890aSEmmanuel Vadot uart1 { 1265f126890aSEmmanuel Vadot uart1_xfer: uart1-xfer { 1266f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PB1 1 &pcfg_pull_none>, 1267f126890aSEmmanuel Vadot <1 RK_PB2 1 &pcfg_pull_none>; 1268f126890aSEmmanuel Vadot }; 1269f126890aSEmmanuel Vadot 1270f126890aSEmmanuel Vadot uart1_cts: uart1-cts { 1271f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PB0 1 &pcfg_pull_none>; 1272f126890aSEmmanuel Vadot }; 1273f126890aSEmmanuel Vadot 1274f126890aSEmmanuel Vadot uart1_rts: uart1-rts { 1275f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none>; 1276f126890aSEmmanuel Vadot }; 1277f126890aSEmmanuel Vadot }; 1278f126890aSEmmanuel Vadot 1279f126890aSEmmanuel Vadot uart2 { 1280f126890aSEmmanuel Vadot uart2_xfer: uart2-xfer { 1281f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PC2 2 &pcfg_pull_up>, 1282f126890aSEmmanuel Vadot <1 RK_PC3 2 &pcfg_pull_none>; 1283f126890aSEmmanuel Vadot }; 1284f126890aSEmmanuel Vadot 1285f126890aSEmmanuel Vadot uart21_xfer: uart21-xfer { 1286f126890aSEmmanuel Vadot rockchip,pins = <1 RK_PB2 2 &pcfg_pull_up>, 1287f126890aSEmmanuel Vadot <1 RK_PB1 2 &pcfg_pull_none>; 1288f126890aSEmmanuel Vadot }; 1289f126890aSEmmanuel Vadot 1290f126890aSEmmanuel Vadot uart2_cts: uart2-cts { 1291f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PD1 1 &pcfg_pull_none>; 1292f126890aSEmmanuel Vadot }; 1293f126890aSEmmanuel Vadot 1294f126890aSEmmanuel Vadot uart2_rts: uart2-rts { 1295f126890aSEmmanuel Vadot rockchip,pins = <0 RK_PD0 1 &pcfg_pull_none>; 1296f126890aSEmmanuel Vadot }; 1297f126890aSEmmanuel Vadot }; 1298f126890aSEmmanuel Vadot }; 1299f126890aSEmmanuel Vadot}; 1300