1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/
4 * Author: Rostislav Lisovy <lisovy@jablotron.cz>
5 */
6/dts-v1/;
7#include "am335x-chilisom.dtsi"
8
9/ {
10	model = "AM335x Chiliboard";
11	compatible = "grinn,am335x-chiliboard", "grinn,am335x-chilisom",
12		     "ti,am33xx";
13
14	chosen {
15		stdout-path = &uart0;
16	};
17
18	leds {
19		compatible = "gpio-leds";
20		pinctrl-names = "default";
21		pinctrl-0 = <&led_gpio_pins>;
22
23		led0 {
24			label = "led0";
25			gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
26			default-state = "keep";
27			linux,default-trigger = "heartbeat";
28		};
29
30		led1 {
31			label = "led1";
32			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
33			default-state = "keep";
34		};
35	};
36};
37
38&am33xx_pinmux {
39	uart0_pins: uart0-pins {
40		pinctrl-single,pins = <
41			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
42			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
43		>;
44	};
45
46	cpsw_default: cpsw-default-pins {
47		pinctrl-single,pins = <
48			/* Slave 1 */
49			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1)
50			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1)
51			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
52			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
53			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
54			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
55			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
56			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
57		>;
58	};
59
60	cpsw_sleep: cpsw-sleep-pins {
61		pinctrl-single,pins = <
62			/* Slave 1 reset value */
63			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
64			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
65			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
66			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
67			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
68			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
69			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
70			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
71			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
72		>;
73	};
74
75	davinci_mdio_default: davinci-mdio-default-pins {
76		pinctrl-single,pins = <
77			/* mdio_data.mdio_data */
78			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
79			/* mdio_clk.mdio_clk */
80			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
81		>;
82	};
83
84	davinci_mdio_sleep: davinci-mdio-sleep-pins {
85		pinctrl-single,pins = <
86			/* MDIO reset value */
87			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
88			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
89		>;
90	};
91
92	usb1_drvvbus: usb1-drvvbus-pins {
93		pinctrl-single,pins = <
94			AM33XX_PADCONF(AM335X_PIN_USB1_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
95		>;
96	};
97
98	sd_pins: sd-card-pins {
99		pinctrl-single,pins = <
100			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT, MUX_MODE0)
101			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT, MUX_MODE0)
102			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT, MUX_MODE0)
103			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT, MUX_MODE0)
104			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT, MUX_MODE0)
105			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT, MUX_MODE0)
106			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spi0_cs1.gpio0_6 */
107		>;
108	};
109
110	led_gpio_pins: led-gpio-pins {
111		pinctrl-single,pins = <
112			AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_OUTPUT, MUX_MODE7) /* emu0.gpio3_7 */
113			AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_OUTPUT, MUX_MODE7) /* emu1.gpio3_8 */
114		>;
115	};
116};
117
118&uart0 {
119	pinctrl-names = "default";
120	pinctrl-0 = <&uart0_pins>;
121
122	status = "okay";
123};
124
125&ldo4_reg {
126	regulator-min-microvolt = <3300000>;
127	regulator-max-microvolt = <3300000>;
128};
129
130/* Ethernet */
131&mac_sw {
132	pinctrl-names = "default", "sleep";
133	pinctrl-0 = <&cpsw_default>;
134	pinctrl-1 = <&cpsw_sleep>;
135	status = "okay";
136};
137
138&davinci_mdio_sw {
139	pinctrl-names = "default", "sleep";
140	pinctrl-0 = <&davinci_mdio_default>;
141	pinctrl-1 = <&davinci_mdio_sleep>;
142
143	ethphy0: ethernet-phy@0 {
144		reg = <0>;
145	};
146};
147
148&cpsw_port1 {
149	phy-handle = <&ethphy0>;
150	phy-mode = "rmii";
151	ti,dual-emac-pvid = <1>;
152};
153
154&cpsw_port2 {
155	status = "disabled";
156};
157
158/* USB */
159&usb1 {
160	pinctrl-names = "default";
161	pinctrl-0 = <&usb1_drvvbus>;
162	dr_mode = "host";
163};
164
165/* microSD */
166&mmc1 {
167	pinctrl-names = "default";
168	pinctrl-0 = <&sd_pins>;
169	vmmc-supply = <&ldo4_reg>;
170	bus-width = <0x4>;
171	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
172	status = "okay";
173};
174
175&tps {
176	interrupt-parent = <&intc>;
177	interrupts = <7>; /* NNMI */
178
179	charger {
180		status = "okay";
181	};
182
183	pwrbutton {
184		status = "okay";
185	};
186};
187