1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2015 Phytec Messtechnik GmbH
4 * Author: Teresa Remmet <t.remmet@phytec.de>
5 */
6
7/ {
8	model = "Phytec AM335x phyBOARD-WEGA";
9	compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
10
11	sound: sound {
12		compatible = "simple-audio-card";
13		simple-audio-card,name = "snd-wega";
14		simple-audio-card,format = "i2s";
15		simple-audio-card,bitclock-master = <&sound_iface_main>;
16		simple-audio-card,frame-master = <&sound_iface_main>;
17		simple-audio-card,mclk-fs = <32>;
18		simple-audio-card,widgets =
19					"Line", "Line In",
20					"Line", "Line Out",
21					"Speaker", "Speaker";
22		simple-audio-card,routing =
23					"Line Out", "LLOUT",
24					"Line Out", "RLOUT",
25					"Speaker", "SPOP",
26					"Speaker", "SPOM",
27					"LINE1L", "Line In",
28					"LINE1R", "Line In";
29
30		simple-audio-card,cpu {
31			sound-dai = <&mcasp0>;
32		};
33
34		sound_iface_main: simple-audio-card,codec {
35			sound-dai = <&tlv320aic3007>;
36			clocks = <&mcasp0_fck>;
37		};
38
39	};
40
41	vcc3v3: fixedregulator1 {
42		compatible = "regulator-fixed";
43		regulator-name = "vcc3v3";
44		regulator-min-microvolt = <3300000>;
45		regulator-max-microvolt = <3300000>;
46		regulator-boot-on;
47	};
48};
49
50/* Audio */
51&am33xx_pinmux {
52	mcasp0_pins: pinmux-mcasp0-pins {
53		pinctrl-single,pins = <
54			AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
55			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
56			AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0)
57			AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0)
58			AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
59		>;
60	};
61};
62
63&i2c0 {
64	tlv320aic3007: tlv320aic3007@18 {
65		#sound-dai-cells = <0>;
66		compatible = "ti,tlv320aic3007";
67		reg = <0x18>;
68		AVDD-supply = <&vcc3v3>;
69		IOVDD-supply = <&vcc3v3>;
70		DRVDD-supply = <&vcc3v3>;
71		DVDD-supply = <&vdig1_reg>;
72		status = "okay";
73	};
74};
75
76&mcasp0 {
77	#sound-dai-cells = <0>;
78	pinctrl-names = "default";
79	pinctrl-0 = <&mcasp0_pins>;
80	op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
81	tdm-slots = <2>;
82	serial-dir = <
83		2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */
84	>;
85	tx-num-evt = <16>;
86	rx-num-evt = <16>;
87	status = "okay";
88};
89
90
91/* CAN Busses */
92&am33xx_pinmux {
93	dcan1_pins: pinmux-dcan1-pins {
94		pinctrl-single,pins = <
95			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart0_ctsn.d_can1_tx */
96			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2) /* uart0_rtsn.d_can1_rx */
97		>;
98	};
99};
100
101&dcan1 {
102	pinctrl-names = "default";
103	pinctrl-0 = <&dcan1_pins>;
104	status = "okay";
105};
106
107/* Ethernet */
108&am33xx_pinmux {
109	ethernet1_pins: pinmux-ethernet1-pins {
110		pinctrl-single,pins = <
111			AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE1)		/* gpmc_a0.mii2_txen */
112			AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* gpmc_a1.mii2_rxdv */
113			AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE1)		/* gpmc_a2.mii2_txd3 */
114			AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE1)		/* gpmc_a3.mii2_txd2 */
115			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE1)		/* gpmc_a4.mii2_txd1 */
116			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE1)		/* gpmc_a5.mii2_txd0 */
117			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* gpmc_a6.mii2_txclk */
118			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* gpmc_a7.mii2_rxclk */
119			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* gpmc_a8.mii2_rxd3 */
120			AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* gpmc_a9.mii2_rxd2 */
121			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* gpmc_a10.mii2_rxd1 */
122			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* gpmc_a11.mii2_rxd0 */
123			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* gpmc_wpn.mii2_rxerr */
124			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* gpmc_ben1.mii2_col */
125		>;
126	};
127};
128
129&cpsw_port2 {
130	status = "okay";
131	phy-handle = <&phy1>;
132	phy-mode = "mii";
133	ti,dual-emac-pvid = <2>;
134};
135
136&davinci_mdio_sw {
137	phy1: ethernet-phy@1 {
138		reg = <1>;
139	};
140};
141
142&mac_sw {
143	pinctrl-names = "default";
144	pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
145};
146
147/* MMC */
148&am33xx_pinmux {
149	mmc1_pins: pinmux-mmc1-pins {
150		pinctrl-single,pins = <
151			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
152			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
153			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
154			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
155			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
156			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
157			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7)	/* spi0_cs1.mmc0_sdcd */
158		>;
159	};
160};
161
162&mmc1 {
163	vmmc-supply = <&vcc3v3>;
164	bus-width = <4>;
165	pinctrl-names = "default";
166	pinctrl-0 = <&mmc1_pins>;
167	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
168	status = "okay";
169};
170
171/* Power */
172&vdig1_reg {
173	regulator-boot-on;
174	regulator-always-on;
175};
176
177/* UARTs */
178&am33xx_pinmux {
179	uart0_pins: pinmux-uart0-pins {
180		pinctrl-single,pins = <
181			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
182			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
183		>;
184	};
185
186	uart1_pins: pinmux-uart1-pins {
187		pinctrl-single,pins = <
188			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
189			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
190			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
191			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
192		>;
193	};
194};
195
196&uart0 {
197	pinctrl-names = "default";
198	pinctrl-0 = <&uart0_pins>;
199	status = "okay";
200};
201
202&uart1 {
203	pinctrl-names = "default";
204	pinctrl-0 = <&uart1_pins>;
205	status = "okay";
206};
207
208&usb1 {
209	dr_mode = "host";
210};
211