1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device Tree Source for OMAP3 SoC 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 6*f126890aSEmmanuel Vadot */ 7*f126890aSEmmanuel Vadot 8*f126890aSEmmanuel Vadot#include <dt-bindings/bus/ti-sysc.h> 9*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 10*f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 11*f126890aSEmmanuel Vadot#include <dt-bindings/pinctrl/omap.h> 12*f126890aSEmmanuel Vadot 13*f126890aSEmmanuel Vadot/ { 14*f126890aSEmmanuel Vadot compatible = "ti,omap3430", "ti,omap3"; 15*f126890aSEmmanuel Vadot interrupt-parent = <&intc>; 16*f126890aSEmmanuel Vadot #address-cells = <1>; 17*f126890aSEmmanuel Vadot #size-cells = <1>; 18*f126890aSEmmanuel Vadot chosen { }; 19*f126890aSEmmanuel Vadot 20*f126890aSEmmanuel Vadot aliases { 21*f126890aSEmmanuel Vadot i2c0 = &i2c1; 22*f126890aSEmmanuel Vadot i2c1 = &i2c2; 23*f126890aSEmmanuel Vadot i2c2 = &i2c3; 24*f126890aSEmmanuel Vadot mmc0 = &mmc1; 25*f126890aSEmmanuel Vadot mmc1 = &mmc2; 26*f126890aSEmmanuel Vadot mmc2 = &mmc3; 27*f126890aSEmmanuel Vadot serial0 = &uart1; 28*f126890aSEmmanuel Vadot serial1 = &uart2; 29*f126890aSEmmanuel Vadot serial2 = &uart3; 30*f126890aSEmmanuel Vadot }; 31*f126890aSEmmanuel Vadot 32*f126890aSEmmanuel Vadot cpus { 33*f126890aSEmmanuel Vadot #address-cells = <1>; 34*f126890aSEmmanuel Vadot #size-cells = <0>; 35*f126890aSEmmanuel Vadot 36*f126890aSEmmanuel Vadot cpu@0 { 37*f126890aSEmmanuel Vadot compatible = "arm,cortex-a8"; 38*f126890aSEmmanuel Vadot device_type = "cpu"; 39*f126890aSEmmanuel Vadot reg = <0x0>; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot clocks = <&dpll1_ck>; 42*f126890aSEmmanuel Vadot clock-names = "cpu"; 43*f126890aSEmmanuel Vadot 44*f126890aSEmmanuel Vadot clock-latency = <300000>; /* From omap-cpufreq driver */ 45*f126890aSEmmanuel Vadot }; 46*f126890aSEmmanuel Vadot }; 47*f126890aSEmmanuel Vadot 48*f126890aSEmmanuel Vadot pmu@54000000 { 49*f126890aSEmmanuel Vadot compatible = "arm,cortex-a8-pmu"; 50*f126890aSEmmanuel Vadot reg = <0x54000000 0x800000>; 51*f126890aSEmmanuel Vadot interrupts = <3>; 52*f126890aSEmmanuel Vadot ti,hwmods = "debugss"; 53*f126890aSEmmanuel Vadot }; 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot /* 56*f126890aSEmmanuel Vadot * The soc node represents the soc top level view. It is used for IPs 57*f126890aSEmmanuel Vadot * that are not memory mapped in the MPU view or for the MPU itself. 58*f126890aSEmmanuel Vadot */ 59*f126890aSEmmanuel Vadot soc { 60*f126890aSEmmanuel Vadot compatible = "ti,omap-infra"; 61*f126890aSEmmanuel Vadot mpu { 62*f126890aSEmmanuel Vadot compatible = "ti,omap3-mpu"; 63*f126890aSEmmanuel Vadot ti,hwmods = "mpu"; 64*f126890aSEmmanuel Vadot }; 65*f126890aSEmmanuel Vadot 66*f126890aSEmmanuel Vadot iva: iva { 67*f126890aSEmmanuel Vadot compatible = "ti,iva2.2"; 68*f126890aSEmmanuel Vadot ti,hwmods = "iva"; 69*f126890aSEmmanuel Vadot 70*f126890aSEmmanuel Vadot dsp { 71*f126890aSEmmanuel Vadot compatible = "ti,omap3-c64"; 72*f126890aSEmmanuel Vadot }; 73*f126890aSEmmanuel Vadot }; 74*f126890aSEmmanuel Vadot }; 75*f126890aSEmmanuel Vadot 76*f126890aSEmmanuel Vadot /* 77*f126890aSEmmanuel Vadot * XXX: Use a flat representation of the OMAP3 interconnect. 78*f126890aSEmmanuel Vadot * The real OMAP interconnect network is quite complex. 79*f126890aSEmmanuel Vadot * Since it will not bring real advantage to represent that in DT for 80*f126890aSEmmanuel Vadot * the moment, just use a fake OCP bus entry to represent the whole bus 81*f126890aSEmmanuel Vadot * hierarchy. 82*f126890aSEmmanuel Vadot */ 83*f126890aSEmmanuel Vadot ocp@68000000 { 84*f126890aSEmmanuel Vadot compatible = "ti,omap3-l3-smx", "simple-bus"; 85*f126890aSEmmanuel Vadot reg = <0x68000000 0x10000>; 86*f126890aSEmmanuel Vadot interrupts = <9 10>; 87*f126890aSEmmanuel Vadot #address-cells = <1>; 88*f126890aSEmmanuel Vadot #size-cells = <1>; 89*f126890aSEmmanuel Vadot ranges; 90*f126890aSEmmanuel Vadot ti,hwmods = "l3_main"; 91*f126890aSEmmanuel Vadot 92*f126890aSEmmanuel Vadot l4_core: l4@48000000 { 93*f126890aSEmmanuel Vadot compatible = "ti,omap3-l4-core", "simple-bus"; 94*f126890aSEmmanuel Vadot #address-cells = <1>; 95*f126890aSEmmanuel Vadot #size-cells = <1>; 96*f126890aSEmmanuel Vadot ranges = <0 0x48000000 0x1000000>; 97*f126890aSEmmanuel Vadot 98*f126890aSEmmanuel Vadot scm: scm@2000 { 99*f126890aSEmmanuel Vadot compatible = "ti,omap3-scm", "simple-bus"; 100*f126890aSEmmanuel Vadot reg = <0x2000 0x2000>; 101*f126890aSEmmanuel Vadot #address-cells = <1>; 102*f126890aSEmmanuel Vadot #size-cells = <1>; 103*f126890aSEmmanuel Vadot ranges = <0 0x2000 0x2000>; 104*f126890aSEmmanuel Vadot 105*f126890aSEmmanuel Vadot omap3_pmx_core: pinmux@30 { 106*f126890aSEmmanuel Vadot compatible = "ti,omap3-padconf", 107*f126890aSEmmanuel Vadot "pinctrl-single"; 108*f126890aSEmmanuel Vadot reg = <0x30 0x238>; 109*f126890aSEmmanuel Vadot #address-cells = <1>; 110*f126890aSEmmanuel Vadot #size-cells = <0>; 111*f126890aSEmmanuel Vadot #pinctrl-cells = <1>; 112*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 113*f126890aSEmmanuel Vadot interrupt-controller; 114*f126890aSEmmanuel Vadot pinctrl-single,register-width = <16>; 115*f126890aSEmmanuel Vadot pinctrl-single,function-mask = <0xff1f>; 116*f126890aSEmmanuel Vadot }; 117*f126890aSEmmanuel Vadot 118*f126890aSEmmanuel Vadot scm_conf: scm_conf@270 { 119*f126890aSEmmanuel Vadot compatible = "syscon", "simple-bus"; 120*f126890aSEmmanuel Vadot reg = <0x270 0x330>; 121*f126890aSEmmanuel Vadot #address-cells = <1>; 122*f126890aSEmmanuel Vadot #size-cells = <1>; 123*f126890aSEmmanuel Vadot ranges = <0 0x270 0x330>; 124*f126890aSEmmanuel Vadot 125*f126890aSEmmanuel Vadot pbias_regulator: pbias_regulator@2b0 { 126*f126890aSEmmanuel Vadot compatible = "ti,pbias-omap3", "ti,pbias-omap"; 127*f126890aSEmmanuel Vadot reg = <0x2b0 0x4>; 128*f126890aSEmmanuel Vadot syscon = <&scm_conf>; 129*f126890aSEmmanuel Vadot pbias_mmc_reg: pbias_mmc_omap2430 { 130*f126890aSEmmanuel Vadot regulator-name = "pbias_mmc_omap2430"; 131*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 132*f126890aSEmmanuel Vadot regulator-max-microvolt = <3000000>; 133*f126890aSEmmanuel Vadot }; 134*f126890aSEmmanuel Vadot }; 135*f126890aSEmmanuel Vadot 136*f126890aSEmmanuel Vadot scm_clocks: clocks { 137*f126890aSEmmanuel Vadot #address-cells = <1>; 138*f126890aSEmmanuel Vadot #size-cells = <0>; 139*f126890aSEmmanuel Vadot }; 140*f126890aSEmmanuel Vadot }; 141*f126890aSEmmanuel Vadot 142*f126890aSEmmanuel Vadot scm_clockdomains: clockdomains { 143*f126890aSEmmanuel Vadot }; 144*f126890aSEmmanuel Vadot 145*f126890aSEmmanuel Vadot omap3_pmx_wkup: pinmux@a00 { 146*f126890aSEmmanuel Vadot compatible = "ti,omap3-padconf", 147*f126890aSEmmanuel Vadot "pinctrl-single"; 148*f126890aSEmmanuel Vadot reg = <0xa00 0x5c>; 149*f126890aSEmmanuel Vadot #address-cells = <1>; 150*f126890aSEmmanuel Vadot #size-cells = <0>; 151*f126890aSEmmanuel Vadot #pinctrl-cells = <1>; 152*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 153*f126890aSEmmanuel Vadot interrupt-controller; 154*f126890aSEmmanuel Vadot pinctrl-single,register-width = <16>; 155*f126890aSEmmanuel Vadot pinctrl-single,function-mask = <0xff1f>; 156*f126890aSEmmanuel Vadot }; 157*f126890aSEmmanuel Vadot }; 158*f126890aSEmmanuel Vadot }; 159*f126890aSEmmanuel Vadot 160*f126890aSEmmanuel Vadot aes1_target: target-module@480a6000 { 161*f126890aSEmmanuel Vadot compatible = "ti,sysc-omap2", "ti,sysc"; 162*f126890aSEmmanuel Vadot reg = <0x480a6044 0x4>, 163*f126890aSEmmanuel Vadot <0x480a6048 0x4>, 164*f126890aSEmmanuel Vadot <0x480a604c 0x4>; 165*f126890aSEmmanuel Vadot reg-names = "rev", "sysc", "syss"; 166*f126890aSEmmanuel Vadot ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>; 167*f126890aSEmmanuel Vadot ti,sysc-sidle = <SYSC_IDLE_FORCE>, 168*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>, 169*f126890aSEmmanuel Vadot <SYSC_IDLE_SMART>; 170*f126890aSEmmanuel Vadot ti,syss-mask = <1>; 171*f126890aSEmmanuel Vadot clocks = <&aes1_ick>; 172*f126890aSEmmanuel Vadot clock-names = "ick"; 173*f126890aSEmmanuel Vadot #address-cells = <1>; 174*f126890aSEmmanuel Vadot #size-cells = <1>; 175*f126890aSEmmanuel Vadot ranges = <0 0x480a6000 0x2000>; 176*f126890aSEmmanuel Vadot 177*f126890aSEmmanuel Vadot aes1: aes1@0 { 178*f126890aSEmmanuel Vadot compatible = "ti,omap3-aes"; 179*f126890aSEmmanuel Vadot reg = <0 0x50>; 180*f126890aSEmmanuel Vadot interrupts = <0>; 181*f126890aSEmmanuel Vadot dmas = <&sdma 9 &sdma 10>; 182*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 183*f126890aSEmmanuel Vadot }; 184*f126890aSEmmanuel Vadot }; 185*f126890aSEmmanuel Vadot 186*f126890aSEmmanuel Vadot aes2_target: target-module@480c5000 { 187*f126890aSEmmanuel Vadot compatible = "ti,sysc-omap2", "ti,sysc"; 188*f126890aSEmmanuel Vadot reg = <0x480c5044 0x4>, 189*f126890aSEmmanuel Vadot <0x480c5048 0x4>, 190*f126890aSEmmanuel Vadot <0x480c504c 0x4>; 191*f126890aSEmmanuel Vadot reg-names = "rev", "sysc", "syss"; 192*f126890aSEmmanuel Vadot ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>; 193*f126890aSEmmanuel Vadot ti,sysc-sidle = <SYSC_IDLE_FORCE>, 194*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>, 195*f126890aSEmmanuel Vadot <SYSC_IDLE_SMART>; 196*f126890aSEmmanuel Vadot ti,syss-mask = <1>; 197*f126890aSEmmanuel Vadot clocks = <&aes2_ick>; 198*f126890aSEmmanuel Vadot clock-names = "ick"; 199*f126890aSEmmanuel Vadot #address-cells = <1>; 200*f126890aSEmmanuel Vadot #size-cells = <1>; 201*f126890aSEmmanuel Vadot ranges = <0 0x480c5000 0x2000>; 202*f126890aSEmmanuel Vadot 203*f126890aSEmmanuel Vadot aes2: aes2@0 { 204*f126890aSEmmanuel Vadot compatible = "ti,omap3-aes"; 205*f126890aSEmmanuel Vadot reg = <0 0x50>; 206*f126890aSEmmanuel Vadot interrupts = <0>; 207*f126890aSEmmanuel Vadot dmas = <&sdma 65 &sdma 66>; 208*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 209*f126890aSEmmanuel Vadot }; 210*f126890aSEmmanuel Vadot }; 211*f126890aSEmmanuel Vadot 212*f126890aSEmmanuel Vadot prm: prm@48306000 { 213*f126890aSEmmanuel Vadot compatible = "ti,omap3-prm"; 214*f126890aSEmmanuel Vadot reg = <0x48306000 0x4000>; 215*f126890aSEmmanuel Vadot interrupts = <11>; 216*f126890aSEmmanuel Vadot 217*f126890aSEmmanuel Vadot prm_clocks: clocks { 218*f126890aSEmmanuel Vadot #address-cells = <1>; 219*f126890aSEmmanuel Vadot #size-cells = <0>; 220*f126890aSEmmanuel Vadot }; 221*f126890aSEmmanuel Vadot 222*f126890aSEmmanuel Vadot prm_clockdomains: clockdomains { 223*f126890aSEmmanuel Vadot }; 224*f126890aSEmmanuel Vadot }; 225*f126890aSEmmanuel Vadot 226*f126890aSEmmanuel Vadot cm: cm@48004000 { 227*f126890aSEmmanuel Vadot compatible = "ti,omap3-cm"; 228*f126890aSEmmanuel Vadot reg = <0x48004000 0x4000>; 229*f126890aSEmmanuel Vadot 230*f126890aSEmmanuel Vadot cm_clocks: clocks { 231*f126890aSEmmanuel Vadot #address-cells = <1>; 232*f126890aSEmmanuel Vadot #size-cells = <0>; 233*f126890aSEmmanuel Vadot }; 234*f126890aSEmmanuel Vadot 235*f126890aSEmmanuel Vadot cm_clockdomains: clockdomains { 236*f126890aSEmmanuel Vadot }; 237*f126890aSEmmanuel Vadot }; 238*f126890aSEmmanuel Vadot 239*f126890aSEmmanuel Vadot target-module@48320000 { 240*f126890aSEmmanuel Vadot compatible = "ti,sysc-omap2", "ti,sysc"; 241*f126890aSEmmanuel Vadot reg = <0x48320000 0x4>, 242*f126890aSEmmanuel Vadot <0x48320004 0x4>; 243*f126890aSEmmanuel Vadot reg-names = "rev", "sysc"; 244*f126890aSEmmanuel Vadot ti,sysc-sidle = <SYSC_IDLE_FORCE>, 245*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>; 246*f126890aSEmmanuel Vadot clocks = <&wkup_32k_fck>, <&omap_32ksync_ick>; 247*f126890aSEmmanuel Vadot clock-names = "fck", "ick"; 248*f126890aSEmmanuel Vadot #address-cells = <1>; 249*f126890aSEmmanuel Vadot #size-cells = <1>; 250*f126890aSEmmanuel Vadot ranges = <0x0 0x48320000 0x1000>; 251*f126890aSEmmanuel Vadot 252*f126890aSEmmanuel Vadot counter32k: counter@0 { 253*f126890aSEmmanuel Vadot compatible = "ti,omap-counter32k"; 254*f126890aSEmmanuel Vadot reg = <0x0 0x20>; 255*f126890aSEmmanuel Vadot }; 256*f126890aSEmmanuel Vadot }; 257*f126890aSEmmanuel Vadot 258*f126890aSEmmanuel Vadot intc: interrupt-controller@48200000 { 259*f126890aSEmmanuel Vadot compatible = "ti,omap3-intc"; 260*f126890aSEmmanuel Vadot interrupt-controller; 261*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 262*f126890aSEmmanuel Vadot reg = <0x48200000 0x1000>; 263*f126890aSEmmanuel Vadot }; 264*f126890aSEmmanuel Vadot 265*f126890aSEmmanuel Vadot target-module@48056000 { 266*f126890aSEmmanuel Vadot compatible = "ti,sysc-omap2", "ti,sysc"; 267*f126890aSEmmanuel Vadot reg = <0x48056000 0x4>, 268*f126890aSEmmanuel Vadot <0x4805602c 0x4>, 269*f126890aSEmmanuel Vadot <0x48056028 0x4>; 270*f126890aSEmmanuel Vadot reg-names = "rev", "sysc", "syss"; 271*f126890aSEmmanuel Vadot ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 272*f126890aSEmmanuel Vadot SYSC_OMAP2_EMUFREE | 273*f126890aSEmmanuel Vadot SYSC_OMAP2_SOFTRESET | 274*f126890aSEmmanuel Vadot SYSC_OMAP2_AUTOIDLE)>; 275*f126890aSEmmanuel Vadot ti,sysc-midle = <SYSC_IDLE_FORCE>, 276*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>, 277*f126890aSEmmanuel Vadot <SYSC_IDLE_SMART>; 278*f126890aSEmmanuel Vadot ti,sysc-sidle = <SYSC_IDLE_FORCE>, 279*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>, 280*f126890aSEmmanuel Vadot <SYSC_IDLE_SMART>; 281*f126890aSEmmanuel Vadot ti,syss-mask = <1>; 282*f126890aSEmmanuel Vadot /* Domains (V, P, C): core, core_pwrdm, core_l3_clkdm */ 283*f126890aSEmmanuel Vadot clocks = <&core_l3_ick>; 284*f126890aSEmmanuel Vadot clock-names = "ick"; 285*f126890aSEmmanuel Vadot #address-cells = <1>; 286*f126890aSEmmanuel Vadot #size-cells = <1>; 287*f126890aSEmmanuel Vadot ranges = <0 0x48056000 0x1000>; 288*f126890aSEmmanuel Vadot 289*f126890aSEmmanuel Vadot sdma: dma-controller@0 { 290*f126890aSEmmanuel Vadot compatible = "ti,omap3430-sdma", "ti,omap-sdma"; 291*f126890aSEmmanuel Vadot reg = <0x0 0x1000>; 292*f126890aSEmmanuel Vadot interrupts = <12>, 293*f126890aSEmmanuel Vadot <13>, 294*f126890aSEmmanuel Vadot <14>, 295*f126890aSEmmanuel Vadot <15>; 296*f126890aSEmmanuel Vadot #dma-cells = <1>; 297*f126890aSEmmanuel Vadot dma-channels = <32>; 298*f126890aSEmmanuel Vadot dma-requests = <96>; 299*f126890aSEmmanuel Vadot }; 300*f126890aSEmmanuel Vadot }; 301*f126890aSEmmanuel Vadot 302*f126890aSEmmanuel Vadot gpio1: gpio@48310000 { 303*f126890aSEmmanuel Vadot compatible = "ti,omap3-gpio"; 304*f126890aSEmmanuel Vadot reg = <0x48310000 0x200>; 305*f126890aSEmmanuel Vadot interrupts = <29>; 306*f126890aSEmmanuel Vadot ti,hwmods = "gpio1"; 307*f126890aSEmmanuel Vadot ti,gpio-always-on; 308*f126890aSEmmanuel Vadot gpio-controller; 309*f126890aSEmmanuel Vadot #gpio-cells = <2>; 310*f126890aSEmmanuel Vadot interrupt-controller; 311*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 312*f126890aSEmmanuel Vadot }; 313*f126890aSEmmanuel Vadot 314*f126890aSEmmanuel Vadot gpio2: gpio@49050000 { 315*f126890aSEmmanuel Vadot compatible = "ti,omap3-gpio"; 316*f126890aSEmmanuel Vadot reg = <0x49050000 0x200>; 317*f126890aSEmmanuel Vadot interrupts = <30>; 318*f126890aSEmmanuel Vadot ti,hwmods = "gpio2"; 319*f126890aSEmmanuel Vadot gpio-controller; 320*f126890aSEmmanuel Vadot #gpio-cells = <2>; 321*f126890aSEmmanuel Vadot interrupt-controller; 322*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 323*f126890aSEmmanuel Vadot }; 324*f126890aSEmmanuel Vadot 325*f126890aSEmmanuel Vadot gpio3: gpio@49052000 { 326*f126890aSEmmanuel Vadot compatible = "ti,omap3-gpio"; 327*f126890aSEmmanuel Vadot reg = <0x49052000 0x200>; 328*f126890aSEmmanuel Vadot interrupts = <31>; 329*f126890aSEmmanuel Vadot ti,hwmods = "gpio3"; 330*f126890aSEmmanuel Vadot gpio-controller; 331*f126890aSEmmanuel Vadot #gpio-cells = <2>; 332*f126890aSEmmanuel Vadot interrupt-controller; 333*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 334*f126890aSEmmanuel Vadot }; 335*f126890aSEmmanuel Vadot 336*f126890aSEmmanuel Vadot gpio4: gpio@49054000 { 337*f126890aSEmmanuel Vadot compatible = "ti,omap3-gpio"; 338*f126890aSEmmanuel Vadot reg = <0x49054000 0x200>; 339*f126890aSEmmanuel Vadot interrupts = <32>; 340*f126890aSEmmanuel Vadot ti,hwmods = "gpio4"; 341*f126890aSEmmanuel Vadot gpio-controller; 342*f126890aSEmmanuel Vadot #gpio-cells = <2>; 343*f126890aSEmmanuel Vadot interrupt-controller; 344*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 345*f126890aSEmmanuel Vadot }; 346*f126890aSEmmanuel Vadot 347*f126890aSEmmanuel Vadot gpio5: gpio@49056000 { 348*f126890aSEmmanuel Vadot compatible = "ti,omap3-gpio"; 349*f126890aSEmmanuel Vadot reg = <0x49056000 0x200>; 350*f126890aSEmmanuel Vadot interrupts = <33>; 351*f126890aSEmmanuel Vadot ti,hwmods = "gpio5"; 352*f126890aSEmmanuel Vadot gpio-controller; 353*f126890aSEmmanuel Vadot #gpio-cells = <2>; 354*f126890aSEmmanuel Vadot interrupt-controller; 355*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 356*f126890aSEmmanuel Vadot }; 357*f126890aSEmmanuel Vadot 358*f126890aSEmmanuel Vadot gpio6: gpio@49058000 { 359*f126890aSEmmanuel Vadot compatible = "ti,omap3-gpio"; 360*f126890aSEmmanuel Vadot reg = <0x49058000 0x200>; 361*f126890aSEmmanuel Vadot interrupts = <34>; 362*f126890aSEmmanuel Vadot ti,hwmods = "gpio6"; 363*f126890aSEmmanuel Vadot gpio-controller; 364*f126890aSEmmanuel Vadot #gpio-cells = <2>; 365*f126890aSEmmanuel Vadot interrupt-controller; 366*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 367*f126890aSEmmanuel Vadot }; 368*f126890aSEmmanuel Vadot 369*f126890aSEmmanuel Vadot uart1: serial@4806a000 { 370*f126890aSEmmanuel Vadot compatible = "ti,omap3-uart"; 371*f126890aSEmmanuel Vadot reg = <0x4806a000 0x2000>; 372*f126890aSEmmanuel Vadot interrupts-extended = <&intc 72>; 373*f126890aSEmmanuel Vadot dmas = <&sdma 49 &sdma 50>; 374*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 375*f126890aSEmmanuel Vadot ti,hwmods = "uart1"; 376*f126890aSEmmanuel Vadot clock-frequency = <48000000>; 377*f126890aSEmmanuel Vadot }; 378*f126890aSEmmanuel Vadot 379*f126890aSEmmanuel Vadot uart2: serial@4806c000 { 380*f126890aSEmmanuel Vadot compatible = "ti,omap3-uart"; 381*f126890aSEmmanuel Vadot reg = <0x4806c000 0x400>; 382*f126890aSEmmanuel Vadot interrupts-extended = <&intc 73>; 383*f126890aSEmmanuel Vadot dmas = <&sdma 51 &sdma 52>; 384*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 385*f126890aSEmmanuel Vadot ti,hwmods = "uart2"; 386*f126890aSEmmanuel Vadot clock-frequency = <48000000>; 387*f126890aSEmmanuel Vadot }; 388*f126890aSEmmanuel Vadot 389*f126890aSEmmanuel Vadot uart3: serial@49020000 { 390*f126890aSEmmanuel Vadot compatible = "ti,omap3-uart"; 391*f126890aSEmmanuel Vadot reg = <0x49020000 0x400>; 392*f126890aSEmmanuel Vadot interrupts-extended = <&intc 74>; 393*f126890aSEmmanuel Vadot dmas = <&sdma 53 &sdma 54>; 394*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 395*f126890aSEmmanuel Vadot ti,hwmods = "uart3"; 396*f126890aSEmmanuel Vadot clock-frequency = <48000000>; 397*f126890aSEmmanuel Vadot }; 398*f126890aSEmmanuel Vadot 399*f126890aSEmmanuel Vadot i2c1: i2c@48070000 { 400*f126890aSEmmanuel Vadot compatible = "ti,omap3-i2c"; 401*f126890aSEmmanuel Vadot reg = <0x48070000 0x80>; 402*f126890aSEmmanuel Vadot interrupts = <56>; 403*f126890aSEmmanuel Vadot #address-cells = <1>; 404*f126890aSEmmanuel Vadot #size-cells = <0>; 405*f126890aSEmmanuel Vadot ti,hwmods = "i2c1"; 406*f126890aSEmmanuel Vadot }; 407*f126890aSEmmanuel Vadot 408*f126890aSEmmanuel Vadot i2c2: i2c@48072000 { 409*f126890aSEmmanuel Vadot compatible = "ti,omap3-i2c"; 410*f126890aSEmmanuel Vadot reg = <0x48072000 0x80>; 411*f126890aSEmmanuel Vadot interrupts = <57>; 412*f126890aSEmmanuel Vadot #address-cells = <1>; 413*f126890aSEmmanuel Vadot #size-cells = <0>; 414*f126890aSEmmanuel Vadot ti,hwmods = "i2c2"; 415*f126890aSEmmanuel Vadot }; 416*f126890aSEmmanuel Vadot 417*f126890aSEmmanuel Vadot i2c3: i2c@48060000 { 418*f126890aSEmmanuel Vadot compatible = "ti,omap3-i2c"; 419*f126890aSEmmanuel Vadot reg = <0x48060000 0x80>; 420*f126890aSEmmanuel Vadot interrupts = <61>; 421*f126890aSEmmanuel Vadot #address-cells = <1>; 422*f126890aSEmmanuel Vadot #size-cells = <0>; 423*f126890aSEmmanuel Vadot ti,hwmods = "i2c3"; 424*f126890aSEmmanuel Vadot }; 425*f126890aSEmmanuel Vadot 426*f126890aSEmmanuel Vadot mailbox: mailbox@48094000 { 427*f126890aSEmmanuel Vadot compatible = "ti,omap3-mailbox"; 428*f126890aSEmmanuel Vadot ti,hwmods = "mailbox"; 429*f126890aSEmmanuel Vadot reg = <0x48094000 0x200>; 430*f126890aSEmmanuel Vadot interrupts = <26>; 431*f126890aSEmmanuel Vadot #mbox-cells = <1>; 432*f126890aSEmmanuel Vadot ti,mbox-num-users = <2>; 433*f126890aSEmmanuel Vadot ti,mbox-num-fifos = <2>; 434*f126890aSEmmanuel Vadot mbox_dsp: mbox-dsp { 435*f126890aSEmmanuel Vadot ti,mbox-tx = <0 0 0>; 436*f126890aSEmmanuel Vadot ti,mbox-rx = <1 0 0>; 437*f126890aSEmmanuel Vadot }; 438*f126890aSEmmanuel Vadot }; 439*f126890aSEmmanuel Vadot 440*f126890aSEmmanuel Vadot mcspi1: spi@48098000 { 441*f126890aSEmmanuel Vadot compatible = "ti,omap2-mcspi"; 442*f126890aSEmmanuel Vadot reg = <0x48098000 0x100>; 443*f126890aSEmmanuel Vadot interrupts = <65>; 444*f126890aSEmmanuel Vadot #address-cells = <1>; 445*f126890aSEmmanuel Vadot #size-cells = <0>; 446*f126890aSEmmanuel Vadot ti,hwmods = "mcspi1"; 447*f126890aSEmmanuel Vadot ti,spi-num-cs = <4>; 448*f126890aSEmmanuel Vadot dmas = <&sdma 35>, 449*f126890aSEmmanuel Vadot <&sdma 36>, 450*f126890aSEmmanuel Vadot <&sdma 37>, 451*f126890aSEmmanuel Vadot <&sdma 38>, 452*f126890aSEmmanuel Vadot <&sdma 39>, 453*f126890aSEmmanuel Vadot <&sdma 40>, 454*f126890aSEmmanuel Vadot <&sdma 41>, 455*f126890aSEmmanuel Vadot <&sdma 42>; 456*f126890aSEmmanuel Vadot dma-names = "tx0", "rx0", "tx1", "rx1", 457*f126890aSEmmanuel Vadot "tx2", "rx2", "tx3", "rx3"; 458*f126890aSEmmanuel Vadot }; 459*f126890aSEmmanuel Vadot 460*f126890aSEmmanuel Vadot mcspi2: spi@4809a000 { 461*f126890aSEmmanuel Vadot compatible = "ti,omap2-mcspi"; 462*f126890aSEmmanuel Vadot reg = <0x4809a000 0x100>; 463*f126890aSEmmanuel Vadot interrupts = <66>; 464*f126890aSEmmanuel Vadot #address-cells = <1>; 465*f126890aSEmmanuel Vadot #size-cells = <0>; 466*f126890aSEmmanuel Vadot ti,hwmods = "mcspi2"; 467*f126890aSEmmanuel Vadot ti,spi-num-cs = <2>; 468*f126890aSEmmanuel Vadot dmas = <&sdma 43>, 469*f126890aSEmmanuel Vadot <&sdma 44>, 470*f126890aSEmmanuel Vadot <&sdma 45>, 471*f126890aSEmmanuel Vadot <&sdma 46>; 472*f126890aSEmmanuel Vadot dma-names = "tx0", "rx0", "tx1", "rx1"; 473*f126890aSEmmanuel Vadot }; 474*f126890aSEmmanuel Vadot 475*f126890aSEmmanuel Vadot mcspi3: spi@480b8000 { 476*f126890aSEmmanuel Vadot compatible = "ti,omap2-mcspi"; 477*f126890aSEmmanuel Vadot reg = <0x480b8000 0x100>; 478*f126890aSEmmanuel Vadot interrupts = <91>; 479*f126890aSEmmanuel Vadot #address-cells = <1>; 480*f126890aSEmmanuel Vadot #size-cells = <0>; 481*f126890aSEmmanuel Vadot ti,hwmods = "mcspi3"; 482*f126890aSEmmanuel Vadot ti,spi-num-cs = <2>; 483*f126890aSEmmanuel Vadot dmas = <&sdma 15>, 484*f126890aSEmmanuel Vadot <&sdma 16>, 485*f126890aSEmmanuel Vadot <&sdma 23>, 486*f126890aSEmmanuel Vadot <&sdma 24>; 487*f126890aSEmmanuel Vadot dma-names = "tx0", "rx0", "tx1", "rx1"; 488*f126890aSEmmanuel Vadot }; 489*f126890aSEmmanuel Vadot 490*f126890aSEmmanuel Vadot mcspi4: spi@480ba000 { 491*f126890aSEmmanuel Vadot compatible = "ti,omap2-mcspi"; 492*f126890aSEmmanuel Vadot reg = <0x480ba000 0x100>; 493*f126890aSEmmanuel Vadot interrupts = <48>; 494*f126890aSEmmanuel Vadot #address-cells = <1>; 495*f126890aSEmmanuel Vadot #size-cells = <0>; 496*f126890aSEmmanuel Vadot ti,hwmods = "mcspi4"; 497*f126890aSEmmanuel Vadot ti,spi-num-cs = <1>; 498*f126890aSEmmanuel Vadot dmas = <&sdma 70>, <&sdma 71>; 499*f126890aSEmmanuel Vadot dma-names = "tx0", "rx0"; 500*f126890aSEmmanuel Vadot }; 501*f126890aSEmmanuel Vadot 502*f126890aSEmmanuel Vadot hdqw1w: 1w@480b2000 { 503*f126890aSEmmanuel Vadot compatible = "ti,omap3-1w"; 504*f126890aSEmmanuel Vadot reg = <0x480b2000 0x1000>; 505*f126890aSEmmanuel Vadot interrupts = <58>; 506*f126890aSEmmanuel Vadot ti,hwmods = "hdq1w"; 507*f126890aSEmmanuel Vadot }; 508*f126890aSEmmanuel Vadot 509*f126890aSEmmanuel Vadot mmc1: mmc@4809c000 { 510*f126890aSEmmanuel Vadot compatible = "ti,omap3-hsmmc"; 511*f126890aSEmmanuel Vadot reg = <0x4809c000 0x200>; 512*f126890aSEmmanuel Vadot interrupts = <83>; 513*f126890aSEmmanuel Vadot ti,hwmods = "mmc1"; 514*f126890aSEmmanuel Vadot ti,dual-volt; 515*f126890aSEmmanuel Vadot dmas = <&sdma 61>, <&sdma 62>; 516*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 517*f126890aSEmmanuel Vadot pbias-supply = <&pbias_mmc_reg>; 518*f126890aSEmmanuel Vadot }; 519*f126890aSEmmanuel Vadot 520*f126890aSEmmanuel Vadot mmc2: mmc@480b4000 { 521*f126890aSEmmanuel Vadot compatible = "ti,omap3-hsmmc"; 522*f126890aSEmmanuel Vadot reg = <0x480b4000 0x200>; 523*f126890aSEmmanuel Vadot interrupts = <86>; 524*f126890aSEmmanuel Vadot ti,hwmods = "mmc2"; 525*f126890aSEmmanuel Vadot dmas = <&sdma 47>, <&sdma 48>; 526*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 527*f126890aSEmmanuel Vadot }; 528*f126890aSEmmanuel Vadot 529*f126890aSEmmanuel Vadot mmc3: mmc@480ad000 { 530*f126890aSEmmanuel Vadot compatible = "ti,omap3-hsmmc"; 531*f126890aSEmmanuel Vadot reg = <0x480ad000 0x200>; 532*f126890aSEmmanuel Vadot interrupts = <94>; 533*f126890aSEmmanuel Vadot ti,hwmods = "mmc3"; 534*f126890aSEmmanuel Vadot dmas = <&sdma 77>, <&sdma 78>; 535*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 536*f126890aSEmmanuel Vadot }; 537*f126890aSEmmanuel Vadot 538*f126890aSEmmanuel Vadot mmu_isp: mmu@480bd400 { 539*f126890aSEmmanuel Vadot #iommu-cells = <0>; 540*f126890aSEmmanuel Vadot compatible = "ti,omap2-iommu"; 541*f126890aSEmmanuel Vadot reg = <0x480bd400 0x80>; 542*f126890aSEmmanuel Vadot interrupts = <24>; 543*f126890aSEmmanuel Vadot ti,hwmods = "mmu_isp"; 544*f126890aSEmmanuel Vadot ti,#tlb-entries = <8>; 545*f126890aSEmmanuel Vadot }; 546*f126890aSEmmanuel Vadot 547*f126890aSEmmanuel Vadot mmu_iva: mmu@5d000000 { 548*f126890aSEmmanuel Vadot #iommu-cells = <0>; 549*f126890aSEmmanuel Vadot compatible = "ti,omap2-iommu"; 550*f126890aSEmmanuel Vadot reg = <0x5d000000 0x80>; 551*f126890aSEmmanuel Vadot interrupts = <28>; 552*f126890aSEmmanuel Vadot ti,hwmods = "mmu_iva"; 553*f126890aSEmmanuel Vadot status = "disabled"; 554*f126890aSEmmanuel Vadot }; 555*f126890aSEmmanuel Vadot 556*f126890aSEmmanuel Vadot wdt2: wdt@48314000 { 557*f126890aSEmmanuel Vadot compatible = "ti,omap3-wdt"; 558*f126890aSEmmanuel Vadot reg = <0x48314000 0x80>; 559*f126890aSEmmanuel Vadot ti,hwmods = "wd_timer2"; 560*f126890aSEmmanuel Vadot }; 561*f126890aSEmmanuel Vadot 562*f126890aSEmmanuel Vadot mcbsp1: mcbsp@48074000 { 563*f126890aSEmmanuel Vadot compatible = "ti,omap3-mcbsp"; 564*f126890aSEmmanuel Vadot reg = <0x48074000 0xff>; 565*f126890aSEmmanuel Vadot reg-names = "mpu"; 566*f126890aSEmmanuel Vadot interrupts = <16>, /* OCP compliant interrupt */ 567*f126890aSEmmanuel Vadot <59>, /* TX interrupt */ 568*f126890aSEmmanuel Vadot <60>; /* RX interrupt */ 569*f126890aSEmmanuel Vadot interrupt-names = "common", "tx", "rx"; 570*f126890aSEmmanuel Vadot ti,buffer-size = <128>; 571*f126890aSEmmanuel Vadot ti,hwmods = "mcbsp1"; 572*f126890aSEmmanuel Vadot dmas = <&sdma 31>, 573*f126890aSEmmanuel Vadot <&sdma 32>; 574*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 575*f126890aSEmmanuel Vadot clocks = <&mcbsp1_fck>; 576*f126890aSEmmanuel Vadot clock-names = "fck"; 577*f126890aSEmmanuel Vadot status = "disabled"; 578*f126890aSEmmanuel Vadot }; 579*f126890aSEmmanuel Vadot 580*f126890aSEmmanuel Vadot /* Likely needs to be tagged disabled on HS devices */ 581*f126890aSEmmanuel Vadot rng_target: target-module@480a0000 { 582*f126890aSEmmanuel Vadot compatible = "ti,sysc-omap2", "ti,sysc"; 583*f126890aSEmmanuel Vadot reg = <0x480a003c 0x4>, 584*f126890aSEmmanuel Vadot <0x480a0040 0x4>, 585*f126890aSEmmanuel Vadot <0x480a0044 0x4>; 586*f126890aSEmmanuel Vadot reg-names = "rev", "sysc", "syss"; 587*f126890aSEmmanuel Vadot ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>; 588*f126890aSEmmanuel Vadot ti,sysc-sidle = <SYSC_IDLE_FORCE>, 589*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>; 590*f126890aSEmmanuel Vadot ti,syss-mask = <1>; 591*f126890aSEmmanuel Vadot clocks = <&rng_ick>; 592*f126890aSEmmanuel Vadot clock-names = "ick"; 593*f126890aSEmmanuel Vadot #address-cells = <1>; 594*f126890aSEmmanuel Vadot #size-cells = <1>; 595*f126890aSEmmanuel Vadot ranges = <0 0x480a0000 0x2000>; 596*f126890aSEmmanuel Vadot 597*f126890aSEmmanuel Vadot rng: rng@0 { 598*f126890aSEmmanuel Vadot compatible = "ti,omap2-rng"; 599*f126890aSEmmanuel Vadot reg = <0x0 0x2000>; 600*f126890aSEmmanuel Vadot interrupts = <52>; 601*f126890aSEmmanuel Vadot }; 602*f126890aSEmmanuel Vadot }; 603*f126890aSEmmanuel Vadot 604*f126890aSEmmanuel Vadot mcbsp2: mcbsp@49022000 { 605*f126890aSEmmanuel Vadot compatible = "ti,omap3-mcbsp"; 606*f126890aSEmmanuel Vadot reg = <0x49022000 0xff>, 607*f126890aSEmmanuel Vadot <0x49028000 0xff>; 608*f126890aSEmmanuel Vadot reg-names = "mpu", "sidetone"; 609*f126890aSEmmanuel Vadot interrupts = <17>, /* OCP compliant interrupt */ 610*f126890aSEmmanuel Vadot <62>, /* TX interrupt */ 611*f126890aSEmmanuel Vadot <63>, /* RX interrupt */ 612*f126890aSEmmanuel Vadot <4>; /* Sidetone */ 613*f126890aSEmmanuel Vadot interrupt-names = "common", "tx", "rx", "sidetone"; 614*f126890aSEmmanuel Vadot ti,buffer-size = <1280>; 615*f126890aSEmmanuel Vadot ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; 616*f126890aSEmmanuel Vadot dmas = <&sdma 33>, 617*f126890aSEmmanuel Vadot <&sdma 34>; 618*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 619*f126890aSEmmanuel Vadot clocks = <&mcbsp2_fck>, <&mcbsp2_ick>; 620*f126890aSEmmanuel Vadot clock-names = "fck", "ick"; 621*f126890aSEmmanuel Vadot status = "disabled"; 622*f126890aSEmmanuel Vadot }; 623*f126890aSEmmanuel Vadot 624*f126890aSEmmanuel Vadot mcbsp3: mcbsp@49024000 { 625*f126890aSEmmanuel Vadot compatible = "ti,omap3-mcbsp"; 626*f126890aSEmmanuel Vadot reg = <0x49024000 0xff>, 627*f126890aSEmmanuel Vadot <0x4902a000 0xff>; 628*f126890aSEmmanuel Vadot reg-names = "mpu", "sidetone"; 629*f126890aSEmmanuel Vadot interrupts = <22>, /* OCP compliant interrupt */ 630*f126890aSEmmanuel Vadot <89>, /* TX interrupt */ 631*f126890aSEmmanuel Vadot <90>, /* RX interrupt */ 632*f126890aSEmmanuel Vadot <5>; /* Sidetone */ 633*f126890aSEmmanuel Vadot interrupt-names = "common", "tx", "rx", "sidetone"; 634*f126890aSEmmanuel Vadot ti,buffer-size = <128>; 635*f126890aSEmmanuel Vadot ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; 636*f126890aSEmmanuel Vadot dmas = <&sdma 17>, 637*f126890aSEmmanuel Vadot <&sdma 18>; 638*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 639*f126890aSEmmanuel Vadot clocks = <&mcbsp3_fck>, <&mcbsp3_ick>; 640*f126890aSEmmanuel Vadot clock-names = "fck", "ick"; 641*f126890aSEmmanuel Vadot status = "disabled"; 642*f126890aSEmmanuel Vadot }; 643*f126890aSEmmanuel Vadot 644*f126890aSEmmanuel Vadot mcbsp4: mcbsp@49026000 { 645*f126890aSEmmanuel Vadot compatible = "ti,omap3-mcbsp"; 646*f126890aSEmmanuel Vadot reg = <0x49026000 0xff>; 647*f126890aSEmmanuel Vadot reg-names = "mpu"; 648*f126890aSEmmanuel Vadot interrupts = <23>, /* OCP compliant interrupt */ 649*f126890aSEmmanuel Vadot <54>, /* TX interrupt */ 650*f126890aSEmmanuel Vadot <55>; /* RX interrupt */ 651*f126890aSEmmanuel Vadot interrupt-names = "common", "tx", "rx"; 652*f126890aSEmmanuel Vadot ti,buffer-size = <128>; 653*f126890aSEmmanuel Vadot ti,hwmods = "mcbsp4"; 654*f126890aSEmmanuel Vadot dmas = <&sdma 19>, 655*f126890aSEmmanuel Vadot <&sdma 20>; 656*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 657*f126890aSEmmanuel Vadot clocks = <&mcbsp4_fck>; 658*f126890aSEmmanuel Vadot clock-names = "fck"; 659*f126890aSEmmanuel Vadot #sound-dai-cells = <0>; 660*f126890aSEmmanuel Vadot status = "disabled"; 661*f126890aSEmmanuel Vadot }; 662*f126890aSEmmanuel Vadot 663*f126890aSEmmanuel Vadot mcbsp5: mcbsp@48096000 { 664*f126890aSEmmanuel Vadot compatible = "ti,omap3-mcbsp"; 665*f126890aSEmmanuel Vadot reg = <0x48096000 0xff>; 666*f126890aSEmmanuel Vadot reg-names = "mpu"; 667*f126890aSEmmanuel Vadot interrupts = <27>, /* OCP compliant interrupt */ 668*f126890aSEmmanuel Vadot <81>, /* TX interrupt */ 669*f126890aSEmmanuel Vadot <82>; /* RX interrupt */ 670*f126890aSEmmanuel Vadot interrupt-names = "common", "tx", "rx"; 671*f126890aSEmmanuel Vadot ti,buffer-size = <128>; 672*f126890aSEmmanuel Vadot ti,hwmods = "mcbsp5"; 673*f126890aSEmmanuel Vadot dmas = <&sdma 21>, 674*f126890aSEmmanuel Vadot <&sdma 22>; 675*f126890aSEmmanuel Vadot dma-names = "tx", "rx"; 676*f126890aSEmmanuel Vadot clocks = <&mcbsp5_fck>; 677*f126890aSEmmanuel Vadot clock-names = "fck"; 678*f126890aSEmmanuel Vadot status = "disabled"; 679*f126890aSEmmanuel Vadot }; 680*f126890aSEmmanuel Vadot 681*f126890aSEmmanuel Vadot sham: sham@480c3000 { 682*f126890aSEmmanuel Vadot compatible = "ti,omap3-sham"; 683*f126890aSEmmanuel Vadot ti,hwmods = "sham"; 684*f126890aSEmmanuel Vadot reg = <0x480c3000 0x64>; 685*f126890aSEmmanuel Vadot interrupts = <49>; 686*f126890aSEmmanuel Vadot dmas = <&sdma 69>; 687*f126890aSEmmanuel Vadot dma-names = "rx"; 688*f126890aSEmmanuel Vadot }; 689*f126890aSEmmanuel Vadot 690*f126890aSEmmanuel Vadot timer1_target: target-module@48318000 { 691*f126890aSEmmanuel Vadot compatible = "ti,sysc-omap2-timer", "ti,sysc"; 692*f126890aSEmmanuel Vadot reg = <0x48318000 0x4>, 693*f126890aSEmmanuel Vadot <0x48318010 0x4>, 694*f126890aSEmmanuel Vadot <0x48318014 0x4>; 695*f126890aSEmmanuel Vadot reg-names = "rev", "sysc", "syss"; 696*f126890aSEmmanuel Vadot ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 697*f126890aSEmmanuel Vadot SYSC_OMAP2_EMUFREE | 698*f126890aSEmmanuel Vadot SYSC_OMAP2_ENAWAKEUP | 699*f126890aSEmmanuel Vadot SYSC_OMAP2_SOFTRESET | 700*f126890aSEmmanuel Vadot SYSC_OMAP2_AUTOIDLE)>; 701*f126890aSEmmanuel Vadot ti,sysc-sidle = <SYSC_IDLE_FORCE>, 702*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>, 703*f126890aSEmmanuel Vadot <SYSC_IDLE_SMART>; 704*f126890aSEmmanuel Vadot ti,syss-mask = <1>; 705*f126890aSEmmanuel Vadot clocks = <&gpt1_fck>, <&gpt1_ick>; 706*f126890aSEmmanuel Vadot clock-names = "fck", "ick"; 707*f126890aSEmmanuel Vadot #address-cells = <1>; 708*f126890aSEmmanuel Vadot #size-cells = <1>; 709*f126890aSEmmanuel Vadot ranges = <0x0 0x48318000 0x1000>; 710*f126890aSEmmanuel Vadot 711*f126890aSEmmanuel Vadot timer1: timer@0 { 712*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 713*f126890aSEmmanuel Vadot reg = <0x0 0x80>; 714*f126890aSEmmanuel Vadot clocks = <&gpt1_fck>; 715*f126890aSEmmanuel Vadot clock-names = "fck"; 716*f126890aSEmmanuel Vadot interrupts = <37>; 717*f126890aSEmmanuel Vadot ti,timer-alwon; 718*f126890aSEmmanuel Vadot }; 719*f126890aSEmmanuel Vadot }; 720*f126890aSEmmanuel Vadot 721*f126890aSEmmanuel Vadot timer2_target: target-module@49032000 { 722*f126890aSEmmanuel Vadot compatible = "ti,sysc-omap2-timer", "ti,sysc"; 723*f126890aSEmmanuel Vadot reg = <0x49032000 0x4>, 724*f126890aSEmmanuel Vadot <0x49032010 0x4>, 725*f126890aSEmmanuel Vadot <0x49032014 0x4>; 726*f126890aSEmmanuel Vadot reg-names = "rev", "sysc", "syss"; 727*f126890aSEmmanuel Vadot ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 728*f126890aSEmmanuel Vadot SYSC_OMAP2_EMUFREE | 729*f126890aSEmmanuel Vadot SYSC_OMAP2_ENAWAKEUP | 730*f126890aSEmmanuel Vadot SYSC_OMAP2_SOFTRESET | 731*f126890aSEmmanuel Vadot SYSC_OMAP2_AUTOIDLE)>; 732*f126890aSEmmanuel Vadot ti,sysc-sidle = <SYSC_IDLE_FORCE>, 733*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>, 734*f126890aSEmmanuel Vadot <SYSC_IDLE_SMART>; 735*f126890aSEmmanuel Vadot ti,syss-mask = <1>; 736*f126890aSEmmanuel Vadot clocks = <&gpt2_fck>, <&gpt2_ick>; 737*f126890aSEmmanuel Vadot clock-names = "fck", "ick"; 738*f126890aSEmmanuel Vadot #address-cells = <1>; 739*f126890aSEmmanuel Vadot #size-cells = <1>; 740*f126890aSEmmanuel Vadot ranges = <0x0 0x49032000 0x1000>; 741*f126890aSEmmanuel Vadot 742*f126890aSEmmanuel Vadot timer2: timer@0 { 743*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 744*f126890aSEmmanuel Vadot reg = <0 0x400>; 745*f126890aSEmmanuel Vadot interrupts = <38>; 746*f126890aSEmmanuel Vadot }; 747*f126890aSEmmanuel Vadot }; 748*f126890aSEmmanuel Vadot 749*f126890aSEmmanuel Vadot timer3: timer@49034000 { 750*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 751*f126890aSEmmanuel Vadot reg = <0x49034000 0x400>; 752*f126890aSEmmanuel Vadot interrupts = <39>; 753*f126890aSEmmanuel Vadot ti,hwmods = "timer3"; 754*f126890aSEmmanuel Vadot }; 755*f126890aSEmmanuel Vadot 756*f126890aSEmmanuel Vadot timer4: timer@49036000 { 757*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 758*f126890aSEmmanuel Vadot reg = <0x49036000 0x400>; 759*f126890aSEmmanuel Vadot interrupts = <40>; 760*f126890aSEmmanuel Vadot ti,hwmods = "timer4"; 761*f126890aSEmmanuel Vadot }; 762*f126890aSEmmanuel Vadot 763*f126890aSEmmanuel Vadot timer5: timer@49038000 { 764*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 765*f126890aSEmmanuel Vadot reg = <0x49038000 0x400>; 766*f126890aSEmmanuel Vadot interrupts = <41>; 767*f126890aSEmmanuel Vadot ti,hwmods = "timer5"; 768*f126890aSEmmanuel Vadot ti,timer-dsp; 769*f126890aSEmmanuel Vadot }; 770*f126890aSEmmanuel Vadot 771*f126890aSEmmanuel Vadot timer6: timer@4903a000 { 772*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 773*f126890aSEmmanuel Vadot reg = <0x4903a000 0x400>; 774*f126890aSEmmanuel Vadot interrupts = <42>; 775*f126890aSEmmanuel Vadot ti,hwmods = "timer6"; 776*f126890aSEmmanuel Vadot ti,timer-dsp; 777*f126890aSEmmanuel Vadot }; 778*f126890aSEmmanuel Vadot 779*f126890aSEmmanuel Vadot timer7: timer@4903c000 { 780*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 781*f126890aSEmmanuel Vadot reg = <0x4903c000 0x400>; 782*f126890aSEmmanuel Vadot interrupts = <43>; 783*f126890aSEmmanuel Vadot ti,hwmods = "timer7"; 784*f126890aSEmmanuel Vadot ti,timer-dsp; 785*f126890aSEmmanuel Vadot }; 786*f126890aSEmmanuel Vadot 787*f126890aSEmmanuel Vadot timer8: timer@4903e000 { 788*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 789*f126890aSEmmanuel Vadot reg = <0x4903e000 0x400>; 790*f126890aSEmmanuel Vadot interrupts = <44>; 791*f126890aSEmmanuel Vadot ti,hwmods = "timer8"; 792*f126890aSEmmanuel Vadot ti,timer-pwm; 793*f126890aSEmmanuel Vadot ti,timer-dsp; 794*f126890aSEmmanuel Vadot }; 795*f126890aSEmmanuel Vadot 796*f126890aSEmmanuel Vadot timer9: timer@49040000 { 797*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 798*f126890aSEmmanuel Vadot reg = <0x49040000 0x400>; 799*f126890aSEmmanuel Vadot interrupts = <45>; 800*f126890aSEmmanuel Vadot ti,hwmods = "timer9"; 801*f126890aSEmmanuel Vadot ti,timer-pwm; 802*f126890aSEmmanuel Vadot }; 803*f126890aSEmmanuel Vadot 804*f126890aSEmmanuel Vadot timer10: timer@48086000 { 805*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 806*f126890aSEmmanuel Vadot reg = <0x48086000 0x400>; 807*f126890aSEmmanuel Vadot interrupts = <46>; 808*f126890aSEmmanuel Vadot ti,hwmods = "timer10"; 809*f126890aSEmmanuel Vadot ti,timer-pwm; 810*f126890aSEmmanuel Vadot }; 811*f126890aSEmmanuel Vadot 812*f126890aSEmmanuel Vadot timer11: timer@48088000 { 813*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 814*f126890aSEmmanuel Vadot reg = <0x48088000 0x400>; 815*f126890aSEmmanuel Vadot interrupts = <47>; 816*f126890aSEmmanuel Vadot ti,hwmods = "timer11"; 817*f126890aSEmmanuel Vadot ti,timer-pwm; 818*f126890aSEmmanuel Vadot }; 819*f126890aSEmmanuel Vadot 820*f126890aSEmmanuel Vadot timer12_target: target-module@48304000 { 821*f126890aSEmmanuel Vadot compatible = "ti,sysc-omap2-timer", "ti,sysc"; 822*f126890aSEmmanuel Vadot reg = <0x48304000 0x4>, 823*f126890aSEmmanuel Vadot <0x48304010 0x4>, 824*f126890aSEmmanuel Vadot <0x48304014 0x4>; 825*f126890aSEmmanuel Vadot reg-names = "rev", "sysc", "syss"; 826*f126890aSEmmanuel Vadot ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 827*f126890aSEmmanuel Vadot SYSC_OMAP2_EMUFREE | 828*f126890aSEmmanuel Vadot SYSC_OMAP2_ENAWAKEUP | 829*f126890aSEmmanuel Vadot SYSC_OMAP2_SOFTRESET | 830*f126890aSEmmanuel Vadot SYSC_OMAP2_AUTOIDLE)>; 831*f126890aSEmmanuel Vadot ti,sysc-sidle = <SYSC_IDLE_FORCE>, 832*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>, 833*f126890aSEmmanuel Vadot <SYSC_IDLE_SMART>; 834*f126890aSEmmanuel Vadot ti,syss-mask = <1>; 835*f126890aSEmmanuel Vadot clocks = <&gpt12_fck>, <&gpt12_ick>; 836*f126890aSEmmanuel Vadot clock-names = "fck", "ick"; 837*f126890aSEmmanuel Vadot #address-cells = <1>; 838*f126890aSEmmanuel Vadot #size-cells = <1>; 839*f126890aSEmmanuel Vadot ranges = <0x0 0x48304000 0x1000>; 840*f126890aSEmmanuel Vadot 841*f126890aSEmmanuel Vadot timer12: timer@0 { 842*f126890aSEmmanuel Vadot compatible = "ti,omap3430-timer"; 843*f126890aSEmmanuel Vadot reg = <0 0x400>; 844*f126890aSEmmanuel Vadot interrupts = <95>; 845*f126890aSEmmanuel Vadot ti,timer-alwon; 846*f126890aSEmmanuel Vadot ti,timer-secure; 847*f126890aSEmmanuel Vadot }; 848*f126890aSEmmanuel Vadot }; 849*f126890aSEmmanuel Vadot 850*f126890aSEmmanuel Vadot usbhstll: usbhstll@48062000 { 851*f126890aSEmmanuel Vadot compatible = "ti,usbhs-tll"; 852*f126890aSEmmanuel Vadot reg = <0x48062000 0x1000>; 853*f126890aSEmmanuel Vadot interrupts = <78>; 854*f126890aSEmmanuel Vadot ti,hwmods = "usb_tll_hs"; 855*f126890aSEmmanuel Vadot }; 856*f126890aSEmmanuel Vadot 857*f126890aSEmmanuel Vadot usbhshost: usbhshost@48064000 { 858*f126890aSEmmanuel Vadot compatible = "ti,usbhs-host"; 859*f126890aSEmmanuel Vadot reg = <0x48064000 0x400>; 860*f126890aSEmmanuel Vadot ti,hwmods = "usb_host_hs"; 861*f126890aSEmmanuel Vadot #address-cells = <1>; 862*f126890aSEmmanuel Vadot #size-cells = <1>; 863*f126890aSEmmanuel Vadot ranges; 864*f126890aSEmmanuel Vadot 865*f126890aSEmmanuel Vadot usbhsohci: ohci@48064400 { 866*f126890aSEmmanuel Vadot compatible = "ti,ohci-omap3"; 867*f126890aSEmmanuel Vadot reg = <0x48064400 0x400>; 868*f126890aSEmmanuel Vadot interrupts = <76>; 869*f126890aSEmmanuel Vadot remote-wakeup-connected; 870*f126890aSEmmanuel Vadot }; 871*f126890aSEmmanuel Vadot 872*f126890aSEmmanuel Vadot usbhsehci: ehci@48064800 { 873*f126890aSEmmanuel Vadot compatible = "ti,ehci-omap"; 874*f126890aSEmmanuel Vadot reg = <0x48064800 0x400>; 875*f126890aSEmmanuel Vadot interrupts = <77>; 876*f126890aSEmmanuel Vadot }; 877*f126890aSEmmanuel Vadot }; 878*f126890aSEmmanuel Vadot 879*f126890aSEmmanuel Vadot gpmc: gpmc@6e000000 { 880*f126890aSEmmanuel Vadot compatible = "ti,omap3430-gpmc"; 881*f126890aSEmmanuel Vadot ti,hwmods = "gpmc"; 882*f126890aSEmmanuel Vadot reg = <0x6e000000 0x02d0>; 883*f126890aSEmmanuel Vadot interrupts = <20>; 884*f126890aSEmmanuel Vadot dmas = <&sdma 4>; 885*f126890aSEmmanuel Vadot dma-names = "rxtx"; 886*f126890aSEmmanuel Vadot gpmc,num-cs = <8>; 887*f126890aSEmmanuel Vadot gpmc,num-waitpins = <4>; 888*f126890aSEmmanuel Vadot #address-cells = <2>; 889*f126890aSEmmanuel Vadot #size-cells = <1>; 890*f126890aSEmmanuel Vadot interrupt-controller; 891*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 892*f126890aSEmmanuel Vadot gpio-controller; 893*f126890aSEmmanuel Vadot #gpio-cells = <2>; 894*f126890aSEmmanuel Vadot }; 895*f126890aSEmmanuel Vadot 896*f126890aSEmmanuel Vadot usb_otg_target: target-module@480ab000 { 897*f126890aSEmmanuel Vadot compatible = "ti,sysc-omap2", "ti,sysc"; 898*f126890aSEmmanuel Vadot reg = <0x480ab400 0x4>, 899*f126890aSEmmanuel Vadot <0x480ab404 0x4>, 900*f126890aSEmmanuel Vadot <0x480ab408 0x4>; 901*f126890aSEmmanuel Vadot reg-names = "rev", "sysc", "syss"; 902*f126890aSEmmanuel Vadot ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 903*f126890aSEmmanuel Vadot SYSC_OMAP2_SOFTRESET | 904*f126890aSEmmanuel Vadot SYSC_OMAP2_AUTOIDLE)>; 905*f126890aSEmmanuel Vadot ti,sysc-midle = <SYSC_IDLE_FORCE>, 906*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>, 907*f126890aSEmmanuel Vadot <SYSC_IDLE_SMART>; 908*f126890aSEmmanuel Vadot ti,sysc-sidle = <SYSC_IDLE_FORCE>, 909*f126890aSEmmanuel Vadot <SYSC_IDLE_NO>, 910*f126890aSEmmanuel Vadot <SYSC_IDLE_SMART>; 911*f126890aSEmmanuel Vadot ti,syss-mask = <1>; 912*f126890aSEmmanuel Vadot /* Clock defined in the SoC specific dtsi file */ 913*f126890aSEmmanuel Vadot clock-names = "fck"; 914*f126890aSEmmanuel Vadot #address-cells = <1>; 915*f126890aSEmmanuel Vadot #size-cells = <1>; 916*f126890aSEmmanuel Vadot ranges = <0x0 0x480ab000 0x1000>; 917*f126890aSEmmanuel Vadot 918*f126890aSEmmanuel Vadot usb_otg_hs: usb@0 { 919*f126890aSEmmanuel Vadot compatible = "ti,omap3-musb"; 920*f126890aSEmmanuel Vadot reg = <0 0x1000>; 921*f126890aSEmmanuel Vadot interrupts = <92>, <93>; 922*f126890aSEmmanuel Vadot interrupt-names = "mc", "dma"; 923*f126890aSEmmanuel Vadot multipoint = <1>; 924*f126890aSEmmanuel Vadot num-eps = <16>; 925*f126890aSEmmanuel Vadot ram-bits = <12>; 926*f126890aSEmmanuel Vadot }; 927*f126890aSEmmanuel Vadot }; 928*f126890aSEmmanuel Vadot 929*f126890aSEmmanuel Vadot dss: dss@48050000 { 930*f126890aSEmmanuel Vadot compatible = "ti,omap3-dss"; 931*f126890aSEmmanuel Vadot reg = <0x48050000 0x200>; 932*f126890aSEmmanuel Vadot status = "disabled"; 933*f126890aSEmmanuel Vadot ti,hwmods = "dss_core"; 934*f126890aSEmmanuel Vadot clocks = <&dss1_alwon_fck>; 935*f126890aSEmmanuel Vadot clock-names = "fck"; 936*f126890aSEmmanuel Vadot #address-cells = <1>; 937*f126890aSEmmanuel Vadot #size-cells = <1>; 938*f126890aSEmmanuel Vadot ranges; 939*f126890aSEmmanuel Vadot 940*f126890aSEmmanuel Vadot dispc@48050400 { 941*f126890aSEmmanuel Vadot compatible = "ti,omap3-dispc"; 942*f126890aSEmmanuel Vadot reg = <0x48050400 0x400>; 943*f126890aSEmmanuel Vadot interrupts = <25>; 944*f126890aSEmmanuel Vadot ti,hwmods = "dss_dispc"; 945*f126890aSEmmanuel Vadot clocks = <&dss1_alwon_fck>; 946*f126890aSEmmanuel Vadot clock-names = "fck"; 947*f126890aSEmmanuel Vadot }; 948*f126890aSEmmanuel Vadot 949*f126890aSEmmanuel Vadot dsi: encoder@4804fc00 { 950*f126890aSEmmanuel Vadot compatible = "ti,omap3-dsi"; 951*f126890aSEmmanuel Vadot reg = <0x4804fc00 0x200>, 952*f126890aSEmmanuel Vadot <0x4804fe00 0x40>, 953*f126890aSEmmanuel Vadot <0x4804ff00 0x20>; 954*f126890aSEmmanuel Vadot reg-names = "proto", "phy", "pll"; 955*f126890aSEmmanuel Vadot interrupts = <25>; 956*f126890aSEmmanuel Vadot status = "disabled"; 957*f126890aSEmmanuel Vadot ti,hwmods = "dss_dsi1"; 958*f126890aSEmmanuel Vadot clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>; 959*f126890aSEmmanuel Vadot clock-names = "fck", "sys_clk"; 960*f126890aSEmmanuel Vadot 961*f126890aSEmmanuel Vadot #address-cells = <1>; 962*f126890aSEmmanuel Vadot #size-cells = <0>; 963*f126890aSEmmanuel Vadot }; 964*f126890aSEmmanuel Vadot 965*f126890aSEmmanuel Vadot rfbi: encoder@48050800 { 966*f126890aSEmmanuel Vadot compatible = "ti,omap3-rfbi"; 967*f126890aSEmmanuel Vadot reg = <0x48050800 0x100>; 968*f126890aSEmmanuel Vadot status = "disabled"; 969*f126890aSEmmanuel Vadot ti,hwmods = "dss_rfbi"; 970*f126890aSEmmanuel Vadot clocks = <&dss1_alwon_fck>, <&dss_ick>; 971*f126890aSEmmanuel Vadot clock-names = "fck", "ick"; 972*f126890aSEmmanuel Vadot }; 973*f126890aSEmmanuel Vadot 974*f126890aSEmmanuel Vadot venc: encoder@48050c00 { 975*f126890aSEmmanuel Vadot compatible = "ti,omap3-venc"; 976*f126890aSEmmanuel Vadot reg = <0x48050c00 0x100>; 977*f126890aSEmmanuel Vadot status = "disabled"; 978*f126890aSEmmanuel Vadot ti,hwmods = "dss_venc"; 979*f126890aSEmmanuel Vadot clocks = <&dss_tv_fck>; 980*f126890aSEmmanuel Vadot clock-names = "fck"; 981*f126890aSEmmanuel Vadot }; 982*f126890aSEmmanuel Vadot }; 983*f126890aSEmmanuel Vadot 984*f126890aSEmmanuel Vadot ssi: ssi-controller@48058000 { 985*f126890aSEmmanuel Vadot compatible = "ti,omap3-ssi"; 986*f126890aSEmmanuel Vadot ti,hwmods = "ssi"; 987*f126890aSEmmanuel Vadot 988*f126890aSEmmanuel Vadot status = "disabled"; 989*f126890aSEmmanuel Vadot 990*f126890aSEmmanuel Vadot reg = <0x48058000 0x1000>, 991*f126890aSEmmanuel Vadot <0x48059000 0x1000>; 992*f126890aSEmmanuel Vadot reg-names = "sys", 993*f126890aSEmmanuel Vadot "gdd"; 994*f126890aSEmmanuel Vadot 995*f126890aSEmmanuel Vadot interrupts = <71>; 996*f126890aSEmmanuel Vadot interrupt-names = "gdd_mpu"; 997*f126890aSEmmanuel Vadot 998*f126890aSEmmanuel Vadot #address-cells = <1>; 999*f126890aSEmmanuel Vadot #size-cells = <1>; 1000*f126890aSEmmanuel Vadot ranges; 1001*f126890aSEmmanuel Vadot 1002*f126890aSEmmanuel Vadot ssi_port1: ssi-port@4805a000 { 1003*f126890aSEmmanuel Vadot compatible = "ti,omap3-ssi-port"; 1004*f126890aSEmmanuel Vadot 1005*f126890aSEmmanuel Vadot reg = <0x4805a000 0x800>, 1006*f126890aSEmmanuel Vadot <0x4805a800 0x800>; 1007*f126890aSEmmanuel Vadot reg-names = "tx", 1008*f126890aSEmmanuel Vadot "rx"; 1009*f126890aSEmmanuel Vadot 1010*f126890aSEmmanuel Vadot interrupts = <67>, 1011*f126890aSEmmanuel Vadot <68>; 1012*f126890aSEmmanuel Vadot }; 1013*f126890aSEmmanuel Vadot 1014*f126890aSEmmanuel Vadot ssi_port2: ssi-port@4805b000 { 1015*f126890aSEmmanuel Vadot compatible = "ti,omap3-ssi-port"; 1016*f126890aSEmmanuel Vadot 1017*f126890aSEmmanuel Vadot reg = <0x4805b000 0x800>, 1018*f126890aSEmmanuel Vadot <0x4805b800 0x800>; 1019*f126890aSEmmanuel Vadot reg-names = "tx", 1020*f126890aSEmmanuel Vadot "rx"; 1021*f126890aSEmmanuel Vadot 1022*f126890aSEmmanuel Vadot interrupts = <69>, 1023*f126890aSEmmanuel Vadot <70>; 1024*f126890aSEmmanuel Vadot }; 1025*f126890aSEmmanuel Vadot }; 1026*f126890aSEmmanuel Vadot }; 1027*f126890aSEmmanuel Vadot}; 1028*f126890aSEmmanuel Vadot 1029*f126890aSEmmanuel Vadot#include "omap3xxx-clocks.dtsi" 1030*f126890aSEmmanuel Vadot 1031*f126890aSEmmanuel Vadot/* Preferred always-on timer for clockevent. Some boards must use dmtimer12 */ 1032*f126890aSEmmanuel Vadot&timer1_target { 1033*f126890aSEmmanuel Vadot ti,no-reset-on-init; 1034*f126890aSEmmanuel Vadot ti,no-idle; 1035*f126890aSEmmanuel Vadot timer@0 { 1036*f126890aSEmmanuel Vadot assigned-clocks = <&gpt1_fck>; 1037*f126890aSEmmanuel Vadot assigned-clock-parents = <&omap_32k_fck>; 1038*f126890aSEmmanuel Vadot }; 1039*f126890aSEmmanuel Vadot}; 1040