1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016 Andreas Färber
4 *
5 * Copyright (c) 2016 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 *
8 * Copyright (c) 2016 Endless Computers, Inc.
9 * Author: Carlo Caione <carlo@endlessm.com>
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/power/meson-gxbb-power.h>
16#include <dt-bindings/thermal/thermal.h>
17
18/ {
19	interrupt-parent = <&gic>;
20	#address-cells = <2>;
21	#size-cells = <2>;
22
23	aliases {
24		mmc0 = &sd_emmc_b; /* SD card */
25		mmc1 = &sd_emmc_c; /* eMMC */
26		mmc2 = &sd_emmc_a; /* SDIO */
27	};
28
29	reserved-memory {
30		#address-cells = <2>;
31		#size-cells = <2>;
32		ranges;
33
34		/* 16 MiB reserved for Hardware ROM Firmware */
35		hwrom_reserved: hwrom@0 {
36			reg = <0x0 0x0 0x0 0x1000000>;
37			no-map;
38		};
39
40		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
41		secmon_reserved: secmon@10000000 {
42			reg = <0x0 0x10000000 0x0 0x200000>;
43			no-map;
44		};
45
46		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
47		secmon_reserved_alt: secmon@5000000 {
48			reg = <0x0 0x05000000 0x0 0x300000>;
49			no-map;
50		};
51
52		/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
53		secmon_reserved_bl32: secmon@5300000 {
54			reg = <0x0 0x05300000 0x0 0x2000000>;
55			no-map;
56		};
57
58		linux,cma {
59			compatible = "shared-dma-pool";
60			reusable;
61			size = <0x0 0x10000000>;
62			alignment = <0x0 0x400000>;
63			linux,cma-default;
64		};
65	};
66
67	chosen {
68		#address-cells = <2>;
69		#size-cells = <2>;
70		ranges;
71
72		simplefb_cvbs: framebuffer-cvbs {
73			compatible = "amlogic,simple-framebuffer",
74				     "simple-framebuffer";
75			amlogic,pipeline = "vpu-cvbs";
76			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
77			status = "disabled";
78		};
79
80		simplefb_hdmi: framebuffer-hdmi {
81			compatible = "amlogic,simple-framebuffer",
82				     "simple-framebuffer";
83			amlogic,pipeline = "vpu-hdmi";
84			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
85			status = "disabled";
86		};
87	};
88
89	cpus {
90		#address-cells = <0x2>;
91		#size-cells = <0x0>;
92
93		cpu0: cpu@0 {
94			device_type = "cpu";
95			compatible = "arm,cortex-a53";
96			reg = <0x0 0x0>;
97			enable-method = "psci";
98			next-level-cache = <&l2>;
99			clocks = <&scpi_dvfs 0>;
100			#cooling-cells = <2>;
101		};
102
103		cpu1: cpu@1 {
104			device_type = "cpu";
105			compatible = "arm,cortex-a53";
106			reg = <0x0 0x1>;
107			enable-method = "psci";
108			next-level-cache = <&l2>;
109			clocks = <&scpi_dvfs 0>;
110			#cooling-cells = <2>;
111		};
112
113		cpu2: cpu@2 {
114			device_type = "cpu";
115			compatible = "arm,cortex-a53";
116			reg = <0x0 0x2>;
117			enable-method = "psci";
118			next-level-cache = <&l2>;
119			clocks = <&scpi_dvfs 0>;
120			#cooling-cells = <2>;
121		};
122
123		cpu3: cpu@3 {
124			device_type = "cpu";
125			compatible = "arm,cortex-a53";
126			reg = <0x0 0x3>;
127			enable-method = "psci";
128			next-level-cache = <&l2>;
129			clocks = <&scpi_dvfs 0>;
130			#cooling-cells = <2>;
131		};
132
133		l2: l2-cache0 {
134			compatible = "cache";
135			cache-level = <2>;
136			cache-unified;
137		};
138	};
139
140	thermal-zones {
141		cpu-thermal {
142			polling-delay-passive = <250>; /* milliseconds */
143			polling-delay = <1000>; /* milliseconds */
144
145			thermal-sensors = <&scpi_sensors 0>;
146
147			trips {
148				cpu_passive: cpu-passive {
149					temperature = <80000>; /* millicelsius */
150					hysteresis = <2000>; /* millicelsius */
151					type = "passive";
152				};
153
154				cpu_hot: cpu-hot {
155					temperature = <90000>; /* millicelsius */
156					hysteresis = <2000>; /* millicelsius */
157					type = "hot";
158				};
159
160				cpu_critical: cpu-critical {
161					temperature = <110000>; /* millicelsius */
162					hysteresis = <2000>; /* millicelsius */
163					type = "critical";
164				};
165			};
166
167			cpu_cooling_maps: cooling-maps {
168				map0 {
169					trip = <&cpu_passive>;
170					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
171							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
172							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
173							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
174				};
175
176				map1 {
177					trip = <&cpu_hot>;
178					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
179							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
180							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
181							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
182				};
183			};
184		};
185	};
186
187	arm-pmu {
188		compatible = "arm,cortex-a53-pmu";
189		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
190			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
191			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
192			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
193		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
194	};
195
196	psci {
197		compatible = "arm,psci-0.2";
198		method = "smc";
199	};
200
201	timer {
202		compatible = "arm,armv8-timer";
203		interrupts = <GIC_PPI 13
204			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
205			     <GIC_PPI 14
206			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
207			     <GIC_PPI 11
208			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
209			     <GIC_PPI 10
210			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
211	};
212
213	xtal: xtal-clk {
214		compatible = "fixed-clock";
215		clock-frequency = <24000000>;
216		clock-output-names = "xtal";
217		#clock-cells = <0>;
218	};
219
220	firmware {
221		sm: secure-monitor {
222			compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
223		};
224	};
225
226	efuse: efuse {
227		compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
228		#address-cells = <1>;
229		#size-cells = <1>;
230		read-only;
231		secure-monitor = <&sm>;
232
233		sn: sn@14 {
234			reg = <0x14 0x10>;
235		};
236
237		eth_mac: eth-mac@34 {
238			reg = <0x34 0x10>;
239		};
240
241		bid: bid@46 {
242			reg = <0x46 0x30>;
243		};
244	};
245
246	scpi {
247		compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
248		mboxes = <&mailbox 1 &mailbox 2>;
249		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
250
251		scpi_clocks: clocks {
252			compatible = "arm,scpi-clocks";
253
254			scpi_dvfs: clocks-0 {
255				compatible = "arm,scpi-dvfs-clocks";
256				#clock-cells = <1>;
257				clock-indices = <0>;
258				clock-output-names = "vcpu";
259			};
260		};
261
262		scpi_sensors: sensors {
263			compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
264			#thermal-sensor-cells = <1>;
265		};
266	};
267
268	soc {
269		compatible = "simple-bus";
270		#address-cells = <2>;
271		#size-cells = <2>;
272		ranges;
273
274		cbus: bus@c1100000 {
275			compatible = "simple-bus";
276			reg = <0x0 0xc1100000 0x0 0x100000>;
277			#address-cells = <2>;
278			#size-cells = <2>;
279			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
280
281			gpio_intc: interrupt-controller@9880 {
282				compatible = "amlogic,meson-gpio-intc";
283				reg = <0x0 0x9880 0x0 0x10>;
284				interrupt-controller;
285				#interrupt-cells = <2>;
286				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
287				status = "disabled";
288			};
289
290			reset: reset-controller@4404 {
291				compatible = "amlogic,meson-gxbb-reset";
292				reg = <0x0 0x04404 0x0 0x9c>;
293				#reset-cells = <1>;
294			};
295
296			aiu: audio-controller@5400 {
297				compatible = "amlogic,aiu";
298				#sound-dai-cells = <2>;
299				sound-name-prefix = "AIU";
300				reg = <0x0 0x5400 0x0 0x2ac>;
301				interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
302					     <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
303				interrupt-names = "i2s", "spdif";
304				status = "disabled";
305			};
306
307			uart_A: serial@84c0 {
308				compatible = "amlogic,meson-gx-uart";
309				reg = <0x0 0x84c0 0x0 0x18>;
310				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
311				status = "disabled";
312				fifo-size = <128>;
313			};
314
315			uart_B: serial@84dc {
316				compatible = "amlogic,meson-gx-uart";
317				reg = <0x0 0x84dc 0x0 0x18>;
318				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
319				status = "disabled";
320			};
321
322			i2c_A: i2c@8500 {
323				compatible = "amlogic,meson-gxbb-i2c";
324				reg = <0x0 0x08500 0x0 0x20>;
325				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
326				#address-cells = <1>;
327				#size-cells = <0>;
328				status = "disabled";
329			};
330
331			pwm_ab: pwm@8550 {
332				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
333				reg = <0x0 0x08550 0x0 0x10>;
334				#pwm-cells = <3>;
335				status = "disabled";
336			};
337
338			pwm_cd: pwm@8650 {
339				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
340				reg = <0x0 0x08650 0x0 0x10>;
341				#pwm-cells = <3>;
342				status = "disabled";
343			};
344
345			saradc: adc@8680 {
346				compatible = "amlogic,meson-saradc";
347				reg = <0x0 0x8680 0x0 0x34>;
348				#io-channel-cells = <1>;
349				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
350				status = "disabled";
351			};
352
353			pwm_ef: pwm@86c0 {
354				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
355				reg = <0x0 0x086c0 0x0 0x10>;
356				#pwm-cells = <3>;
357				status = "disabled";
358			};
359
360			uart_C: serial@8700 {
361				compatible = "amlogic,meson-gx-uart";
362				reg = <0x0 0x8700 0x0 0x18>;
363				interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
364				status = "disabled";
365			};
366
367			clock-measure@8758 {
368				compatible = "amlogic,meson-gx-clk-measure";
369				reg = <0x0 0x8758 0x0 0x10>;
370			};
371
372			i2c_B: i2c@87c0 {
373				compatible = "amlogic,meson-gxbb-i2c";
374				reg = <0x0 0x087c0 0x0 0x20>;
375				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
376				#address-cells = <1>;
377				#size-cells = <0>;
378				status = "disabled";
379			};
380
381			i2c_C: i2c@87e0 {
382				compatible = "amlogic,meson-gxbb-i2c";
383				reg = <0x0 0x087e0 0x0 0x20>;
384				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
385				#address-cells = <1>;
386				#size-cells = <0>;
387				status = "disabled";
388			};
389
390			spicc: spi@8d80 {
391				compatible = "amlogic,meson-gx-spicc";
392				reg = <0x0 0x08d80 0x0 0x80>;
393				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
394				#address-cells = <1>;
395				#size-cells = <0>;
396				status = "disabled";
397			};
398
399			spifc: spi@8c80 {
400				compatible = "amlogic,meson-gxbb-spifc";
401				reg = <0x0 0x08c80 0x0 0x80>;
402				#address-cells = <1>;
403				#size-cells = <0>;
404				status = "disabled";
405			};
406
407			watchdog@98d0 {
408				compatible = "amlogic,meson-gxbb-wdt";
409				reg = <0x0 0x098d0 0x0 0x10>;
410				clocks = <&xtal>;
411			};
412		};
413
414		gic: interrupt-controller@c4301000 {
415			compatible = "arm,gic-400";
416			reg = <0x0 0xc4301000 0 0x1000>,
417			      <0x0 0xc4302000 0 0x2000>,
418			      <0x0 0xc4304000 0 0x2000>,
419			      <0x0 0xc4306000 0 0x2000>;
420			interrupt-controller;
421			interrupts = <GIC_PPI 9
422				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
423			#interrupt-cells = <3>;
424			#address-cells = <0>;
425		};
426
427		sram: sram@c8000000 {
428			compatible = "mmio-sram";
429			reg = <0x0 0xc8000000 0x0 0x14000>;
430
431			#address-cells = <1>;
432			#size-cells = <1>;
433			ranges = <0 0x0 0xc8000000 0x14000>;
434
435			cpu_scp_lpri: scp-sram@0 {
436				compatible = "amlogic,meson-gxbb-scp-shmem";
437				reg = <0x13000 0x400>;
438			};
439
440			cpu_scp_hpri: scp-sram@200 {
441				compatible = "amlogic,meson-gxbb-scp-shmem";
442				reg = <0x13400 0x400>;
443			};
444		};
445
446		aobus: bus@c8100000 {
447			compatible = "simple-bus";
448			reg = <0x0 0xc8100000 0x0 0x100000>;
449			#address-cells = <2>;
450			#size-cells = <2>;
451			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
452
453			sysctrl_AO: sys-ctrl@0 {
454				compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
455				reg = <0x0 0x0 0x0 0x100>;
456
457				clkc_AO: clock-controller {
458					compatible = "amlogic,meson-gx-aoclkc";
459					#clock-cells = <1>;
460					#reset-cells = <1>;
461				};
462			};
463
464			cec_AO: cec@100 {
465				compatible = "amlogic,meson-gx-ao-cec";
466				reg = <0x0 0x00100 0x0 0x14>;
467				interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
468				status = "disabled";
469			};
470
471			sec_AO: ao-secure@140 {
472				compatible = "amlogic,meson-gx-ao-secure", "syscon";
473				reg = <0x0 0x140 0x0 0x140>;
474				amlogic,has-chip-id;
475			};
476
477			uart_AO: serial@4c0 {
478				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
479				reg = <0x0 0x004c0 0x0 0x18>;
480				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
481				status = "disabled";
482			};
483
484			uart_AO_B: serial@4e0 {
485				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
486				reg = <0x0 0x004e0 0x0 0x18>;
487				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
488				status = "disabled";
489			};
490
491			i2c_AO: i2c@500 {
492				compatible = "amlogic,meson-gxbb-i2c";
493				reg = <0x0 0x500 0x0 0x20>;
494				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
495				#address-cells = <1>;
496				#size-cells = <0>;
497				status = "disabled";
498			};
499
500			pwm_AO_ab: pwm@550 {
501				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
502				reg = <0x0 0x00550 0x0 0x10>;
503				#pwm-cells = <3>;
504				status = "disabled";
505			};
506
507			ir: ir@580 {
508				compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
509				reg = <0x0 0x00580 0x0 0x40>;
510				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
511				status = "disabled";
512			};
513		};
514
515		vdec: video-codec@c8820000 {
516			compatible = "amlogic,gx-vdec";
517			reg = <0x0 0xc8820000 0x0 0x10000>,
518			      <0x0 0xc110a580 0x0 0xe4>;
519			reg-names = "dos", "esparser";
520
521			interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
522				     <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
523			interrupt-names = "vdec", "esparser";
524
525			amlogic,ao-sysctrl = <&sysctrl_AO>;
526			amlogic,canvas = <&canvas>;
527		};
528
529		periphs: bus@c8834000 {
530			compatible = "simple-bus";
531			reg = <0x0 0xc8834000 0x0 0x2000>;
532			#address-cells = <2>;
533			#size-cells = <2>;
534			ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
535
536			hwrng: rng@0 {
537				compatible = "amlogic,meson-rng";
538				reg = <0x0 0x0 0x0 0x4>;
539			};
540		};
541
542		dmcbus: bus@c8838000 {
543			compatible = "simple-bus";
544			reg = <0x0 0xc8838000 0x0 0x400>;
545			#address-cells = <2>;
546			#size-cells = <2>;
547			ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
548
549			canvas: video-lut@48 {
550				compatible = "amlogic,canvas";
551				reg = <0x0 0x48 0x0 0x14>;
552			};
553		};
554
555		hiubus: bus@c883c000 {
556			compatible = "simple-bus";
557			reg = <0x0 0xc883c000 0x0 0x2000>;
558			#address-cells = <2>;
559			#size-cells = <2>;
560			ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
561
562			sysctrl: system-controller@0 {
563				compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
564				reg = <0 0 0 0x400>;
565
566				pwrc: power-controller {
567					compatible = "amlogic,meson-gxbb-pwrc";
568					#power-domain-cells = <1>;
569					amlogic,ao-sysctrl = <&sysctrl_AO>;
570				};
571			};
572
573			mailbox: mailbox@404 {
574				compatible = "amlogic,meson-gxbb-mhu";
575				reg = <0 0x404 0 0x4c>;
576				interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
577					     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
578					     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
579				#mbox-cells = <1>;
580			};
581		};
582
583		ethmac: ethernet@c9410000 {
584			compatible = "amlogic,meson-gxbb-dwmac",
585				     "snps,dwmac-3.70a",
586				     "snps,dwmac";
587			reg = <0x0 0xc9410000 0x0 0x10000>,
588			      <0x0 0xc8834540 0x0 0x4>;
589			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
590			interrupt-names = "macirq";
591			rx-fifo-depth = <4096>;
592			tx-fifo-depth = <2048>;
593			power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
594			status = "disabled";
595		};
596
597		apb: apb@d0000000 {
598			compatible = "simple-bus";
599			reg = <0x0 0xd0000000 0x0 0x200000>;
600			#address-cells = <2>;
601			#size-cells = <2>;
602			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
603
604			sd_emmc_a: mmc@70000 {
605				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
606				reg = <0x0 0x70000 0x0 0x800>;
607				interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
608				status = "disabled";
609			};
610
611			sd_emmc_b: mmc@72000 {
612				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
613				reg = <0x0 0x72000 0x0 0x800>;
614				interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
615				status = "disabled";
616			};
617
618			sd_emmc_c: mmc@74000 {
619				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
620				reg = <0x0 0x74000 0x0 0x800>;
621				interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
622				status = "disabled";
623			};
624		};
625
626		vpu: vpu@d0100000 {
627			compatible = "amlogic,meson-gx-vpu";
628			reg = <0x0 0xd0100000 0x0 0x100000>,
629			      <0x0 0xc883c000 0x0 0x1000>;
630			reg-names = "vpu", "hhi";
631			interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
632			#address-cells = <1>;
633			#size-cells = <0>;
634			amlogic,canvas = <&canvas>;
635
636			/* CVBS VDAC output port */
637			cvbs_vdac_port: port@0 {
638				reg = <0>;
639			};
640
641			/* HDMI-TX output port */
642			hdmi_tx_port: port@1 {
643				reg = <1>;
644
645				hdmi_tx_out: endpoint {
646					remote-endpoint = <&hdmi_tx_in>;
647				};
648			};
649		};
650
651		hdmi_tx: hdmi-tx@c883a000 {
652			compatible = "amlogic,meson-gx-dw-hdmi";
653			reg = <0x0 0xc883a000 0x0 0x1c>;
654			interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
655			#address-cells = <1>;
656			#size-cells = <0>;
657			#sound-dai-cells = <0>;
658			sound-name-prefix = "HDMITX";
659			status = "disabled";
660
661			/* VPU VENC Input */
662			hdmi_tx_venc_port: port@0 {
663				reg = <0>;
664
665				hdmi_tx_in: endpoint {
666					remote-endpoint = <&hdmi_tx_out>;
667				};
668			};
669
670			/* TMDS Output */
671			hdmi_tx_tmds_port: port@1 {
672				reg = <1>;
673			};
674		};
675	};
676};
677