1*aa1a8ff2SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2c9ccf3a3SEmmanuel Vadot// 3c9ccf3a3SEmmanuel Vadot// Copyright 2018 NXP 4c9ccf3a3SEmmanuel Vadot// Copyright (C) 2021 emtrion GmbH 5c9ccf3a3SEmmanuel Vadot// 6c9ccf3a3SEmmanuel Vadot 7c9ccf3a3SEmmanuel Vadot/dts-v1/; 8c9ccf3a3SEmmanuel Vadot 9c9ccf3a3SEmmanuel Vadot#include "imx8mm.dtsi" 10c9ccf3a3SEmmanuel Vadot 11c9ccf3a3SEmmanuel Vadot/ { 12c9ccf3a3SEmmanuel Vadot chosen { 13c9ccf3a3SEmmanuel Vadot stdout-path = &uart1; 14c9ccf3a3SEmmanuel Vadot }; 15c9ccf3a3SEmmanuel Vadot 16c9ccf3a3SEmmanuel Vadot som_leds: leds { 17c9ccf3a3SEmmanuel Vadot compatible = "gpio-leds"; 18c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 19c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_gpio_led>; 20c9ccf3a3SEmmanuel Vadot 21cb7aa33aSEmmanuel Vadot led-green { 22c9ccf3a3SEmmanuel Vadot label = "som:green"; 23c9ccf3a3SEmmanuel Vadot gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; 24c9ccf3a3SEmmanuel Vadot default-state = "on"; 25c9ccf3a3SEmmanuel Vadot linux,default-trigger = "heartbeat"; 26c9ccf3a3SEmmanuel Vadot }; 27c9ccf3a3SEmmanuel Vadot 28cb7aa33aSEmmanuel Vadot led-red { 29c9ccf3a3SEmmanuel Vadot label = "som:red"; 30c9ccf3a3SEmmanuel Vadot gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>; 31c9ccf3a3SEmmanuel Vadot default-state = "off"; 32c9ccf3a3SEmmanuel Vadot }; 33c9ccf3a3SEmmanuel Vadot }; 34c9ccf3a3SEmmanuel Vadot 35c9ccf3a3SEmmanuel Vadot lvds_backlight: lvds-backlight { 36c9ccf3a3SEmmanuel Vadot compatible = "pwm-backlight"; 37c9ccf3a3SEmmanuel Vadot enable-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 38c9ccf3a3SEmmanuel Vadot pwms = <&pwm1 0 50000 0>; 39c9ccf3a3SEmmanuel Vadot brightness-levels = < 40c9ccf3a3SEmmanuel Vadot 0 4 8 16 32 64 80 96 112 41c9ccf3a3SEmmanuel Vadot 128 144 160 176 250 42c9ccf3a3SEmmanuel Vadot >; 43c9ccf3a3SEmmanuel Vadot default-brightness-level = <9>; 44c9ccf3a3SEmmanuel Vadot status = "disabled"; 45c9ccf3a3SEmmanuel Vadot }; 46c9ccf3a3SEmmanuel Vadot 47c9ccf3a3SEmmanuel Vadot reg_usdhc1_vmmc: regulator-emmc { 48c9ccf3a3SEmmanuel Vadot compatible = "regulator-fixed"; 49c9ccf3a3SEmmanuel Vadot regulator-name = "eMMC"; 50c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <3300000>; 51c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <3300000>; 52c9ccf3a3SEmmanuel Vadot }; 53c9ccf3a3SEmmanuel Vadot 54c9ccf3a3SEmmanuel Vadot reg_usdhc2_vmmc: regulator-usdhc2 { 55c9ccf3a3SEmmanuel Vadot compatible = "regulator-fixed"; 56c9ccf3a3SEmmanuel Vadot regulator-name = "sdcard_3V3"; 57c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <3300000>; 58c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <3300000>; 59c9ccf3a3SEmmanuel Vadot }; 60c9ccf3a3SEmmanuel Vadot}; 61c9ccf3a3SEmmanuel Vadot 62c9ccf3a3SEmmanuel Vadot&A53_0 { 63c9ccf3a3SEmmanuel Vadot cpu-supply = <&buck2_reg>; 64c9ccf3a3SEmmanuel Vadot}; 65c9ccf3a3SEmmanuel Vadot 66c9ccf3a3SEmmanuel Vadot&ecspi1 { 67c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 68c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; 69c9ccf3a3SEmmanuel Vadot cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, 70c9ccf3a3SEmmanuel Vadot <&gpio5 13 GPIO_ACTIVE_LOW>; 71c9ccf3a3SEmmanuel Vadot status = "okay"; 72c9ccf3a3SEmmanuel Vadot}; 73c9ccf3a3SEmmanuel Vadot 74c9ccf3a3SEmmanuel Vadot&fec1 { 75c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 76c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_fec1>; 77c9ccf3a3SEmmanuel Vadot phy-mode = "rgmii-id"; 78c9ccf3a3SEmmanuel Vadot phy-handle = <ðphy0>; 79c9ccf3a3SEmmanuel Vadot fsl,magic-packet; 80c9ccf3a3SEmmanuel Vadot status = "okay"; 81c9ccf3a3SEmmanuel Vadot 82c9ccf3a3SEmmanuel Vadot mdio { 83c9ccf3a3SEmmanuel Vadot #address-cells = <1>; 84c9ccf3a3SEmmanuel Vadot #size-cells = <0>; 85c9ccf3a3SEmmanuel Vadot 86c9ccf3a3SEmmanuel Vadot ethphy0: ethernet-phy@0 { 87c9ccf3a3SEmmanuel Vadot compatible = "ethernet-phy-ieee802.3-c22"; 88c9ccf3a3SEmmanuel Vadot reg = <0>; 89c9ccf3a3SEmmanuel Vadot reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 90c9ccf3a3SEmmanuel Vadot reset-assert-us = <10000>; 91c9ccf3a3SEmmanuel Vadot }; 92c9ccf3a3SEmmanuel Vadot }; 93c9ccf3a3SEmmanuel Vadot}; 94c9ccf3a3SEmmanuel Vadot 95c9ccf3a3SEmmanuel Vadot&flexspi { 96c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 97c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_flexspi0>; 98c9ccf3a3SEmmanuel Vadot pinctrl-1 = <&pinctrl_flexspi1>; 99c9ccf3a3SEmmanuel Vadot status = "okay"; 100c9ccf3a3SEmmanuel Vadot 101d5b0e70fSEmmanuel Vadot flash0: flash@0 { 102c9ccf3a3SEmmanuel Vadot reg = <0>; 103c9ccf3a3SEmmanuel Vadot #address-cells = <1>; 104c9ccf3a3SEmmanuel Vadot #size-cells = <1>; 105c9ccf3a3SEmmanuel Vadot compatible = "jedec,spi-nor"; 106c9ccf3a3SEmmanuel Vadot spi-max-frequency = <40000000>; 107c9ccf3a3SEmmanuel Vadot }; 108c9ccf3a3SEmmanuel Vadot}; 109c9ccf3a3SEmmanuel Vadot 110c9ccf3a3SEmmanuel Vadot&iomuxc { 111c9ccf3a3SEmmanuel Vadot pinctrl_csi_pwn: csi-pwn-grp { 112c9ccf3a3SEmmanuel Vadot fsl,pins = < 113c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 114c9ccf3a3SEmmanuel Vadot >; 115c9ccf3a3SEmmanuel Vadot }; 116c9ccf3a3SEmmanuel Vadot 117c9ccf3a3SEmmanuel Vadot pinctrl_ecspi1: ecspi1-grp { 118c9ccf3a3SEmmanuel Vadot fsl,pins = < 119c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 120c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 121c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 122c9ccf3a3SEmmanuel Vadot >; 123c9ccf3a3SEmmanuel Vadot }; 124c9ccf3a3SEmmanuel Vadot 125fac71e4eSEmmanuel Vadot pinctrl_ecspi1_cs: ecspi1cs-grp { 126c9ccf3a3SEmmanuel Vadot fsl,pins = < 127c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40000 128c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40000 129c9ccf3a3SEmmanuel Vadot >; 130c9ccf3a3SEmmanuel Vadot }; 131c9ccf3a3SEmmanuel Vadot 132c9ccf3a3SEmmanuel Vadot pinctrl_fec1: fec1-grp { 133c9ccf3a3SEmmanuel Vadot fsl,pins = < 134c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 135c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 136c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 137c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 138c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 139c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 140c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 141c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 142c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 143c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 144c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 145c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 146c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 147c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 148c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 149c9ccf3a3SEmmanuel Vadot >; 150c9ccf3a3SEmmanuel Vadot }; 151c9ccf3a3SEmmanuel Vadot 152c9ccf3a3SEmmanuel Vadot pinctrl_flexspi0: flexspi0-grp { 153c9ccf3a3SEmmanuel Vadot fsl,pins = < 154c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 155c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 156c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 157c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 158c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 159c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 160c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_DQS_QSPI_A_DQS 0x82 161c9ccf3a3SEmmanuel Vadot >; 162c9ccf3a3SEmmanuel Vadot }; 163c9ccf3a3SEmmanuel Vadot 164c9ccf3a3SEmmanuel Vadot pinctrl_flexspi1: flexspi1-grp { 165c9ccf3a3SEmmanuel Vadot fsl,pins = < 166c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_CLE_QSPI_B_SCLK 0x1c2 167c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_CE2_B_QSPI_B_SS0_B 0x82 168c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_DATA04_QSPI_B_DATA0 0x82 169c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_DATA05_QSPI_B_DATA1 0x82 170c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_DATA06_QSPI_B_DATA2 0x82 171c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_DATA07_QSPI_B_DATA3 0x82 172c9ccf3a3SEmmanuel Vadot >; 173c9ccf3a3SEmmanuel Vadot }; 174c9ccf3a3SEmmanuel Vadot 175c9ccf3a3SEmmanuel Vadot pinctrl_gpio_led: gpio-led-grp { 176c9ccf3a3SEmmanuel Vadot fsl,pins = < 177c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 0x19 178c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x19 179c9ccf3a3SEmmanuel Vadot >; 180c9ccf3a3SEmmanuel Vadot }; 181c9ccf3a3SEmmanuel Vadot 182c9ccf3a3SEmmanuel Vadot pinctrl_i2c1: i2c1-grp { 183c9ccf3a3SEmmanuel Vadot fsl,pins = < 184c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 185c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 186c9ccf3a3SEmmanuel Vadot >; 187c9ccf3a3SEmmanuel Vadot }; 188c9ccf3a3SEmmanuel Vadot 189c9ccf3a3SEmmanuel Vadot pinctrl_i2c2: i2c2grp { 190c9ccf3a3SEmmanuel Vadot fsl,pins = < 191c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 192c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 193c9ccf3a3SEmmanuel Vadot >; 194c9ccf3a3SEmmanuel Vadot }; 195c9ccf3a3SEmmanuel Vadot 196c9ccf3a3SEmmanuel Vadot pinctrl_i2c3: i2c3-grp { 197c9ccf3a3SEmmanuel Vadot fsl,pins = < 198c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 199c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 200c9ccf3a3SEmmanuel Vadot >; 201c9ccf3a3SEmmanuel Vadot }; 202c9ccf3a3SEmmanuel Vadot 203c9ccf3a3SEmmanuel Vadot pinctrl_lvds: lvds-grp { 204c9ccf3a3SEmmanuel Vadot fsl,pins = < 205c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x06 206c9ccf3a3SEmmanuel Vadot >; 207c9ccf3a3SEmmanuel Vadot }; 208c9ccf3a3SEmmanuel Vadot 209c9ccf3a3SEmmanuel Vadot pinctrl_pcie0: pcie0-grp { 210c9ccf3a3SEmmanuel Vadot fsl,pins = < 211c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x41 212c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x41 213c9ccf3a3SEmmanuel Vadot >; 214c9ccf3a3SEmmanuel Vadot }; 215c9ccf3a3SEmmanuel Vadot 216fac71e4eSEmmanuel Vadot pinctrl_pmic: pmicirq-grp { 217c9ccf3a3SEmmanuel Vadot fsl,pins = < 218c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x41 219c9ccf3a3SEmmanuel Vadot >; 220c9ccf3a3SEmmanuel Vadot }; 221c9ccf3a3SEmmanuel Vadot 222c9ccf3a3SEmmanuel Vadot pinctrl_pwm1: pwm1-grp { 223c9ccf3a3SEmmanuel Vadot fsl,pins = < 224c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x06 225c9ccf3a3SEmmanuel Vadot >; 226c9ccf3a3SEmmanuel Vadot }; 227c9ccf3a3SEmmanuel Vadot 228c9ccf3a3SEmmanuel Vadot pinctrl_sai2: sai2-grp { 229c9ccf3a3SEmmanuel Vadot fsl,pins = < 230c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6 231c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI2_RXC_SAI2_RX_BCLK 0xd6 232c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6 233c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI2_RXFS_SAI2_RX_SYNC 0xd6 234c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 235c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 236c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 237c9ccf3a3SEmmanuel Vadot >; 238c9ccf3a3SEmmanuel Vadot }; 239c9ccf3a3SEmmanuel Vadot 240c9ccf3a3SEmmanuel Vadot pinctrl_spdif1: spdif1-grp { 241c9ccf3a3SEmmanuel Vadot fsl,pins = < 242c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6 243c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SPDIF_RX_SPDIF1_IN 0xd6 244c9ccf3a3SEmmanuel Vadot >; 245c9ccf3a3SEmmanuel Vadot }; 246c9ccf3a3SEmmanuel Vadot 247c9ccf3a3SEmmanuel Vadot pinctrl_uart1: uart1-grp { 248c9ccf3a3SEmmanuel Vadot fsl,pins = < 249c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 250c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 251c9ccf3a3SEmmanuel Vadot >; 252c9ccf3a3SEmmanuel Vadot }; 253c9ccf3a3SEmmanuel Vadot 254c9ccf3a3SEmmanuel Vadot pinctrl_uart2: uart2-grp { 255c9ccf3a3SEmmanuel Vadot fsl,pins = < 256c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 257c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 258c9ccf3a3SEmmanuel Vadot 259c9ccf3a3SEmmanuel Vadot /* rts and cts */ 260c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 261c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 262c9ccf3a3SEmmanuel Vadot >; 263c9ccf3a3SEmmanuel Vadot }; 264c9ccf3a3SEmmanuel Vadot 265c9ccf3a3SEmmanuel Vadot pinctrl_uart3: uart3-grp { 266c9ccf3a3SEmmanuel Vadot fsl,pins = < 267c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 268c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 269c9ccf3a3SEmmanuel Vadot >; 270c9ccf3a3SEmmanuel Vadot }; 271c9ccf3a3SEmmanuel Vadot 272c9ccf3a3SEmmanuel Vadot pinctrl_uart4: uart4-grp { 273c9ccf3a3SEmmanuel Vadot fsl,pins = < 274c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 275c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 276c9ccf3a3SEmmanuel Vadot >; 277c9ccf3a3SEmmanuel Vadot }; 278c9ccf3a3SEmmanuel Vadot 279c9ccf3a3SEmmanuel Vadot pinctrl_usdhc1: usdhc1-grp { 280c9ccf3a3SEmmanuel Vadot fsl,pins = < 281c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 282c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 283c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 284c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 285c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 286c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 287c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0 288c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0 289c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0 290c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0 291c9ccf3a3SEmmanuel Vadot >; 292c9ccf3a3SEmmanuel Vadot }; 293c9ccf3a3SEmmanuel Vadot 294c9ccf3a3SEmmanuel Vadot pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { 295c9ccf3a3SEmmanuel Vadot fsl,pins = < 296c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 297c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 298c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 299c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 300c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 301c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 302c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4 303c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4 304c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4 305c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4 306c9ccf3a3SEmmanuel Vadot >; 307c9ccf3a3SEmmanuel Vadot }; 308c9ccf3a3SEmmanuel Vadot 309c9ccf3a3SEmmanuel Vadot pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { 310c9ccf3a3SEmmanuel Vadot fsl,pins = < 311c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 312c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 313c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 314c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 315c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 316c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 317c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6 318c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6 319c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6 320c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6 321c9ccf3a3SEmmanuel Vadot >; 322c9ccf3a3SEmmanuel Vadot }; 323c9ccf3a3SEmmanuel Vadot 324c9ccf3a3SEmmanuel Vadot pinctrl_usdhc1_gpio: usdhc1-gpio-grp { 325c9ccf3a3SEmmanuel Vadot fsl,pins = < 326c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x41 327c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x1c4 328c9ccf3a3SEmmanuel Vadot >; 329c9ccf3a3SEmmanuel Vadot }; 330c9ccf3a3SEmmanuel Vadot 331c9ccf3a3SEmmanuel Vadot pinctrl_usdhc2: usdhc2-grp { 332c9ccf3a3SEmmanuel Vadot fsl,pins = < 333c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 334c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 335c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 336c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 337c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 338c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 339c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 340c9ccf3a3SEmmanuel Vadot >; 341c9ccf3a3SEmmanuel Vadot }; 342c9ccf3a3SEmmanuel Vadot 343c9ccf3a3SEmmanuel Vadot pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp { 344c9ccf3a3SEmmanuel Vadot fsl,pins = < 345c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 346c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 347c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 348c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 349c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 350c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 351c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 352c9ccf3a3SEmmanuel Vadot >; 353c9ccf3a3SEmmanuel Vadot }; 354c9ccf3a3SEmmanuel Vadot 355c9ccf3a3SEmmanuel Vadot pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp { 356c9ccf3a3SEmmanuel Vadot fsl,pins = < 357c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 358c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 359c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 360c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 361c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 362c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 363c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 364c9ccf3a3SEmmanuel Vadot >; 365c9ccf3a3SEmmanuel Vadot }; 366c9ccf3a3SEmmanuel Vadot 367c9ccf3a3SEmmanuel Vadot /* no reset for sdhc2 interface */ 368c9ccf3a3SEmmanuel Vadot pinctrl_usdhc2_gpio: usdhc2-gpio-grp { 369c9ccf3a3SEmmanuel Vadot fsl,pins = < 370c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4 371c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0x1c4 372c9ccf3a3SEmmanuel Vadot >; 373c9ccf3a3SEmmanuel Vadot }; 374c9ccf3a3SEmmanuel Vadot 375c9ccf3a3SEmmanuel Vadot pinctrl_wdog: wdog-grp { 376c9ccf3a3SEmmanuel Vadot fsl,pins = < 377c9ccf3a3SEmmanuel Vadot MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 378c9ccf3a3SEmmanuel Vadot >; 379c9ccf3a3SEmmanuel Vadot }; 380c9ccf3a3SEmmanuel Vadot}; 381c9ccf3a3SEmmanuel Vadot 382c9ccf3a3SEmmanuel Vadot&i2c1 { 383c9ccf3a3SEmmanuel Vadot clock-frequency = <400000>; 384c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 385c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 386c9ccf3a3SEmmanuel Vadot status = "okay"; 387c9ccf3a3SEmmanuel Vadot}; 388c9ccf3a3SEmmanuel Vadot 389c9ccf3a3SEmmanuel Vadot&i2c2 { 390c9ccf3a3SEmmanuel Vadot clock-frequency = <400000>; 391c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 392c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 393c9ccf3a3SEmmanuel Vadot status = "okay"; 394c9ccf3a3SEmmanuel Vadot}; 395c9ccf3a3SEmmanuel Vadot 396c9ccf3a3SEmmanuel Vadot&i2c3 { 397c9ccf3a3SEmmanuel Vadot clock-frequency = <400000>; 398c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 399c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c3>; 400c9ccf3a3SEmmanuel Vadot status = "okay"; 401c9ccf3a3SEmmanuel Vadot 402c9ccf3a3SEmmanuel Vadot bd71847: pmic@4b { 403c9ccf3a3SEmmanuel Vadot compatible = "rohm,bd71847"; 404c9ccf3a3SEmmanuel Vadot reg = <0x4b>; 405c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_pmic>; 406c9ccf3a3SEmmanuel Vadot interrupt-parent = <&gpio3>; 407c9ccf3a3SEmmanuel Vadot interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 408c9ccf3a3SEmmanuel Vadot rohm,reset-snvs-powered; 409c9ccf3a3SEmmanuel Vadot 410c9ccf3a3SEmmanuel Vadot regulators { 411c9ccf3a3SEmmanuel Vadot buck1_reg: BUCK1 { 412*aa1a8ff2SEmmanuel Vadot regulator-name = "buck1"; 413c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <700000>; 414c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <1300000>; 415c9ccf3a3SEmmanuel Vadot regulator-boot-on; 416c9ccf3a3SEmmanuel Vadot regulator-always-on; 417c9ccf3a3SEmmanuel Vadot regulator-ramp-delay = <1250>; 418c9ccf3a3SEmmanuel Vadot }; 419c9ccf3a3SEmmanuel Vadot 420c9ccf3a3SEmmanuel Vadot buck2_reg: BUCK2 { 421*aa1a8ff2SEmmanuel Vadot regulator-name = "buck2"; 422c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <700000>; 423c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <1300000>; 424c9ccf3a3SEmmanuel Vadot regulator-boot-on; 425c9ccf3a3SEmmanuel Vadot regulator-always-on; 426c9ccf3a3SEmmanuel Vadot regulator-ramp-delay = <1250>; 427c9ccf3a3SEmmanuel Vadot rohm,dvs-run-voltage = <1000000>; 428c9ccf3a3SEmmanuel Vadot rohm,dvs-idle-voltage = <900000>; 429c9ccf3a3SEmmanuel Vadot }; 430c9ccf3a3SEmmanuel Vadot 431c9ccf3a3SEmmanuel Vadot buck3_reg: BUCK3 { 432c9ccf3a3SEmmanuel Vadot // BUCK5 in datasheet 433*aa1a8ff2SEmmanuel Vadot regulator-name = "buck3"; 434c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <700000>; 435c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <1350000>; 436c9ccf3a3SEmmanuel Vadot regulator-boot-on; 437c9ccf3a3SEmmanuel Vadot regulator-always-on; 438c9ccf3a3SEmmanuel Vadot }; 439c9ccf3a3SEmmanuel Vadot 440c9ccf3a3SEmmanuel Vadot buck4_reg: BUCK4 { 441c9ccf3a3SEmmanuel Vadot // BUCK6 in datasheet 442*aa1a8ff2SEmmanuel Vadot regulator-name = "buck4"; 443c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <3000000>; 444c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <3300000>; 445c9ccf3a3SEmmanuel Vadot regulator-boot-on; 446c9ccf3a3SEmmanuel Vadot regulator-always-on; 447c9ccf3a3SEmmanuel Vadot }; 448c9ccf3a3SEmmanuel Vadot 449c9ccf3a3SEmmanuel Vadot buck5_reg: BUCK5 { 450c9ccf3a3SEmmanuel Vadot // BUCK7 in datasheet 451*aa1a8ff2SEmmanuel Vadot regulator-name = "buck5"; 452c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <1605000>; 453c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <1995000>; 454c9ccf3a3SEmmanuel Vadot regulator-boot-on; 455c9ccf3a3SEmmanuel Vadot regulator-always-on; 456c9ccf3a3SEmmanuel Vadot }; 457c9ccf3a3SEmmanuel Vadot 458c9ccf3a3SEmmanuel Vadot buck6_reg: BUCK6 { 459c9ccf3a3SEmmanuel Vadot // BUCK8 in datasheet 460*aa1a8ff2SEmmanuel Vadot regulator-name = "buck6"; 461c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <800000>; 462c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <1400000>; 463c9ccf3a3SEmmanuel Vadot regulator-boot-on; 464c9ccf3a3SEmmanuel Vadot regulator-always-on; 465c9ccf3a3SEmmanuel Vadot }; 466c9ccf3a3SEmmanuel Vadot 467c9ccf3a3SEmmanuel Vadot ldo1_reg: LDO1 { 468*aa1a8ff2SEmmanuel Vadot regulator-name = "ldo1"; 469c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <1600000>; 470c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <1900000>; 471c9ccf3a3SEmmanuel Vadot regulator-boot-on; 472c9ccf3a3SEmmanuel Vadot regulator-always-on; 473c9ccf3a3SEmmanuel Vadot }; 474c9ccf3a3SEmmanuel Vadot 475c9ccf3a3SEmmanuel Vadot ldo2_reg: LDO2 { 476*aa1a8ff2SEmmanuel Vadot regulator-name = "ldo2"; 477c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <800000>; 478c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <900000>; 479c9ccf3a3SEmmanuel Vadot regulator-boot-on; 480c9ccf3a3SEmmanuel Vadot regulator-always-on; 481c9ccf3a3SEmmanuel Vadot }; 482c9ccf3a3SEmmanuel Vadot 483c9ccf3a3SEmmanuel Vadot ldo3_reg: LDO3 { 484*aa1a8ff2SEmmanuel Vadot regulator-name = "ldo3"; 485c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <1800000>; 486c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <3300000>; 487c9ccf3a3SEmmanuel Vadot regulator-boot-on; 488c9ccf3a3SEmmanuel Vadot regulator-always-on; 489c9ccf3a3SEmmanuel Vadot }; 490c9ccf3a3SEmmanuel Vadot 491c9ccf3a3SEmmanuel Vadot ldo4_reg: LDO4 { 492*aa1a8ff2SEmmanuel Vadot regulator-name = "ldo4"; 493c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <900000>; 494c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <1800000>; 495c9ccf3a3SEmmanuel Vadot regulator-boot-on; 496c9ccf3a3SEmmanuel Vadot regulator-always-on; 497c9ccf3a3SEmmanuel Vadot }; 498c9ccf3a3SEmmanuel Vadot 499c9ccf3a3SEmmanuel Vadot ldo6_reg: LDO6 { 500*aa1a8ff2SEmmanuel Vadot regulator-name = "ldo6"; 501c9ccf3a3SEmmanuel Vadot regulator-min-microvolt = <900000>; 502c9ccf3a3SEmmanuel Vadot regulator-max-microvolt = <1800000>; 503c9ccf3a3SEmmanuel Vadot regulator-boot-on; 504c9ccf3a3SEmmanuel Vadot regulator-always-on; 505c9ccf3a3SEmmanuel Vadot }; 506c9ccf3a3SEmmanuel Vadot }; 507c9ccf3a3SEmmanuel Vadot }; 508c9ccf3a3SEmmanuel Vadot 509c9ccf3a3SEmmanuel Vadot rv1805: rtc@69 { 510c9ccf3a3SEmmanuel Vadot compatible = "abracon,ab1805"; 511c9ccf3a3SEmmanuel Vadot reg = <0x69>; 512c9ccf3a3SEmmanuel Vadot }; 513c9ccf3a3SEmmanuel Vadot}; 514c9ccf3a3SEmmanuel Vadot 515c9ccf3a3SEmmanuel Vadot&mu { 516c9ccf3a3SEmmanuel Vadot status = "okay"; 517c9ccf3a3SEmmanuel Vadot}; 518c9ccf3a3SEmmanuel Vadot 519c9ccf3a3SEmmanuel Vadot&pwm1 { 520c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 521c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm1>; 522c9ccf3a3SEmmanuel Vadot}; 523c9ccf3a3SEmmanuel Vadot 524c9ccf3a3SEmmanuel Vadot&sai2 { 525c9ccf3a3SEmmanuel Vadot #sound-dai-cells = <0>; 526c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 527c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_sai2>; 528c9ccf3a3SEmmanuel Vadot assigned-clocks = <&clk IMX8MM_CLK_SAI2>; 529c9ccf3a3SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 530c9ccf3a3SEmmanuel Vadot assigned-clock-rates = <12000000>; 531c9ccf3a3SEmmanuel Vadot status = "disabled"; 532c9ccf3a3SEmmanuel Vadot}; 533c9ccf3a3SEmmanuel Vadot 534c9ccf3a3SEmmanuel Vadot&spdif1 { 535c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 536c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_spdif1>; 537c9ccf3a3SEmmanuel Vadot assigned-clocks = <&clk IMX8MM_CLK_SPDIF1>; 538c9ccf3a3SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 539c9ccf3a3SEmmanuel Vadot assigned-clock-rates = <24576000>; 540c9ccf3a3SEmmanuel Vadot clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_24M>, 541c9ccf3a3SEmmanuel Vadot <&clk IMX8MM_CLK_SPDIF1>, <&clk IMX8MM_CLK_DUMMY>, 542c9ccf3a3SEmmanuel Vadot <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>, 543c9ccf3a3SEmmanuel Vadot <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_DUMMY>, 544c9ccf3a3SEmmanuel Vadot <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>, 545c9ccf3a3SEmmanuel Vadot <&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>; 546c9ccf3a3SEmmanuel Vadot clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", 547c9ccf3a3SEmmanuel Vadot "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k"; 548c9ccf3a3SEmmanuel Vadot status = "disabled"; 549c9ccf3a3SEmmanuel Vadot}; 550c9ccf3a3SEmmanuel Vadot 551c9ccf3a3SEmmanuel Vadot&uart1 { /* console */ 552c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 553c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_uart1>; 554c9ccf3a3SEmmanuel Vadot assigned-clocks = <&clk IMX8MM_CLK_UART1>; 555c9ccf3a3SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; 556c9ccf3a3SEmmanuel Vadot status = "okay"; 557c9ccf3a3SEmmanuel Vadot}; 558c9ccf3a3SEmmanuel Vadot 559c9ccf3a3SEmmanuel Vadot&uart2 { 560c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 561c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 562c9ccf3a3SEmmanuel Vadot assigned-clocks = <&clk IMX8MM_CLK_UART2>; 563c9ccf3a3SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; 564c9ccf3a3SEmmanuel Vadot status = "okay"; 565c9ccf3a3SEmmanuel Vadot}; 566c9ccf3a3SEmmanuel Vadot 567c9ccf3a3SEmmanuel Vadot&uart3 { 568c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 569c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_uart3>; 570c9ccf3a3SEmmanuel Vadot assigned-clocks = <&clk IMX8MM_CLK_UART3>; 571c9ccf3a3SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; 572c9ccf3a3SEmmanuel Vadot status = "okay"; 573c9ccf3a3SEmmanuel Vadot}; 574c9ccf3a3SEmmanuel Vadot 575c9ccf3a3SEmmanuel Vadot&uart4 { 576c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 577c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_uart4>; 578c9ccf3a3SEmmanuel Vadot assigned-clocks = <&clk IMX8MM_CLK_UART4>; 579c9ccf3a3SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; 580c9ccf3a3SEmmanuel Vadot status = "okay"; 581c9ccf3a3SEmmanuel Vadot}; 582c9ccf3a3SEmmanuel Vadot 583c9ccf3a3SEmmanuel Vadot&usbotg1 { 584c9ccf3a3SEmmanuel Vadot dr_mode = "otg"; 585c9ccf3a3SEmmanuel Vadot over-current-active-low; 586c9ccf3a3SEmmanuel Vadot status = "okay"; 587c9ccf3a3SEmmanuel Vadot}; 588c9ccf3a3SEmmanuel Vadot 589c9ccf3a3SEmmanuel Vadot&usbotg2 { 590c9ccf3a3SEmmanuel Vadot dr_mode = "host"; 591c9ccf3a3SEmmanuel Vadot disable-over-current; 592c9ccf3a3SEmmanuel Vadot status = "disabled"; 593c9ccf3a3SEmmanuel Vadot}; 594c9ccf3a3SEmmanuel Vadot 595c9ccf3a3SEmmanuel Vadot&usdhc1 { 596c9ccf3a3SEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 597c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; 598c9ccf3a3SEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; 599c9ccf3a3SEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; 600c9ccf3a3SEmmanuel Vadot bus-width = <8>; 601c9ccf3a3SEmmanuel Vadot vmmc-supply = <®_usdhc1_vmmc>; 602c9ccf3a3SEmmanuel Vadot keep-power-in-suspend; 603c9ccf3a3SEmmanuel Vadot non-removable; 604c9ccf3a3SEmmanuel Vadot status = "okay"; 605c9ccf3a3SEmmanuel Vadot}; 606c9ccf3a3SEmmanuel Vadot 607c9ccf3a3SEmmanuel Vadot&usdhc2 { 608c9ccf3a3SEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 609c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 610c9ccf3a3SEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 611c9ccf3a3SEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 612c9ccf3a3SEmmanuel Vadot cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 613c9ccf3a3SEmmanuel Vadot wp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; 614c9ccf3a3SEmmanuel Vadot bus-width = <4>; 615c9ccf3a3SEmmanuel Vadot vmmc-supply = <®_usdhc2_vmmc>; 616c9ccf3a3SEmmanuel Vadot no-1-8-v; 617c9ccf3a3SEmmanuel Vadot status = "okay"; 618c9ccf3a3SEmmanuel Vadot}; 619c9ccf3a3SEmmanuel Vadot 620c9ccf3a3SEmmanuel Vadot&wdog1 { 621c9ccf3a3SEmmanuel Vadot pinctrl-names = "default"; 622c9ccf3a3SEmmanuel Vadot pinctrl-0 = <&pinctrl_wdog>; 623c9ccf3a3SEmmanuel Vadot fsl,ext-reset-output; 624c9ccf3a3SEmmanuel Vadot status = "okay"; 625c9ccf3a3SEmmanuel Vadot}; 626