1e67e8565SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 2e67e8565SEmmanuel Vadot/* 3e67e8565SEmmanuel Vadot * Copyright 2020-2021 TQ-Systems GmbH 4e67e8565SEmmanuel Vadot */ 5e67e8565SEmmanuel Vadot 6b97ee269SEmmanuel Vadot#include <dt-bindings/phy/phy-imx8-pcie.h> 7e67e8565SEmmanuel Vadot#include "imx8mm.dtsi" 8e67e8565SEmmanuel Vadot 9e67e8565SEmmanuel Vadot/ { 10e67e8565SEmmanuel Vadot model = "TQ-Systems GmbH i.MX8MM TQMa8MxML"; 11e67e8565SEmmanuel Vadot compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 12e67e8565SEmmanuel Vadot 13e67e8565SEmmanuel Vadot memory@40000000 { 14e67e8565SEmmanuel Vadot device_type = "memory"; 15e67e8565SEmmanuel Vadot /* our minimum RAM config will be 1024 MiB */ 16e67e8565SEmmanuel Vadot reg = <0x00000000 0x40000000 0 0x40000000>; 17e67e8565SEmmanuel Vadot }; 18e67e8565SEmmanuel Vadot 19e67e8565SEmmanuel Vadot /* e-MMC IO, needed for HS modes */ 20e67e8565SEmmanuel Vadot reg_vcc1v8: regulator-vcc1v8 { 21e67e8565SEmmanuel Vadot compatible = "regulator-fixed"; 22e67e8565SEmmanuel Vadot regulator-name = "TQMA8MXML_VCC1V8"; 23e67e8565SEmmanuel Vadot regulator-min-microvolt = <1800000>; 24e67e8565SEmmanuel Vadot regulator-max-microvolt = <1800000>; 25e67e8565SEmmanuel Vadot }; 26e67e8565SEmmanuel Vadot 27e67e8565SEmmanuel Vadot /* identical to buck4_reg, but should never change */ 28e67e8565SEmmanuel Vadot reg_vcc3v3: regulator-vcc3v3 { 29e67e8565SEmmanuel Vadot compatible = "regulator-fixed"; 30e67e8565SEmmanuel Vadot regulator-name = "TQMA8MXML_VCC3V3"; 31e67e8565SEmmanuel Vadot regulator-min-microvolt = <3300000>; 32e67e8565SEmmanuel Vadot regulator-max-microvolt = <3300000>; 33e67e8565SEmmanuel Vadot }; 34e67e8565SEmmanuel Vadot 35e67e8565SEmmanuel Vadot reserved-memory { 36e67e8565SEmmanuel Vadot #address-cells = <2>; 37e67e8565SEmmanuel Vadot #size-cells = <2>; 38e67e8565SEmmanuel Vadot ranges; 39e67e8565SEmmanuel Vadot 40e67e8565SEmmanuel Vadot /* global autoconfigured region for contiguous allocations */ 41e67e8565SEmmanuel Vadot linux,cma { 42e67e8565SEmmanuel Vadot compatible = "shared-dma-pool"; 43e67e8565SEmmanuel Vadot reusable; 44e67e8565SEmmanuel Vadot /* 640 MiB */ 45e67e8565SEmmanuel Vadot size = <0 0x28000000>; 46e67e8565SEmmanuel Vadot /* 1024 - 128 MiB, our minimum RAM config will be 1024 MiB */ 47e67e8565SEmmanuel Vadot alloc-ranges = <0 0x40000000 0 0x78000000>; 48e67e8565SEmmanuel Vadot linux,cma-default; 49e67e8565SEmmanuel Vadot }; 50e67e8565SEmmanuel Vadot }; 51e67e8565SEmmanuel Vadot}; 52e67e8565SEmmanuel Vadot 53e67e8565SEmmanuel Vadot&A53_0 { 54e67e8565SEmmanuel Vadot cpu-supply = <&buck2_reg>; 55e67e8565SEmmanuel Vadot}; 56e67e8565SEmmanuel Vadot 57e67e8565SEmmanuel Vadot&flexspi { 58e67e8565SEmmanuel Vadot pinctrl-names = "default"; 59e67e8565SEmmanuel Vadot pinctrl-0 = <&pinctrl_flexspi>; 60e67e8565SEmmanuel Vadot status = "okay"; 61e67e8565SEmmanuel Vadot 62e67e8565SEmmanuel Vadot flash0: flash@0 { 63e67e8565SEmmanuel Vadot compatible = "jedec,spi-nor"; 64e67e8565SEmmanuel Vadot reg = <0>; 65e67e8565SEmmanuel Vadot #address-cells = <1>; 66e67e8565SEmmanuel Vadot #size-cells = <1>; 67e67e8565SEmmanuel Vadot spi-max-frequency = <84000000>; 68e67e8565SEmmanuel Vadot spi-tx-bus-width = <1>; 69e67e8565SEmmanuel Vadot spi-rx-bus-width = <4>; 70e67e8565SEmmanuel Vadot }; 71e67e8565SEmmanuel Vadot}; 72e67e8565SEmmanuel Vadot 73e67e8565SEmmanuel Vadot&gpu_2d { 74e67e8565SEmmanuel Vadot status = "okay"; 75e67e8565SEmmanuel Vadot}; 76e67e8565SEmmanuel Vadot 77e67e8565SEmmanuel Vadot&gpu_3d { 78e67e8565SEmmanuel Vadot status = "okay"; 79e67e8565SEmmanuel Vadot}; 80e67e8565SEmmanuel Vadot 81e67e8565SEmmanuel Vadot&i2c1 { 82e67e8565SEmmanuel Vadot clock-frequency = <100000>; 83e67e8565SEmmanuel Vadot pinctrl-names = "default", "gpio"; 84e67e8565SEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 85e67e8565SEmmanuel Vadot pinctrl-1 = <&pinctrl_i2c1_gpio>; 86e67e8565SEmmanuel Vadot scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 87e67e8565SEmmanuel Vadot sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 88e67e8565SEmmanuel Vadot status = "okay"; 89e67e8565SEmmanuel Vadot 90cb7aa33aSEmmanuel Vadot sensor0: temperature-sensor@1b { 91cb7aa33aSEmmanuel Vadot compatible = "nxp,se97b", "jedec,jc-42.4-temp"; 92e67e8565SEmmanuel Vadot reg = <0x1b>; 93e67e8565SEmmanuel Vadot }; 94e67e8565SEmmanuel Vadot 95e67e8565SEmmanuel Vadot pca9450: pmic@25 { 96e67e8565SEmmanuel Vadot compatible = "nxp,pca9450a"; 97e67e8565SEmmanuel Vadot reg = <0x25>; 98e67e8565SEmmanuel Vadot 99e67e8565SEmmanuel Vadot /* PMIC PCA9450 PMIC_nINT GPIO1_IO08 */ 100e67e8565SEmmanuel Vadot pinctrl-0 = <&pinctrl_pmic>; 101e67e8565SEmmanuel Vadot pinctrl-names = "default"; 102e67e8565SEmmanuel Vadot interrupt-parent = <&gpio1>; 103e67e8565SEmmanuel Vadot interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 104e67e8565SEmmanuel Vadot 105e67e8565SEmmanuel Vadot regulators { 106e67e8565SEmmanuel Vadot /* V_0V85_SOC: 0.85 */ 107e67e8565SEmmanuel Vadot buck1_reg: BUCK1 { 108e67e8565SEmmanuel Vadot regulator-name = "BUCK1"; 109e67e8565SEmmanuel Vadot regulator-min-microvolt = <850000>; 110e67e8565SEmmanuel Vadot regulator-max-microvolt = <850000>; 111e67e8565SEmmanuel Vadot regulator-boot-on; 112e67e8565SEmmanuel Vadot regulator-always-on; 113e67e8565SEmmanuel Vadot regulator-ramp-delay = <3125>; 114e67e8565SEmmanuel Vadot }; 115e67e8565SEmmanuel Vadot 116e67e8565SEmmanuel Vadot /* VDD_ARM */ 117e67e8565SEmmanuel Vadot buck2_reg: BUCK2 { 118e67e8565SEmmanuel Vadot regulator-name = "BUCK2"; 119e67e8565SEmmanuel Vadot regulator-min-microvolt = <850000>; 120e67e8565SEmmanuel Vadot regulator-max-microvolt = <1000000>; 121e67e8565SEmmanuel Vadot regulator-boot-on; 122e67e8565SEmmanuel Vadot regulator-always-on; 123e67e8565SEmmanuel Vadot nxp,dvs-run-voltage = <950000>; 124e67e8565SEmmanuel Vadot nxp,dvs-standby-voltage = <850000>; 125e67e8565SEmmanuel Vadot regulator-ramp-delay = <3125>; 126e67e8565SEmmanuel Vadot }; 127e67e8565SEmmanuel Vadot 128e67e8565SEmmanuel Vadot /* V_0V85_GPU / DRAM / VPU */ 129e67e8565SEmmanuel Vadot buck3_reg: BUCK3 { 130e67e8565SEmmanuel Vadot regulator-name = "BUCK3"; 131e67e8565SEmmanuel Vadot regulator-min-microvolt = <850000>; 132e67e8565SEmmanuel Vadot regulator-max-microvolt = <950000>; 133e67e8565SEmmanuel Vadot regulator-boot-on; 134e67e8565SEmmanuel Vadot regulator-always-on; 135e67e8565SEmmanuel Vadot regulator-ramp-delay = <3125>; 136e67e8565SEmmanuel Vadot }; 137e67e8565SEmmanuel Vadot 138e67e8565SEmmanuel Vadot /* VCC3V3 -> VMMC, ... must not be changed */ 139e67e8565SEmmanuel Vadot buck4_reg: BUCK4 { 140e67e8565SEmmanuel Vadot regulator-name = "BUCK4"; 141e67e8565SEmmanuel Vadot regulator-min-microvolt = <3300000>; 142e67e8565SEmmanuel Vadot regulator-max-microvolt = <3300000>; 143e67e8565SEmmanuel Vadot regulator-boot-on; 144e67e8565SEmmanuel Vadot regulator-always-on; 145e67e8565SEmmanuel Vadot }; 146e67e8565SEmmanuel Vadot 147e67e8565SEmmanuel Vadot /* V_1V8 -> VQMMC, SPI-NOR, ... must not be changed */ 148e67e8565SEmmanuel Vadot buck5_reg: BUCK5 { 149e67e8565SEmmanuel Vadot regulator-name = "BUCK5"; 150e67e8565SEmmanuel Vadot regulator-min-microvolt = <1800000>; 151e67e8565SEmmanuel Vadot regulator-max-microvolt = <1800000>; 152e67e8565SEmmanuel Vadot regulator-boot-on; 153e67e8565SEmmanuel Vadot regulator-always-on; 154e67e8565SEmmanuel Vadot }; 155e67e8565SEmmanuel Vadot 156e67e8565SEmmanuel Vadot /* V_1V1 -> RAM, ... must not be changed */ 157e67e8565SEmmanuel Vadot buck6_reg: BUCK6 { 158e67e8565SEmmanuel Vadot regulator-name = "BUCK6"; 159e67e8565SEmmanuel Vadot regulator-min-microvolt = <1100000>; 160e67e8565SEmmanuel Vadot regulator-max-microvolt = <1100000>; 161e67e8565SEmmanuel Vadot regulator-boot-on; 162e67e8565SEmmanuel Vadot regulator-always-on; 163e67e8565SEmmanuel Vadot }; 164e67e8565SEmmanuel Vadot 165e67e8565SEmmanuel Vadot /* V_1V8_SNVS */ 166e67e8565SEmmanuel Vadot ldo1_reg: LDO1 { 167e67e8565SEmmanuel Vadot regulator-name = "LDO1"; 168e67e8565SEmmanuel Vadot regulator-min-microvolt = <1800000>; 169e67e8565SEmmanuel Vadot regulator-max-microvolt = <1800000>; 170e67e8565SEmmanuel Vadot regulator-boot-on; 171e67e8565SEmmanuel Vadot regulator-always-on; 172e67e8565SEmmanuel Vadot }; 173e67e8565SEmmanuel Vadot 174e67e8565SEmmanuel Vadot /* V_0V8_SNVS */ 175e67e8565SEmmanuel Vadot ldo2_reg: LDO2 { 176e67e8565SEmmanuel Vadot regulator-name = "LDO2"; 177e67e8565SEmmanuel Vadot regulator-min-microvolt = <800000>; 178e67e8565SEmmanuel Vadot regulator-max-microvolt = <850000>; 179e67e8565SEmmanuel Vadot regulator-boot-on; 180e67e8565SEmmanuel Vadot regulator-always-on; 181e67e8565SEmmanuel Vadot }; 182e67e8565SEmmanuel Vadot 183e67e8565SEmmanuel Vadot /* V_1V8_ANA */ 184e67e8565SEmmanuel Vadot ldo3_reg: LDO3 { 185e67e8565SEmmanuel Vadot regulator-name = "LDO3"; 186e67e8565SEmmanuel Vadot regulator-min-microvolt = <1800000>; 187e67e8565SEmmanuel Vadot regulator-max-microvolt = <1800000>; 188e67e8565SEmmanuel Vadot regulator-boot-on; 189e67e8565SEmmanuel Vadot regulator-always-on; 190e67e8565SEmmanuel Vadot }; 191e67e8565SEmmanuel Vadot 192e67e8565SEmmanuel Vadot /* V_0V9_MIPI */ 193e67e8565SEmmanuel Vadot ldo4_reg: LDO4 { 194e67e8565SEmmanuel Vadot regulator-name = "LDO4"; 195e67e8565SEmmanuel Vadot regulator-min-microvolt = <900000>; 196e67e8565SEmmanuel Vadot regulator-max-microvolt = <900000>; 197e67e8565SEmmanuel Vadot regulator-boot-on; 198e67e8565SEmmanuel Vadot regulator-always-on; 199e67e8565SEmmanuel Vadot }; 200e67e8565SEmmanuel Vadot 201e67e8565SEmmanuel Vadot /* VCC SD IO - switched using SD2 VSELECT */ 202e67e8565SEmmanuel Vadot ldo5_reg: LDO5 { 203e67e8565SEmmanuel Vadot regulator-name = "LDO5"; 204e67e8565SEmmanuel Vadot regulator-min-microvolt = <1800000>; 205e67e8565SEmmanuel Vadot regulator-max-microvolt = <3300000>; 206e67e8565SEmmanuel Vadot }; 207e67e8565SEmmanuel Vadot }; 208e67e8565SEmmanuel Vadot }; 209e67e8565SEmmanuel Vadot 210e67e8565SEmmanuel Vadot 211e67e8565SEmmanuel Vadot pcf85063: rtc@51 { 212e67e8565SEmmanuel Vadot compatible = "nxp,pcf85063a"; 213e67e8565SEmmanuel Vadot reg = <0x51>; 214e67e8565SEmmanuel Vadot quartz-load-femtofarads = <7000>; 215e67e8565SEmmanuel Vadot }; 216e67e8565SEmmanuel Vadot 217e67e8565SEmmanuel Vadot eeprom1: eeprom@53 { 218e67e8565SEmmanuel Vadot compatible = "nxp,se97b", "atmel,24c02"; 219e67e8565SEmmanuel Vadot read-only; 220e67e8565SEmmanuel Vadot reg = <0x53>; 221e67e8565SEmmanuel Vadot pagesize = <16>; 222f126890aSEmmanuel Vadot vcc-supply = <®_vcc3v3>; 223e67e8565SEmmanuel Vadot }; 224e67e8565SEmmanuel Vadot 225e67e8565SEmmanuel Vadot eeprom0: eeprom@57 { 226e67e8565SEmmanuel Vadot compatible = "atmel,24c64"; 227e67e8565SEmmanuel Vadot reg = <0x57>; 228e67e8565SEmmanuel Vadot pagesize = <32>; 229f126890aSEmmanuel Vadot vcc-supply = <®_vcc3v3>; 230e67e8565SEmmanuel Vadot }; 231e67e8565SEmmanuel Vadot}; 232e67e8565SEmmanuel Vadot 233*84943d6fSEmmanuel Vadot&mipi_dsi { 234*84943d6fSEmmanuel Vadot vddcore-supply = <&ldo4_reg>; 235*84943d6fSEmmanuel Vadot vddio-supply = <&ldo3_reg>; 236*84943d6fSEmmanuel Vadot}; 237*84943d6fSEmmanuel Vadot 238c9ccf3a3SEmmanuel Vadot&pcie_phy { 239c9ccf3a3SEmmanuel Vadot fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 240c9ccf3a3SEmmanuel Vadot fsl,clkreq-unsupported; 241c9ccf3a3SEmmanuel Vadot}; 242c9ccf3a3SEmmanuel Vadot 243e67e8565SEmmanuel Vadot&usdhc3 { 244e67e8565SEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 245e67e8565SEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 246e67e8565SEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 247e67e8565SEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 248e67e8565SEmmanuel Vadot bus-width = <8>; 249e67e8565SEmmanuel Vadot non-removable; 250e67e8565SEmmanuel Vadot no-sd; 251e67e8565SEmmanuel Vadot no-sdio; 252e67e8565SEmmanuel Vadot vmmc-supply = <®_vcc3v3>; 253e67e8565SEmmanuel Vadot vqmmc-supply = <®_vcc1v8>; 254e67e8565SEmmanuel Vadot status = "okay"; 255e67e8565SEmmanuel Vadot}; 256e67e8565SEmmanuel Vadot 257e67e8565SEmmanuel Vadot/* 258e67e8565SEmmanuel Vadot * Attention: 259e67e8565SEmmanuel Vadot * wdog reset is routed to PMIC, PMIC must be preconfigured to force POR 260e67e8565SEmmanuel Vadot * without LDO for SNVS. GPIO1_IO02 must not be used as GPIO. 261e67e8565SEmmanuel Vadot */ 262e67e8565SEmmanuel Vadot&wdog1 { 263e67e8565SEmmanuel Vadot pinctrl-names = "default"; 264e67e8565SEmmanuel Vadot pinctrl-0 = <&pinctrl_wdog>; 265e67e8565SEmmanuel Vadot fsl,ext-reset-output; 266e67e8565SEmmanuel Vadot status = "okay"; 267e67e8565SEmmanuel Vadot}; 268e67e8565SEmmanuel Vadot 269e67e8565SEmmanuel Vadot&iomuxc { 270e67e8565SEmmanuel Vadot pinctrl_flexspi: flexspigrp { 271e67e8565SEmmanuel Vadot fsl,pins = <MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x82>, 272e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82>, 273e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82>, 274e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82>, 275e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82>, 276e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82>; 277e67e8565SEmmanuel Vadot }; 278e67e8565SEmmanuel Vadot 279e67e8565SEmmanuel Vadot pinctrl_i2c1: i2c1grp { 280e67e8565SEmmanuel Vadot fsl,pins = <MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000004>, 281e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000004>; 282e67e8565SEmmanuel Vadot }; 283e67e8565SEmmanuel Vadot 284e67e8565SEmmanuel Vadot pinctrl_i2c1_gpio: i2c1gpiogrp { 285e67e8565SEmmanuel Vadot fsl,pins = <MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x40000004>, 286e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x40000004>; 287e67e8565SEmmanuel Vadot }; 288e67e8565SEmmanuel Vadot 289e67e8565SEmmanuel Vadot pinctrl_pmic: pmicgrp { 290e67e8565SEmmanuel Vadot fsl,pins = <MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x94>; 291e67e8565SEmmanuel Vadot }; 292e67e8565SEmmanuel Vadot 293e67e8565SEmmanuel Vadot pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { 294e67e8565SEmmanuel Vadot fsl,pins = <MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x84>; 295e67e8565SEmmanuel Vadot }; 296e67e8565SEmmanuel Vadot 297e67e8565SEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 298e67e8565SEmmanuel Vadot fsl,pins = <MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x1d4>, 299e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d2>, 300e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4>, 301e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4>, 302e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4>, 303e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4>, 304e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4>, 305e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4>, 306e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4>, 307e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4>, 308e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x84>, 309e67e8565SEmmanuel Vadot /* option USDHC3_RESET_B not defined, only in RM */ 310e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x84>; 311e67e8565SEmmanuel Vadot }; 312e67e8565SEmmanuel Vadot 313e67e8565SEmmanuel Vadot pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 314e67e8565SEmmanuel Vadot fsl,pins = <MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x1d2>, 315e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d2>, 316e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4>, 317e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4>, 318e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4>, 319e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4>, 320e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4>, 321e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4>, 322e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4>, 323e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4>, 324e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x84>, 325e67e8565SEmmanuel Vadot /* option USDHC3_RESET_B not defined, only in RM */ 326e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x84>; 327e67e8565SEmmanuel Vadot }; 328e67e8565SEmmanuel Vadot 329e67e8565SEmmanuel Vadot pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 330e67e8565SEmmanuel Vadot fsl,pins = <MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x1d6>, 331e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d2>, 332e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4>, 333e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4>, 334e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4>, 335e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4>, 336e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4>, 337e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4>, 338e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4>, 339e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4>, 340e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x84>, 341e67e8565SEmmanuel Vadot /* option USDHC3_RESET_B not defined, only in RM */ 342e67e8565SEmmanuel Vadot <MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x84>; 343e67e8565SEmmanuel Vadot }; 344e67e8565SEmmanuel Vadot 345e67e8565SEmmanuel Vadot pinctrl_wdog: wdoggrp { 346e67e8565SEmmanuel Vadot fsl,pins = <MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x84>; 347e67e8565SEmmanuel Vadot }; 348e67e8565SEmmanuel Vadot}; 349