1*8bab661aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*8bab661aSEmmanuel Vadot/*
3*8bab661aSEmmanuel Vadot * Copyright 2022 Gateworks Corporation
4*8bab661aSEmmanuel Vadot *
5*8bab661aSEmmanuel Vadot * GW72xx RS232 with RTS/CTS hardware flow control:
6*8bab661aSEmmanuel Vadot *  - GPIO4_0 rs485_en needs to be driven low (in-active)
7*8bab661aSEmmanuel Vadot *  - UART4_TX becomes RTS
8*8bab661aSEmmanuel Vadot *  - UART4_RX becomes CTS
9*8bab661aSEmmanuel Vadot */
10*8bab661aSEmmanuel Vadot
11*8bab661aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
12*8bab661aSEmmanuel Vadot
13*8bab661aSEmmanuel Vadot#include "imx8mm-pinfunc.h"
14*8bab661aSEmmanuel Vadot
15*8bab661aSEmmanuel Vadot/dts-v1/;
16*8bab661aSEmmanuel Vadot/plugin/;
17*8bab661aSEmmanuel Vadot
18*8bab661aSEmmanuel Vadot&{/} {
19*8bab661aSEmmanuel Vadot	compatible = "gw,imx8mm-gw72xx-0x";
20*8bab661aSEmmanuel Vadot};
21*8bab661aSEmmanuel Vadot
22*8bab661aSEmmanuel Vadot&gpio4 {
23*8bab661aSEmmanuel Vadot	rs485_en {
24*8bab661aSEmmanuel Vadot		gpio-hog;
25*8bab661aSEmmanuel Vadot		gpios = <0 GPIO_ACTIVE_HIGH>;
26*8bab661aSEmmanuel Vadot		output-low;
27*8bab661aSEmmanuel Vadot		line-name = "rs485_en";
28*8bab661aSEmmanuel Vadot	};
29*8bab661aSEmmanuel Vadot};
30*8bab661aSEmmanuel Vadot
31*8bab661aSEmmanuel Vadot&uart2 {
32*8bab661aSEmmanuel Vadot	pinctrl-names = "default";
33*8bab661aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart2>;
34*8bab661aSEmmanuel Vadot	rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
35*8bab661aSEmmanuel Vadot	cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
36*8bab661aSEmmanuel Vadot	status = "okay";
37*8bab661aSEmmanuel Vadot};
38*8bab661aSEmmanuel Vadot
39*8bab661aSEmmanuel Vadot&uart4 {
40*8bab661aSEmmanuel Vadot	status = "disabled";
41*8bab661aSEmmanuel Vadot};
42*8bab661aSEmmanuel Vadot
43*8bab661aSEmmanuel Vadot&iomuxc {
44*8bab661aSEmmanuel Vadot	pinctrl_uart2: uart2grp {
45*8bab661aSEmmanuel Vadot		fsl,pins = <
46*8bab661aSEmmanuel Vadot			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
47*8bab661aSEmmanuel Vadot			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
48*8bab661aSEmmanuel Vadot			MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29	0x140
49*8bab661aSEmmanuel Vadot			MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28	0x140
50*8bab661aSEmmanuel Vadot		>;
51*8bab661aSEmmanuel Vadot	};
52*8bab661aSEmmanuel Vadot};
53