1*c9ccf3a3SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*c9ccf3a3SEmmanuel Vadot/*
3*c9ccf3a3SEmmanuel Vadot * Copyright 2022 Gateworks Corporation
4*c9ccf3a3SEmmanuel Vadot *
5*c9ccf3a3SEmmanuel Vadot * GW72xx RS422 (RS485 full duplex):
6*c9ccf3a3SEmmanuel Vadot *  - GPIO1_0 rs485_term selects on-chip termination
7*c9ccf3a3SEmmanuel Vadot *  - GPIO4_0 rs485_en needs to be driven high (active)
8*c9ccf3a3SEmmanuel Vadot *  - GPIO4_2 rs485_hd needs to be driven low (in-active)
9*c9ccf3a3SEmmanuel Vadot *  - UART4_TX is DE for RS485 transmitter
10*c9ccf3a3SEmmanuel Vadot *  - RS485_EN needs to be pulled high
11*c9ccf3a3SEmmanuel Vadot *  - RS485_HALF needs to be low
12*c9ccf3a3SEmmanuel Vadot */
13*c9ccf3a3SEmmanuel Vadot
14*c9ccf3a3SEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
15*c9ccf3a3SEmmanuel Vadot
16*c9ccf3a3SEmmanuel Vadot#include "imx8mm-pinfunc.h"
17*c9ccf3a3SEmmanuel Vadot
18*c9ccf3a3SEmmanuel Vadot/dts-v1/;
19*c9ccf3a3SEmmanuel Vadot/plugin/;
20*c9ccf3a3SEmmanuel Vadot
21*c9ccf3a3SEmmanuel Vadot&{/} {
22*c9ccf3a3SEmmanuel Vadot	compatible = "gw,imx8mm-gw72xx-0x";
23*c9ccf3a3SEmmanuel Vadot};
24*c9ccf3a3SEmmanuel Vadot
25*c9ccf3a3SEmmanuel Vadot&gpio4 {
26*c9ccf3a3SEmmanuel Vadot	rs485_en {
27*c9ccf3a3SEmmanuel Vadot		gpio-hog;
28*c9ccf3a3SEmmanuel Vadot		gpios = <0 GPIO_ACTIVE_HIGH>;
29*c9ccf3a3SEmmanuel Vadot		output-high;
30*c9ccf3a3SEmmanuel Vadot		line-name = "rs485_en";
31*c9ccf3a3SEmmanuel Vadot	};
32*c9ccf3a3SEmmanuel Vadot
33*c9ccf3a3SEmmanuel Vadot	rs485_hd {
34*c9ccf3a3SEmmanuel Vadot		gpio-hog;
35*c9ccf3a3SEmmanuel Vadot		gpios = <2 GPIO_ACTIVE_HIGH>;
36*c9ccf3a3SEmmanuel Vadot		output-low;
37*c9ccf3a3SEmmanuel Vadot		line-name = "rs485_hd";
38*c9ccf3a3SEmmanuel Vadot	};
39*c9ccf3a3SEmmanuel Vadot};
40*c9ccf3a3SEmmanuel Vadot
41*c9ccf3a3SEmmanuel Vadot&uart2 {
42*c9ccf3a3SEmmanuel Vadot	pinctrl-names = "default";
43*c9ccf3a3SEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart2>;
44*c9ccf3a3SEmmanuel Vadot	rts-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
45*c9ccf3a3SEmmanuel Vadot	linux,rs485-enabled-at-boot-time;
46*c9ccf3a3SEmmanuel Vadot	status = "okay";
47*c9ccf3a3SEmmanuel Vadot};
48*c9ccf3a3SEmmanuel Vadot
49*c9ccf3a3SEmmanuel Vadot&uart4 {
50*c9ccf3a3SEmmanuel Vadot	status = "disabled";
51*c9ccf3a3SEmmanuel Vadot};
52*c9ccf3a3SEmmanuel Vadot
53*c9ccf3a3SEmmanuel Vadot&iomuxc {
54*c9ccf3a3SEmmanuel Vadot	pinctrl_uart2: uart2grp {
55*c9ccf3a3SEmmanuel Vadot		fsl,pins = <
56*c9ccf3a3SEmmanuel Vadot			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
57*c9ccf3a3SEmmanuel Vadot			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
58*c9ccf3a3SEmmanuel Vadot			MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29	0x140
59*c9ccf3a3SEmmanuel Vadot		>;
60*c9ccf3a3SEmmanuel Vadot	};
61*c9ccf3a3SEmmanuel Vadot};
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