1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright 2020 Compass Electronics Group, LLC
4 */
5
6/ {
7	leds {
8		compatible = "gpio-leds";
9
10		led-0 {
11			label = "gen_led0";
12			gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
13			default-state = "off";
14		};
15
16		led-1 {
17			label = "gen_led1";
18			gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
19			default-state = "off";
20		};
21
22		led-2 {
23			label = "gen_led2";
24			gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
25			default-state = "off";
26		};
27
28		led-3 {
29			pinctrl-names = "default";
30			pinctrl-0 = <&pinctrl_led3>;
31			label = "heartbeat";
32			gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
33			linux,default-trigger = "heartbeat";
34		};
35	};
36
37	reg_audio: regulator-audio {
38		compatible = "regulator-fixed";
39		regulator-name = "3v3_aud";
40		regulator-min-microvolt = <3300000>;
41		regulator-max-microvolt = <3300000>;
42		gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
43		enable-active-high;
44	};
45
46	reg_camera: regulator-camera {
47		compatible = "regulator-fixed";
48		regulator-name = "mipi_pwr";
49		regulator-min-microvolt = <2800000>;
50		regulator-max-microvolt = <2800000>;
51		gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
52		enable-active-high;
53		startup-delay-us = <100000>;
54		regulator-always-on;
55	};
56
57	reg_usdhc2_vmmc: regulator-usdhc2 {
58		compatible = "regulator-fixed";
59		regulator-name = "vsd_3v3";
60		regulator-min-microvolt = <3300000>;
61		regulator-max-microvolt = <3300000>;
62		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
63		enable-active-high;
64	};
65
66	reg_usb_otg_vbus: regulator-usb {
67		compatible = "regulator-fixed";
68		pinctrl-names = "default";
69		pinctrl-0 = <&pinctrl_reg_usb_otg>;
70		regulator-name = "usb_otg_vbus";
71		regulator-min-microvolt = <5000000>;
72		regulator-max-microvolt = <5000000>;
73		gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
74		enable-active-high;
75	};
76
77	sound-wm8962 {
78		compatible = "simple-audio-card";
79		simple-audio-card,name = "wm8962";
80		simple-audio-card,format = "i2s";
81		simple-audio-card,widgets = "Headphone", "Headphones",
82					    "Microphone", "Headset Mic",
83					    "Speaker", "Speaker";
84		simple-audio-card,routing = "Headphones", "HPOUTL",
85					    "Headphones", "HPOUTR",
86					    "Speaker", "SPKOUTL",
87					    "Speaker", "SPKOUTR",
88					    "Headset Mic", "MICBIAS",
89					    "IN3R", "Headset Mic";
90
91		simple-audio-card,cpu {
92			sound-dai = <&sai3>;
93		};
94
95		simple-audio-card,codec {
96			sound-dai = <&wm8962>;
97			clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
98			frame-master;
99			bitclock-master;
100		};
101	};
102};
103
104&ecspi2 {
105	pinctrl-names = "default";
106	pinctrl-0 = <&pinctrl_espi2>;
107	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
108	status = "okay";
109
110	eeprom@0 {
111		compatible = "microchip,at25160bn", "atmel,at25";
112		reg = <0>;
113		spi-max-frequency = <5000000>;
114		spi-cpha;
115		spi-cpol;
116		pagesize = <32>;
117		size = <2048>;
118		address-width = <16>;
119	};
120};
121
122&i2c2 {
123	clock-frequency = <384000>;
124	pinctrl-names = "default";
125	pinctrl-0 = <&pinctrl_i2c2>;
126	status = "okay";
127
128	camera@10 {
129		compatible = "ovti,ov5640";
130		pinctrl-names = "default";
131		pinctrl-0 = <&pinctrl_ov5640>;
132		reg = <0x10>;
133		clocks = <&clk IMX8MN_CLK_CLKO1>;
134		clock-names = "xclk";
135		assigned-clocks = <&clk IMX8MN_CLK_CLKO1>;
136		assigned-clock-parents = <&clk IMX8MN_CLK_24M>;
137		assigned-clock-rates = <24000000>;
138		AVDD-supply = <&reg_camera>;  /* 2.8v */
139		powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
140		reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
141
142		port {
143			/* MIPI CSI-2 bus endpoint */
144			ov5640_to_mipi_csi2: endpoint {
145				remote-endpoint = <&mipi_csi_in>;
146				clock-lanes = <0>;
147				data-lanes = <1 2>;
148			};
149		};
150	};
151};
152&i2c4 {
153	clock-frequency = <400000>;
154	pinctrl-names = "default";
155	pinctrl-0 = <&pinctrl_i2c4>;
156	status = "okay";
157
158	pca6416_0: gpio@20 {
159		compatible = "nxp,pcal6416";
160		reg = <0x20>;
161		pinctrl-names = "default";
162		pinctrl-0 = <&pinctrl_pcal6414>;
163		gpio-controller;
164		#gpio-cells = <2>;
165		interrupt-parent = <&gpio4>;
166		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
167	};
168
169	pca6416_1: gpio@21 {
170		compatible = "nxp,pcal6416";
171		reg = <0x21>;
172		gpio-controller;
173		#gpio-cells = <2>;
174		interrupt-parent = <&gpio4>;
175		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
176	};
177
178	wm8962: audio-codec@1a {
179		compatible = "wlf,wm8962";
180		reg = <0x1a>;
181		clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
182		DCVDD-supply = <&reg_audio>;
183		DBVDD-supply = <&reg_audio>;
184		AVDD-supply = <&reg_audio>;
185		CPVDD-supply = <&reg_audio>;
186		MICVDD-supply = <&reg_audio>;
187		PLLVDD-supply = <&reg_audio>;
188		SPKVDD1-supply = <&reg_audio>;
189		SPKVDD2-supply = <&reg_audio>;
190		gpio-cfg = <
191			0x0000 /* 0:Default */
192			0x0000 /* 1:Default */
193			0x0000 /* 2:FN_DMICCLK */
194			0x0000 /* 3:Default */
195			0x0000 /* 4:FN_DMICCDAT */
196			0x0000 /* 5:Default */
197		>;
198		#sound-dai-cells = <0>;
199	};
200};
201
202&isi {
203	status = "okay";
204};
205
206&easrc {
207	fsl,asrc-rate = <48000>;
208	status = "okay";
209};
210
211&mipi_csi {
212	status = "okay";
213
214	ports {
215		port@0 {
216			mipi_csi_in: endpoint {
217				remote-endpoint = <&ov5640_to_mipi_csi2>;
218				data-lanes = <1 2>;
219			};
220		};
221	};
222};
223
224&sai3 {
225	pinctrl-names = "default";
226	pinctrl-0 = <&pinctrl_sai3>;
227	assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
228	assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
229	assigned-clock-rates = <24576000>;
230	fsl,sai-mclk-direction-output;
231	status = "okay";
232};
233
234&snvs_pwrkey {
235	status = "okay";
236};
237
238&uart2 { /* console */
239	pinctrl-names = "default";
240	pinctrl-0 = <&pinctrl_uart2>;
241	status = "okay";
242};
243
244&uart3 {
245	pinctrl-names = "default";
246	pinctrl-0 = <&pinctrl_uart3>;
247	assigned-clocks = <&clk IMX8MN_CLK_UART3>;
248	assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
249	uart-has-rtscts;
250	status = "okay";
251};
252
253&usbotg1 {
254	vbus-supply = <&reg_usb_otg_vbus>;
255	disable-over-current;
256	dr_mode = "otg";
257	status = "okay";
258};
259
260&usdhc2 {
261	pinctrl-names = "default", "state_100mhz", "state_200mhz";
262	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
263	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
264	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
265	bus-width = <4>;
266	vmmc-supply = <&reg_usdhc2_vmmc>;
267	status = "okay";
268};
269
270&iomuxc {
271	pinctrl_espi2: espi2grp {
272		fsl,pins = <
273			MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK		0x82
274			MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI		0x82
275			MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO		0x82
276			MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13		0x41
277		>;
278	};
279
280	pinctrl_i2c2: i2c2grp {
281		fsl,pins = <
282			MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3
283			MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA		0x400001c3
284		>;
285	};
286
287	pinctrl_i2c4: i2c4grp {
288		fsl,pins = <
289			MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL		0x400001c3
290			MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA		0x400001c3
291		>;
292	};
293
294	pinctrl_led3: led3grp {
295		fsl,pins = <
296			MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28	0x41
297		>;
298	};
299
300	pinctrl_ov5640: ov5640grp {
301		fsl,pins = <
302			MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7		0x19
303			MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6		0x19
304			MX8MN_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1	0x59
305		>;
306	};
307
308	pinctrl_pcal6414: pcal6414-gpiogrp {
309		fsl,pins = <
310			MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27		0x19
311		>;
312	};
313
314	pinctrl_reg_usb_otg: reg-otggrp {
315		fsl,pins = <
316			MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29     0x19
317		>;
318	};
319
320	pinctrl_sai3: sai3grp {
321		fsl,pins = <
322			MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
323			MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
324			MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
325			MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
326			MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0	0xd6
327		>;
328	};
329
330	pinctrl_uart2: uart2grp {
331		fsl,pins = <
332			MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX	0x140
333			MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX	0x140
334		>;
335	};
336
337	pinctrl_uart3: uart3grp {
338		fsl,pins = <
339			MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX	0x40
340			MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX	0x40
341			MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B	0x40
342			MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B	0x40
343		>;
344	};
345
346	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
347		fsl,pins = <
348			MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B	0x41
349			MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
350		>;
351	};
352
353	pinctrl_usdhc2: usdhc2grp {
354		fsl,pins = <
355			MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK	0x190
356			MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD	0x1d0
357			MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d0
358			MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d0
359			MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d0
360			MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d0
361			MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
362		>;
363	};
364
365	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
366		fsl,pins = <
367			MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK	0x194
368			MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD	0x1d4
369			MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d4
370			MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d4
371			MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d4
372			MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d4
373			MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
374		>;
375	};
376
377	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
378		fsl,pins = <
379			MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK	0x196
380			MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD	0x1d6
381			MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d6
382			MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d6
383			MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d6
384			MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d6
385			MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
386		>;
387	};
388};
389