1c66ec88fSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2c66ec88fSEmmanuel Vadot/*
3c66ec88fSEmmanuel Vadot * Device Tree file for Marvell Armada AP807 Quad
4c66ec88fSEmmanuel Vadot *
5c66ec88fSEmmanuel Vadot * Copyright (C) 2019 Marvell Technology Group Ltd.
6c66ec88fSEmmanuel Vadot */
7c66ec88fSEmmanuel Vadot
8c66ec88fSEmmanuel Vadot#include "armada-ap807.dtsi"
9c66ec88fSEmmanuel Vadot
10c66ec88fSEmmanuel Vadot/ {
11c66ec88fSEmmanuel Vadot	model = "Marvell Armada AP807 Quad";
12c66ec88fSEmmanuel Vadot	compatible = "marvell,armada-ap807-quad", "marvell,armada-ap807";
13c66ec88fSEmmanuel Vadot
14c66ec88fSEmmanuel Vadot	cpus {
15c66ec88fSEmmanuel Vadot		#address-cells = <1>;
16c66ec88fSEmmanuel Vadot		#size-cells = <0>;
17c66ec88fSEmmanuel Vadot
18c66ec88fSEmmanuel Vadot		cpu0: cpu@0 {
19c66ec88fSEmmanuel Vadot			device_type = "cpu";
20c66ec88fSEmmanuel Vadot			compatible = "arm,cortex-a72";
21c66ec88fSEmmanuel Vadot			reg = <0x000>;
22c66ec88fSEmmanuel Vadot			enable-method = "psci";
23c66ec88fSEmmanuel Vadot			#cooling-cells = <2>;
24c66ec88fSEmmanuel Vadot			clocks = <&cpu_clk 0>;
25c66ec88fSEmmanuel Vadot			i-cache-size = <0xc000>;
26c66ec88fSEmmanuel Vadot			i-cache-line-size = <64>;
27c66ec88fSEmmanuel Vadot			i-cache-sets = <256>;
28c66ec88fSEmmanuel Vadot			d-cache-size = <0x8000>;
29c66ec88fSEmmanuel Vadot			d-cache-line-size = <64>;
30c66ec88fSEmmanuel Vadot			d-cache-sets = <256>;
31c66ec88fSEmmanuel Vadot			next-level-cache = <&l2_0>;
32c66ec88fSEmmanuel Vadot		};
33c66ec88fSEmmanuel Vadot		cpu1: cpu@1 {
34c66ec88fSEmmanuel Vadot			device_type = "cpu";
35c66ec88fSEmmanuel Vadot			compatible = "arm,cortex-a72";
36c66ec88fSEmmanuel Vadot			reg = <0x001>;
37c66ec88fSEmmanuel Vadot			enable-method = "psci";
38c66ec88fSEmmanuel Vadot			#cooling-cells = <2>;
39c66ec88fSEmmanuel Vadot			clocks = <&cpu_clk 0>;
40c66ec88fSEmmanuel Vadot			i-cache-size = <0xc000>;
41c66ec88fSEmmanuel Vadot			i-cache-line-size = <64>;
42c66ec88fSEmmanuel Vadot			i-cache-sets = <256>;
43c66ec88fSEmmanuel Vadot			d-cache-size = <0x8000>;
44c66ec88fSEmmanuel Vadot			d-cache-line-size = <64>;
45c66ec88fSEmmanuel Vadot			d-cache-sets = <256>;
46c66ec88fSEmmanuel Vadot			next-level-cache = <&l2_0>;
47c66ec88fSEmmanuel Vadot		};
48c66ec88fSEmmanuel Vadot		cpu2: cpu@100 {
49c66ec88fSEmmanuel Vadot			device_type = "cpu";
50c66ec88fSEmmanuel Vadot			compatible = "arm,cortex-a72";
51c66ec88fSEmmanuel Vadot			reg = <0x100>;
52c66ec88fSEmmanuel Vadot			enable-method = "psci";
53c66ec88fSEmmanuel Vadot			#cooling-cells = <2>;
54c66ec88fSEmmanuel Vadot			clocks = <&cpu_clk 1>;
55c66ec88fSEmmanuel Vadot			i-cache-size = <0xc000>;
56c66ec88fSEmmanuel Vadot			i-cache-line-size = <64>;
57c66ec88fSEmmanuel Vadot			i-cache-sets = <256>;
58c66ec88fSEmmanuel Vadot			d-cache-size = <0x8000>;
59c66ec88fSEmmanuel Vadot			d-cache-line-size = <64>;
60c66ec88fSEmmanuel Vadot			d-cache-sets = <256>;
61c66ec88fSEmmanuel Vadot			next-level-cache = <&l2_1>;
62c66ec88fSEmmanuel Vadot		};
63c66ec88fSEmmanuel Vadot		cpu3: cpu@101 {
64c66ec88fSEmmanuel Vadot			device_type = "cpu";
65c66ec88fSEmmanuel Vadot			compatible = "arm,cortex-a72";
66c66ec88fSEmmanuel Vadot			reg = <0x101>;
67c66ec88fSEmmanuel Vadot			enable-method = "psci";
68c66ec88fSEmmanuel Vadot			#cooling-cells = <2>;
69c66ec88fSEmmanuel Vadot			clocks = <&cpu_clk 1>;
70c66ec88fSEmmanuel Vadot			i-cache-size = <0xc000>;
71c66ec88fSEmmanuel Vadot			i-cache-line-size = <64>;
72c66ec88fSEmmanuel Vadot			i-cache-sets = <256>;
73c66ec88fSEmmanuel Vadot			d-cache-size = <0x8000>;
74c66ec88fSEmmanuel Vadot			d-cache-line-size = <64>;
75c66ec88fSEmmanuel Vadot			d-cache-sets = <256>;
76c66ec88fSEmmanuel Vadot			next-level-cache = <&l2_1>;
77c66ec88fSEmmanuel Vadot		};
78c66ec88fSEmmanuel Vadot
79c66ec88fSEmmanuel Vadot		l2_0: l2-cache0 {
80c66ec88fSEmmanuel Vadot			compatible = "cache";
81c66ec88fSEmmanuel Vadot			cache-size = <0x80000>;
82c66ec88fSEmmanuel Vadot			cache-line-size = <64>;
83c66ec88fSEmmanuel Vadot			cache-sets = <512>;
848bab661aSEmmanuel Vadot			cache-level = <2>;
85*f126890aSEmmanuel Vadot			cache-unified;
86c66ec88fSEmmanuel Vadot		};
87c66ec88fSEmmanuel Vadot
88c66ec88fSEmmanuel Vadot		l2_1: l2-cache1 {
89c66ec88fSEmmanuel Vadot			compatible = "cache";
90c66ec88fSEmmanuel Vadot			cache-size = <0x80000>;
91c66ec88fSEmmanuel Vadot			cache-line-size = <64>;
92c66ec88fSEmmanuel Vadot			cache-sets = <512>;
938bab661aSEmmanuel Vadot			cache-level = <2>;
94*f126890aSEmmanuel Vadot			cache-unified;
95c66ec88fSEmmanuel Vadot		};
96c66ec88fSEmmanuel Vadot	};
97c66ec88fSEmmanuel Vadot};
98