1c66ec88fSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2c66ec88fSEmmanuel Vadot/* 3c66ec88fSEmmanuel Vadot * Copyright (C) 2019 Marvell International Ltd. 4c66ec88fSEmmanuel Vadot * 5c66ec88fSEmmanuel Vadot * Device tree for the CN9130 SoC. 6c66ec88fSEmmanuel Vadot */ 7c66ec88fSEmmanuel Vadot 8c66ec88fSEmmanuel Vadot#include "armada-ap807-quad.dtsi" 9c66ec88fSEmmanuel Vadot 10c66ec88fSEmmanuel Vadot/ { 11c66ec88fSEmmanuel Vadot model = "Marvell Armada CN9130 SoC"; 12c66ec88fSEmmanuel Vadot compatible = "marvell,cn9130", "marvell,armada-ap807-quad", 13c66ec88fSEmmanuel Vadot "marvell,armada-ap807"; 14*e67e8565SEmmanuel Vadot 15*e67e8565SEmmanuel Vadot aliases { 16*e67e8565SEmmanuel Vadot gpio1 = &cp0_gpio1; 17*e67e8565SEmmanuel Vadot gpio2 = &cp0_gpio2; 18*e67e8565SEmmanuel Vadot spi1 = &cp0_spi0; 19*e67e8565SEmmanuel Vadot spi2 = &cp0_spi1; 20*e67e8565SEmmanuel Vadot }; 21c66ec88fSEmmanuel Vadot}; 22c66ec88fSEmmanuel Vadot 23c66ec88fSEmmanuel Vadot/* 24c66ec88fSEmmanuel Vadot * Instantiate the internal CP115 25c66ec88fSEmmanuel Vadot */ 26c66ec88fSEmmanuel Vadot 27c66ec88fSEmmanuel Vadot#define CP11X_NAME cp0 28c66ec88fSEmmanuel Vadot#define CP11X_BASE f2000000 29c66ec88fSEmmanuel Vadot#define CP11X_PCIEx_MEM_BASE(iface) ((iface == 0) ? 0xc0000000 : \ 30c66ec88fSEmmanuel Vadot 0xe0000000 + ((iface - 1) * 0x1000000)) 31c66ec88fSEmmanuel Vadot#define CP11X_PCIEx_MEM_SIZE(iface) ((iface == 0) ? 0x1ff00000 : 0xf00000) 32c66ec88fSEmmanuel Vadot#define CP11X_PCIE0_BASE f2600000 33c66ec88fSEmmanuel Vadot#define CP11X_PCIE1_BASE f2620000 34c66ec88fSEmmanuel Vadot#define CP11X_PCIE2_BASE f2640000 35c66ec88fSEmmanuel Vadot 36c66ec88fSEmmanuel Vadot#include "armada-cp115.dtsi" 37c66ec88fSEmmanuel Vadot 38c66ec88fSEmmanuel Vadot#undef CP11X_NAME 39c66ec88fSEmmanuel Vadot#undef CP11X_BASE 40c66ec88fSEmmanuel Vadot#undef CP11X_PCIEx_MEM_BASE 41c66ec88fSEmmanuel Vadot#undef CP11X_PCIEx_MEM_SIZE 42c66ec88fSEmmanuel Vadot#undef CP11X_PCIE0_BASE 43c66ec88fSEmmanuel Vadot#undef CP11X_PCIE1_BASE 44c66ec88fSEmmanuel Vadot#undef CP11X_PCIE2_BASE 45*e67e8565SEmmanuel Vadot 46*e67e8565SEmmanuel Vadot&cp0_gpio1 { 47*e67e8565SEmmanuel Vadot status = "okay"; 48*e67e8565SEmmanuel Vadot}; 49*e67e8565SEmmanuel Vadot 50*e67e8565SEmmanuel Vadot&cp0_gpio2 { 51*e67e8565SEmmanuel Vadot status = "okay"; 52*e67e8565SEmmanuel Vadot}; 53