1354d7675SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2354d7675SEmmanuel Vadot/* 3354d7675SEmmanuel Vadot * Copyright (C) 2020 Marvell International Ltd. 4354d7675SEmmanuel Vadot * 5354d7675SEmmanuel Vadot * Device tree for the CN9131-DB board. 6354d7675SEmmanuel Vadot */ 7354d7675SEmmanuel Vadot 8354d7675SEmmanuel Vadot#include "cn9130-db.dtsi" 9354d7675SEmmanuel Vadot 10354d7675SEmmanuel Vadot/ { 11354d7675SEmmanuel Vadot compatible = "marvell,cn9131", "marvell,cn9130", 12354d7675SEmmanuel Vadot "marvell,armada-ap807-quad", "marvell,armada-ap807"; 13354d7675SEmmanuel Vadot 14354d7675SEmmanuel Vadot aliases { 15354d7675SEmmanuel Vadot gpio3 = &cp1_gpio1; 16354d7675SEmmanuel Vadot gpio4 = &cp1_gpio2; 17354d7675SEmmanuel Vadot ethernet3 = &cp1_eth0; 18354d7675SEmmanuel Vadot ethernet4 = &cp1_eth1; 19354d7675SEmmanuel Vadot }; 20354d7675SEmmanuel Vadot 21354d7675SEmmanuel Vadot cp1_reg_usb3_vbus0: cp1_usb3_vbus@0 { 22354d7675SEmmanuel Vadot compatible = "regulator-fixed"; 23354d7675SEmmanuel Vadot pinctrl-names = "default"; 24354d7675SEmmanuel Vadot pinctrl-0 = <&cp1_xhci0_vbus_pins>; 25354d7675SEmmanuel Vadot regulator-name = "cp1-xhci0-vbus"; 26354d7675SEmmanuel Vadot regulator-min-microvolt = <5000000>; 27354d7675SEmmanuel Vadot regulator-max-microvolt = <5000000>; 28354d7675SEmmanuel Vadot enable-active-high; 29354d7675SEmmanuel Vadot gpio = <&cp1_gpio1 3 GPIO_ACTIVE_HIGH>; 30354d7675SEmmanuel Vadot }; 31354d7675SEmmanuel Vadot 32354d7675SEmmanuel Vadot cp1_usb3_0_phy0: cp1_usb3_phy0 { 33354d7675SEmmanuel Vadot compatible = "usb-nop-xceiv"; 34354d7675SEmmanuel Vadot vcc-supply = <&cp1_reg_usb3_vbus0>; 35354d7675SEmmanuel Vadot }; 36354d7675SEmmanuel Vadot 37354d7675SEmmanuel Vadot cp1_sfp_eth1: sfp-eth1 { 38354d7675SEmmanuel Vadot compatible = "sff,sfp"; 39354d7675SEmmanuel Vadot i2c-bus = <&cp1_i2c0>; 40*b97ee269SEmmanuel Vadot los-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_HIGH>; 41*b97ee269SEmmanuel Vadot mod-def0-gpios = <&cp1_gpio1 10 GPIO_ACTIVE_LOW>; 42*b97ee269SEmmanuel Vadot tx-disable-gpios = <&cp1_gpio1 9 GPIO_ACTIVE_HIGH>; 43*b97ee269SEmmanuel Vadot tx-fault-gpios = <&cp1_gpio1 8 GPIO_ACTIVE_HIGH>; 44354d7675SEmmanuel Vadot pinctrl-names = "default"; 45354d7675SEmmanuel Vadot pinctrl-0 = <&cp1_sfp_pins>; 46354d7675SEmmanuel Vadot /* 47354d7675SEmmanuel Vadot * SFP cages are unconnected on early PCBs because of an the I2C 48354d7675SEmmanuel Vadot * lanes not being connected. Prevent the port for being 49354d7675SEmmanuel Vadot * unusable by disabling the SFP node. 50354d7675SEmmanuel Vadot */ 51354d7675SEmmanuel Vadot status = "disabled"; 52354d7675SEmmanuel Vadot }; 53354d7675SEmmanuel Vadot}; 54354d7675SEmmanuel Vadot 55354d7675SEmmanuel Vadot/* 56354d7675SEmmanuel Vadot * Instantiate the first slave CP115 57354d7675SEmmanuel Vadot */ 58354d7675SEmmanuel Vadot 59354d7675SEmmanuel Vadot#define CP11X_NAME cp1 60354d7675SEmmanuel Vadot#define CP11X_BASE f4000000 61354d7675SEmmanuel Vadot#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000)) 62354d7675SEmmanuel Vadot#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 63354d7675SEmmanuel Vadot#define CP11X_PCIE0_BASE f4600000 64354d7675SEmmanuel Vadot#define CP11X_PCIE1_BASE f4620000 65354d7675SEmmanuel Vadot#define CP11X_PCIE2_BASE f4640000 66354d7675SEmmanuel Vadot 67354d7675SEmmanuel Vadot#include "armada-cp115.dtsi" 68354d7675SEmmanuel Vadot 69354d7675SEmmanuel Vadot#undef CP11X_NAME 70354d7675SEmmanuel Vadot#undef CP11X_BASE 71354d7675SEmmanuel Vadot#undef CP11X_PCIEx_MEM_BASE 72354d7675SEmmanuel Vadot#undef CP11X_PCIEx_MEM_SIZE 73354d7675SEmmanuel Vadot#undef CP11X_PCIE0_BASE 74354d7675SEmmanuel Vadot#undef CP11X_PCIE1_BASE 75354d7675SEmmanuel Vadot#undef CP11X_PCIE2_BASE 76354d7675SEmmanuel Vadot 77354d7675SEmmanuel Vadot&cp1_crypto { 78354d7675SEmmanuel Vadot status = "disabled"; 79354d7675SEmmanuel Vadot}; 80354d7675SEmmanuel Vadot 81354d7675SEmmanuel Vadot&cp1_ethernet { 82354d7675SEmmanuel Vadot status = "okay"; 83354d7675SEmmanuel Vadot}; 84354d7675SEmmanuel Vadot 85354d7675SEmmanuel Vadot/* CON50 */ 86354d7675SEmmanuel Vadot&cp1_eth0 { 87354d7675SEmmanuel Vadot status = "okay"; 88354d7675SEmmanuel Vadot phy-mode = "10gbase-r"; 89354d7675SEmmanuel Vadot /* Generic PHY, providing serdes lanes */ 90354d7675SEmmanuel Vadot phys = <&cp1_comphy4 0>; 91354d7675SEmmanuel Vadot managed = "in-band-status"; 92354d7675SEmmanuel Vadot sfp = <&cp1_sfp_eth1>; 93354d7675SEmmanuel Vadot}; 94354d7675SEmmanuel Vadot 95354d7675SEmmanuel Vadot&cp1_gpio1 { 96354d7675SEmmanuel Vadot status = "okay"; 97354d7675SEmmanuel Vadot}; 98354d7675SEmmanuel Vadot 99354d7675SEmmanuel Vadot&cp1_gpio2 { 100354d7675SEmmanuel Vadot status = "okay"; 101354d7675SEmmanuel Vadot}; 102354d7675SEmmanuel Vadot 103354d7675SEmmanuel Vadot&cp1_i2c0 { 104354d7675SEmmanuel Vadot status = "okay"; 105354d7675SEmmanuel Vadot pinctrl-names = "default"; 106354d7675SEmmanuel Vadot pinctrl-0 = <&cp1_i2c0_pins>; 107354d7675SEmmanuel Vadot clock-frequency = <100000>; 108354d7675SEmmanuel Vadot}; 109354d7675SEmmanuel Vadot 110354d7675SEmmanuel Vadot/* CON40 */ 111354d7675SEmmanuel Vadot&cp1_pcie0 { 112354d7675SEmmanuel Vadot pinctrl-names = "default"; 113354d7675SEmmanuel Vadot pinctrl-0 = <&cp1_pcie_reset_pins>; 114354d7675SEmmanuel Vadot num-lanes = <2>; 115354d7675SEmmanuel Vadot num-viewport = <8>; 116354d7675SEmmanuel Vadot marvell,reset-gpio = <&cp1_gpio1 0 GPIO_ACTIVE_HIGH>; 117354d7675SEmmanuel Vadot status = "okay"; 118354d7675SEmmanuel Vadot /* Generic PHY, providing serdes lanes */ 119354d7675SEmmanuel Vadot phys = <&cp1_comphy0 0 120354d7675SEmmanuel Vadot &cp1_comphy1 0>; 121354d7675SEmmanuel Vadot}; 122354d7675SEmmanuel Vadot 123354d7675SEmmanuel Vadot&cp1_sata0 { 124354d7675SEmmanuel Vadot status = "okay"; 125354d7675SEmmanuel Vadot 126354d7675SEmmanuel Vadot /* CON32 */ 127354d7675SEmmanuel Vadot sata-port@1 { 128354d7675SEmmanuel Vadot /* Generic PHY, providing serdes lanes */ 129354d7675SEmmanuel Vadot phys = <&cp1_comphy5 1>; 130354d7675SEmmanuel Vadot }; 131354d7675SEmmanuel Vadot}; 132354d7675SEmmanuel Vadot 133354d7675SEmmanuel Vadot/* U24 */ 134354d7675SEmmanuel Vadot&cp1_spi1 { 135354d7675SEmmanuel Vadot status = "okay"; 136354d7675SEmmanuel Vadot pinctrl-names = "default"; 137354d7675SEmmanuel Vadot pinctrl-0 = <&cp1_spi0_pins>; 138354d7675SEmmanuel Vadot reg = <0x700680 0x50>; 139354d7675SEmmanuel Vadot 140d5b0e70fSEmmanuel Vadot flash@0 { 141354d7675SEmmanuel Vadot #address-cells = <0x1>; 142354d7675SEmmanuel Vadot #size-cells = <0x1>; 143354d7675SEmmanuel Vadot compatible = "jedec,spi-nor"; 144354d7675SEmmanuel Vadot reg = <0x0>; 145354d7675SEmmanuel Vadot /* On-board MUX does not allow higher frequencies */ 146354d7675SEmmanuel Vadot spi-max-frequency = <40000000>; 147354d7675SEmmanuel Vadot 148354d7675SEmmanuel Vadot partitions { 149354d7675SEmmanuel Vadot compatible = "fixed-partitions"; 150354d7675SEmmanuel Vadot #address-cells = <1>; 151354d7675SEmmanuel Vadot #size-cells = <1>; 152354d7675SEmmanuel Vadot 153354d7675SEmmanuel Vadot partition@0 { 154354d7675SEmmanuel Vadot label = "U-Boot-1"; 155354d7675SEmmanuel Vadot reg = <0x0 0x200000>; 156354d7675SEmmanuel Vadot }; 157354d7675SEmmanuel Vadot 158354d7675SEmmanuel Vadot partition@400000 { 159354d7675SEmmanuel Vadot label = "Filesystem-1"; 160354d7675SEmmanuel Vadot reg = <0x200000 0xe00000>; 161354d7675SEmmanuel Vadot }; 162354d7675SEmmanuel Vadot }; 163354d7675SEmmanuel Vadot }; 164354d7675SEmmanuel Vadot 165354d7675SEmmanuel Vadot}; 166354d7675SEmmanuel Vadot 167354d7675SEmmanuel Vadot&cp1_syscon0 { 168354d7675SEmmanuel Vadot cp1_pinctrl: pinctrl { 169354d7675SEmmanuel Vadot compatible = "marvell,cp115-standalone-pinctrl"; 170354d7675SEmmanuel Vadot 171354d7675SEmmanuel Vadot cp1_i2c0_pins: cp1-i2c-pins-0 { 172354d7675SEmmanuel Vadot marvell,pins = "mpp37", "mpp38"; 173354d7675SEmmanuel Vadot marvell,function = "i2c0"; 174354d7675SEmmanuel Vadot }; 175354d7675SEmmanuel Vadot cp1_spi0_pins: cp1-spi-pins-0 { 176354d7675SEmmanuel Vadot marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; 177354d7675SEmmanuel Vadot marvell,function = "spi1"; 178354d7675SEmmanuel Vadot }; 179354d7675SEmmanuel Vadot cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins { 180354d7675SEmmanuel Vadot marvell,pins = "mpp3"; 181354d7675SEmmanuel Vadot marvell,function = "gpio"; 182354d7675SEmmanuel Vadot }; 183354d7675SEmmanuel Vadot cp1_sfp_pins: sfp-pins { 184354d7675SEmmanuel Vadot marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11"; 185354d7675SEmmanuel Vadot marvell,function = "gpio"; 186354d7675SEmmanuel Vadot }; 187354d7675SEmmanuel Vadot cp1_pcie_reset_pins: cp1-pcie-reset-pins { 188354d7675SEmmanuel Vadot marvell,pins = "mpp0"; 189354d7675SEmmanuel Vadot marvell,function = "gpio"; 190354d7675SEmmanuel Vadot }; 191354d7675SEmmanuel Vadot }; 192354d7675SEmmanuel Vadot}; 193354d7675SEmmanuel Vadot 194354d7675SEmmanuel Vadot/* CON58 */ 195354d7675SEmmanuel Vadot&cp1_utmi { 196354d7675SEmmanuel Vadot status = "okay"; 197354d7675SEmmanuel Vadot}; 198354d7675SEmmanuel Vadot 199354d7675SEmmanuel Vadot&cp1_usb3_1 { 200354d7675SEmmanuel Vadot status = "okay"; 201354d7675SEmmanuel Vadot usb-phy = <&cp1_usb3_0_phy0>; 202354d7675SEmmanuel Vadot /* Generic PHY, providing serdes lanes */ 203354d7675SEmmanuel Vadot phys = <&cp1_comphy3 1>, <&cp1_utmi1>; 204354d7675SEmmanuel Vadot phy-names = "usb", "utmi"; 205354d7675SEmmanuel Vadot dr_mode = "host"; 206354d7675SEmmanuel Vadot}; 207