1c66ec88fSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2c66ec88fSEmmanuel Vadot/*
3c66ec88fSEmmanuel Vadot * Copyright (C) 2019 Marvell International Ltd.
4c66ec88fSEmmanuel Vadot *
5c66ec88fSEmmanuel Vadot * Device tree for the CN9132-DB board.
6c66ec88fSEmmanuel Vadot */
7c66ec88fSEmmanuel Vadot
8*354d7675SEmmanuel Vadot#include "cn9132-db.dtsi"
9c66ec88fSEmmanuel Vadot
10c66ec88fSEmmanuel Vadot/ {
11*354d7675SEmmanuel Vadot	model = "Marvell Armada CN9132-DB setup A";
12c66ec88fSEmmanuel Vadot};
13c66ec88fSEmmanuel Vadot
14*354d7675SEmmanuel Vadot/* Setup A has SPI1 flash as a boot device, while setup B uses NAND flash.
15*354d7675SEmmanuel Vadot * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
16*354d7675SEmmanuel Vadot * simultaneously. When SPI controller is enabled, NAND should be disabled.
17c66ec88fSEmmanuel Vadot */
18c66ec88fSEmmanuel Vadot
19*354d7675SEmmanuel Vadot&cp0_spi1 {
20c66ec88fSEmmanuel Vadot	status = "okay";
21c66ec88fSEmmanuel Vadot};
22c66ec88fSEmmanuel Vadot
23