1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Eddie Huang <eddie.huang@mediatek.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include "mt8173.dtsi"
10
11/ {
12	model = "MediaTek MT8173 evaluation board";
13	compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
14
15	aliases {
16		serial0 = &uart0;
17		serial1 = &uart1;
18		serial2 = &uart2;
19		serial3 = &uart3;
20	};
21
22	memory@40000000 {
23		device_type = "memory";
24		reg = <0 0x40000000 0 0x80000000>;
25	};
26
27	chosen { };
28
29	connector {
30		compatible = "hdmi-connector";
31		label = "hdmi";
32		type = "d";
33
34		port {
35			hdmi_connector_in: endpoint {
36				remote-endpoint = <&hdmi0_out>;
37			};
38		};
39	};
40
41	extcon_usb: extcon_iddig {
42		compatible = "linux,extcon-usb-gpio";
43		id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
44	};
45
46	usb_p1_vbus: regulator@0 {
47		compatible = "regulator-fixed";
48		regulator-name = "usb_vbus";
49		regulator-min-microvolt = <5000000>;
50		regulator-max-microvolt = <5000000>;
51		gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
52		enable-active-high;
53	};
54
55	usb_p0_vbus: regulator@1 {
56		compatible = "regulator-fixed";
57		regulator-name = "vbus";
58		regulator-min-microvolt = <5000000>;
59		regulator-max-microvolt = <5000000>;
60		gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
61		enable-active-high;
62	};
63};
64
65&cec {
66	status = "okay";
67};
68
69&cpu0 {
70	proc-supply = <&mt6397_vpca15_reg>;
71};
72
73&cpu1 {
74	proc-supply = <&mt6397_vpca15_reg>;
75};
76
77&cpu2 {
78	proc-supply = <&da9211_vcpu_reg>;
79	sram-supply = <&mt6397_vsramca7_reg>;
80};
81
82&cpu3 {
83	proc-supply = <&da9211_vcpu_reg>;
84	sram-supply = <&mt6397_vsramca7_reg>;
85};
86
87&dpi0 {
88	status = "okay";
89};
90
91&hdmi_phy {
92	status = "okay";
93};
94
95&hdmi0 {
96	status = "okay";
97
98	ports {
99		port@1 {
100			reg = <1>;
101
102			hdmi0_out: endpoint {
103				remote-endpoint = <&hdmi_connector_in>;
104			};
105		};
106	};
107};
108
109&i2c1 {
110	status = "okay";
111
112	buck: da9211@68 {
113		compatible = "dlg,da9211";
114		reg = <0x68>;
115
116		regulators {
117			da9211_vcpu_reg: BUCKA {
118				regulator-name = "VBUCKA";
119				regulator-min-microvolt = < 700000>;
120				regulator-max-microvolt = <1310000>;
121				regulator-min-microamp	= <2000000>;
122				regulator-max-microamp	= <4400000>;
123				regulator-ramp-delay = <10000>;
124				regulator-always-on;
125			};
126
127			da9211_vgpu_reg: BUCKB {
128				regulator-name = "VBUCKB";
129				regulator-min-microvolt = < 700000>;
130				regulator-max-microvolt = <1310000>;
131				regulator-min-microamp	= <2000000>;
132				regulator-max-microamp	= <3000000>;
133				regulator-ramp-delay = <10000>;
134			};
135		};
136	};
137};
138
139&mmc0 {
140	status = "okay";
141	pinctrl-names = "default", "state_uhs";
142	pinctrl-0 = <&mmc0_pins_default>;
143	pinctrl-1 = <&mmc0_pins_uhs>;
144	bus-width = <8>;
145	max-frequency = <50000000>;
146	cap-mmc-highspeed;
147	mediatek,hs200-cmd-int-delay=<26>;
148	mediatek,hs400-cmd-int-delay=<14>;
149	mediatek,hs400-cmd-resp-sel-rising;
150	vmmc-supply = <&mt6397_vemc_3v3_reg>;
151	vqmmc-supply = <&mt6397_vio18_reg>;
152	non-removable;
153};
154
155&mmc1 {
156	status = "okay";
157	pinctrl-names = "default", "state_uhs";
158	pinctrl-0 = <&mmc1_pins_default>;
159	pinctrl-1 = <&mmc1_pins_uhs>;
160	bus-width = <4>;
161	max-frequency = <50000000>;
162	cap-sd-highspeed;
163	sd-uhs-sdr25;
164	cd-gpios = <&pio 132 0>;
165	vmmc-supply = <&mt6397_vmch_reg>;
166	vqmmc-supply = <&mt6397_vmc_reg>;
167};
168
169&pio {
170	disp_pwm0_pins: disp_pwm0_pins {
171		pins1 {
172			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
173			output-low;
174		};
175	};
176
177	mmc0_pins_default: mmc0default {
178		pins_cmd_dat {
179			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
180				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
181				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
182				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
183				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
184				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
185				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
186				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
187				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
188			input-enable;
189			bias-pull-up;
190		};
191
192		pins_clk {
193			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
194			bias-pull-down;
195		};
196
197		pins_rst {
198			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
199			bias-pull-up;
200		};
201	};
202
203	mmc1_pins_default: mmc1default {
204		pins_cmd_dat {
205			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
206				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
207				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
208				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
209				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
210			input-enable;
211			drive-strength = <MTK_DRIVE_4mA>;
212			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
213		};
214
215		pins_clk {
216			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
217			bias-pull-down;
218			drive-strength = <MTK_DRIVE_4mA>;
219		};
220
221		pins_insert {
222			pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
223			bias-pull-up;
224		};
225	};
226
227	mmc0_pins_uhs: mmc0 {
228		pins_cmd_dat {
229			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
230				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
231				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
232				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
233				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
234				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
235				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
236				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
237				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
238			input-enable;
239			drive-strength = <MTK_DRIVE_2mA>;
240			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
241		};
242
243		pins_clk {
244			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
245			drive-strength = <MTK_DRIVE_2mA>;
246			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
247		};
248
249		pins_rst {
250			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
251			bias-pull-up;
252		};
253	};
254
255	mmc1_pins_uhs: mmc1 {
256		pins_cmd_dat {
257			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
258				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
259				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
260				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
261				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
262			input-enable;
263			drive-strength = <MTK_DRIVE_4mA>;
264			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
265		};
266
267		pins_clk {
268			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
269			drive-strength = <MTK_DRIVE_4mA>;
270			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
271		};
272	};
273
274	usb_id_pins_float: usb_iddig_pull_up {
275		pins_iddig {
276			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
277			bias-pull-up;
278		};
279	};
280
281	usb_id_pins_ground: usb_iddig_pull_down {
282		pins_iddig {
283			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
284			bias-pull-down;
285		};
286	};
287};
288
289&pwm0 {
290	pinctrl-names = "default";
291	pinctrl-0 = <&disp_pwm0_pins>;
292	status = "okay";
293};
294
295&pwrap {
296	/* Only MT8173 E1 needs USB power domain */
297	power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
298
299	pmic: mt6397 {
300		compatible = "mediatek,mt6397";
301		interrupt-parent = <&pio>;
302		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
303		interrupt-controller;
304		#interrupt-cells = <2>;
305
306		mt6397regulator: mt6397regulator {
307			compatible = "mediatek,mt6397-regulator";
308
309			mt6397_vpca15_reg: buck_vpca15 {
310				regulator-compatible = "buck_vpca15";
311				regulator-name = "vpca15";
312				regulator-min-microvolt = < 700000>;
313				regulator-max-microvolt = <1350000>;
314				regulator-ramp-delay = <12500>;
315				regulator-always-on;
316			};
317
318			mt6397_vpca7_reg: buck_vpca7 {
319				regulator-compatible = "buck_vpca7";
320				regulator-name = "vpca7";
321				regulator-min-microvolt = < 700000>;
322				regulator-max-microvolt = <1350000>;
323				regulator-ramp-delay = <12500>;
324				regulator-enable-ramp-delay = <115>;
325			};
326
327			mt6397_vsramca15_reg: buck_vsramca15 {
328				regulator-compatible = "buck_vsramca15";
329				regulator-name = "vsramca15";
330				regulator-min-microvolt = < 700000>;
331				regulator-max-microvolt = <1350000>;
332				regulator-ramp-delay = <12500>;
333				regulator-always-on;
334			};
335
336			mt6397_vsramca7_reg: buck_vsramca7 {
337				regulator-compatible = "buck_vsramca7";
338				regulator-name = "vsramca7";
339				regulator-min-microvolt = < 700000>;
340				regulator-max-microvolt = <1350000>;
341				regulator-ramp-delay = <12500>;
342				regulator-always-on;
343			};
344
345			mt6397_vcore_reg: buck_vcore {
346				regulator-compatible = "buck_vcore";
347				regulator-name = "vcore";
348				regulator-min-microvolt = < 700000>;
349				regulator-max-microvolt = <1350000>;
350				regulator-ramp-delay = <12500>;
351				regulator-always-on;
352			};
353
354			mt6397_vgpu_reg: buck_vgpu {
355				regulator-compatible = "buck_vgpu";
356				regulator-name = "vgpu";
357				regulator-min-microvolt = < 700000>;
358				regulator-max-microvolt = <1350000>;
359				regulator-ramp-delay = <12500>;
360				regulator-enable-ramp-delay = <115>;
361			};
362
363			mt6397_vdrm_reg: buck_vdrm {
364				regulator-compatible = "buck_vdrm";
365				regulator-name = "vdrm";
366				regulator-min-microvolt = <1200000>;
367				regulator-max-microvolt = <1400000>;
368				regulator-ramp-delay = <12500>;
369				regulator-always-on;
370			};
371
372			mt6397_vio18_reg: buck_vio18 {
373				regulator-compatible = "buck_vio18";
374				regulator-name = "vio18";
375				regulator-min-microvolt = <1620000>;
376				regulator-max-microvolt = <1980000>;
377				regulator-ramp-delay = <12500>;
378				regulator-always-on;
379			};
380
381			mt6397_vtcxo_reg: ldo_vtcxo {
382				regulator-compatible = "ldo_vtcxo";
383				regulator-name = "vtcxo";
384				regulator-always-on;
385			};
386
387			mt6397_va28_reg: ldo_va28 {
388				regulator-compatible = "ldo_va28";
389				regulator-name = "va28";
390				regulator-always-on;
391			};
392
393			mt6397_vcama_reg: ldo_vcama {
394				regulator-compatible = "ldo_vcama";
395				regulator-name = "vcama";
396				regulator-min-microvolt = <1500000>;
397				regulator-max-microvolt = <2800000>;
398				regulator-enable-ramp-delay = <218>;
399			};
400
401			mt6397_vio28_reg: ldo_vio28 {
402				regulator-compatible = "ldo_vio28";
403				regulator-name = "vio28";
404				regulator-always-on;
405			};
406
407			mt6397_vusb_reg: ldo_vusb {
408				regulator-compatible = "ldo_vusb";
409				regulator-name = "vusb";
410			};
411
412			mt6397_vmc_reg: ldo_vmc {
413				regulator-compatible = "ldo_vmc";
414				regulator-name = "vmc";
415				regulator-min-microvolt = <1800000>;
416				regulator-max-microvolt = <3300000>;
417				regulator-enable-ramp-delay = <218>;
418			};
419
420			mt6397_vmch_reg: ldo_vmch {
421				regulator-compatible = "ldo_vmch";
422				regulator-name = "vmch";
423				regulator-min-microvolt = <3000000>;
424				regulator-max-microvolt = <3300000>;
425				regulator-enable-ramp-delay = <218>;
426			};
427
428			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
429				regulator-compatible = "ldo_vemc3v3";
430				regulator-name = "vemc_3v3";
431				regulator-min-microvolt = <3000000>;
432				regulator-max-microvolt = <3300000>;
433				regulator-enable-ramp-delay = <218>;
434			};
435
436			mt6397_vgp1_reg: ldo_vgp1 {
437				regulator-compatible = "ldo_vgp1";
438				regulator-name = "vcamd";
439				regulator-min-microvolt = <1220000>;
440				regulator-max-microvolt = <3300000>;
441				regulator-enable-ramp-delay = <240>;
442			};
443
444			mt6397_vgp2_reg: ldo_vgp2 {
445				regulator-compatible = "ldo_vgp2";
446				regulator-name = "vcamio";
447				regulator-min-microvolt = <1000000>;
448				regulator-max-microvolt = <3300000>;
449				regulator-enable-ramp-delay = <218>;
450			};
451
452			mt6397_vgp3_reg: ldo_vgp3 {
453				regulator-compatible = "ldo_vgp3";
454				regulator-name = "vcamaf";
455				regulator-min-microvolt = <1200000>;
456				regulator-max-microvolt = <3300000>;
457				regulator-enable-ramp-delay = <218>;
458			};
459
460			mt6397_vgp4_reg: ldo_vgp4 {
461				regulator-compatible = "ldo_vgp4";
462				regulator-name = "vgp4";
463				regulator-min-microvolt = <1200000>;
464				regulator-max-microvolt = <3300000>;
465				regulator-enable-ramp-delay = <218>;
466			};
467
468			mt6397_vgp5_reg: ldo_vgp5 {
469				regulator-compatible = "ldo_vgp5";
470				regulator-name = "vgp5";
471				regulator-min-microvolt = <1200000>;
472				regulator-max-microvolt = <3000000>;
473				regulator-enable-ramp-delay = <218>;
474			};
475
476			mt6397_vgp6_reg: ldo_vgp6 {
477				regulator-compatible = "ldo_vgp6";
478				regulator-name = "vgp6";
479				regulator-min-microvolt = <1200000>;
480				regulator-max-microvolt = <3300000>;
481				regulator-enable-ramp-delay = <218>;
482			};
483
484			mt6397_vibr_reg: ldo_vibr {
485				regulator-compatible = "ldo_vibr";
486				regulator-name = "vibr";
487				regulator-min-microvolt = <1300000>;
488				regulator-max-microvolt = <3300000>;
489				regulator-enable-ramp-delay = <218>;
490			};
491		};
492	};
493};
494
495&pio {
496	spi_pins_a: spi0 {
497		pins_spi {
498			pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
499				<MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
500				<MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
501				<MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
502		};
503	};
504};
505
506&spi {
507	pinctrl-names = "default";
508	pinctrl-0 = <&spi_pins_a>;
509	mediatek,pad-select = <0>;
510	status = "okay";
511};
512
513&ssusb {
514	vusb33-supply = <&mt6397_vusb_reg>;
515	vbus-supply = <&usb_p0_vbus>;
516	extcon = <&extcon_usb>;
517	dr_mode = "otg";
518	wakeup-source;
519	pinctrl-names = "default";
520	pinctrl-0 = <&usb_id_pins_float>;
521	status = "okay";
522};
523
524&uart0 {
525	status = "okay";
526};
527
528&usb_host {
529	vusb33-supply = <&mt6397_vusb_reg>;
530	vbus-supply = <&usb_p1_vbus>;
531	status = "okay";
532};
533