1// SPDX-License-Identifier: GPL-2.0
2#include "tegra186.dtsi"
3
4#include <dt-bindings/mfd/max77620.h>
5
6/ {
7	model = "NVIDIA Jetson TX2";
8	compatible = "nvidia,p3310", "nvidia,tegra186";
9
10	aliases {
11		ethernet0 = "/ethernet@2490000";
12		i2c0 = "/bpmp/i2c";
13		i2c1 = "/i2c@3160000";
14		i2c2 = "/i2c@c240000";
15		i2c3 = "/i2c@3180000";
16		i2c4 = "/i2c@3190000";
17		i2c5 = "/i2c@31c0000";
18		i2c6 = "/i2c@c250000";
19		i2c7 = "/i2c@31e0000";
20		mmc0 = "/mmc@3460000";
21		mmc1 = "/mmc@3400000";
22		serial0 = &uarta;
23	};
24
25	chosen {
26		bootargs = "earlycon console=ttyS0,115200n8 fw_devlink=on";
27		stdout-path = "serial0:115200n8";
28	};
29
30	memory@80000000 {
31		device_type = "memory";
32		reg = <0x0 0x80000000 0x2 0x00000000>;
33	};
34
35	ethernet@2490000 {
36		status = "okay";
37
38		phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
39					 GPIO_ACTIVE_LOW>;
40		phy-handle = <&phy>;
41		phy-mode = "rgmii";
42
43		mdio {
44			#address-cells = <1>;
45			#size-cells = <0>;
46
47			phy: ethernet-phy@0 {
48				compatible = "ethernet-phy-ieee802.3-c22";
49				reg = <0x0>;
50				interrupt-parent = <&gpio>;
51				interrupts = <TEGRA186_MAIN_GPIO(M, 5)
52					      IRQ_TYPE_LEVEL_LOW>;
53
54				#phy-cells = <0>;
55			};
56		};
57	};
58
59	memory-controller@2c00000 {
60		status = "okay";
61	};
62
63	serial@3100000 {
64		status = "okay";
65	};
66
67	i2c@3160000 {
68		status = "okay";
69
70		power-monitor@40 {
71			compatible = "ti,ina3221";
72			reg = <0x40>;
73			#address-cells = <1>;
74			#size-cells = <0>;
75
76			input@0 {
77				reg = <0x0>;
78				label = "VDD_SYS_GPU";
79				shunt-resistor-micro-ohms = <10000>;
80			};
81
82			input@1 {
83				reg = <0x1>;
84				label = "VDD_SYS_SOC";
85				shunt-resistor-micro-ohms = <10000>;
86			};
87
88			input@2 {
89				reg = <0x2>;
90				label = "VDD_3V8_WIFI";
91				shunt-resistor-micro-ohms = <10000>;
92			};
93		};
94
95		power-monitor@41 {
96			compatible = "ti,ina3221";
97			reg = <0x41>;
98			#address-cells = <1>;
99			#size-cells = <0>;
100
101			input@0 {
102				reg = <0x0>;
103				label = "VDD_IN";
104				shunt-resistor-micro-ohms = <5000>;
105			};
106
107			input@1 {
108				reg = <0x1>;
109				label = "VDD_SYS_CPU";
110				shunt-resistor-micro-ohms = <10000>;
111			};
112
113			input@2 {
114				reg = <0x2>;
115				label = "VDD_5V0_DDR";
116				shunt-resistor-micro-ohms = <10000>;
117			};
118		};
119	};
120
121	i2c@3180000 {
122		status = "okay";
123	};
124
125	ddc: i2c@3190000 {
126		status = "okay";
127	};
128
129	i2c@31c0000 {
130		status = "okay";
131	};
132
133	i2c@31e0000 {
134		status = "okay";
135	};
136
137	/* SDMMC1 (SD/MMC) */
138	mmc@3400000 {
139		cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
140		wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
141
142		vqmmc-supply = <&vddio_sdmmc1>;
143	};
144
145	/* SDMMC3 (SDIO) */
146	mmc@3440000 {
147		status = "okay";
148		vqmmc-supply = <&vddio_sdmmc3>;
149	};
150
151	/* SDMMC4 (eMMC) */
152	mmc@3460000 {
153		status = "okay";
154		bus-width = <8>;
155		non-removable;
156
157		vqmmc-supply = <&vdd_1v8_ap>;
158		vmmc-supply = <&vdd_3v3_sys>;
159	};
160
161	hsp@3c00000 {
162		status = "okay";
163	};
164
165	i2c@c240000 {
166		status = "okay";
167	};
168
169	i2c@c250000 {
170		status = "okay";
171
172		/* module ID EEPROM */
173		eeprom@50 {
174			compatible = "atmel,24c02";
175			reg = <0x50>;
176
177			label = "module";
178			vcc-supply = <&vdd_1v8>;
179			address-width = <8>;
180			pagesize = <8>;
181			size = <256>;
182			read-only;
183		};
184	};
185
186	rtc@c2a0000 {
187		status = "okay";
188	};
189
190	pmc@c360000 {
191		nvidia,invert-interrupt;
192	};
193
194	bpmp {
195		i2c {
196			status = "okay";
197
198			pmic: pmic@3c {
199				compatible = "maxim,max77620";
200				reg = <0x3c>;
201
202				interrupt-parent = <&pmc>;
203				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
204				#interrupt-cells = <2>;
205				interrupt-controller;
206
207				#gpio-cells = <2>;
208				gpio-controller;
209
210				pinctrl-names = "default";
211				pinctrl-0 = <&max77620_default>;
212
213				fps {
214					fps0 {
215						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
216						maxim,shutdown-fps-time-period-us = <640>;
217					};
218
219					fps1 {
220						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
221						maxim,shutdown-fps-time-period-us = <640>;
222					};
223
224					fps2 {
225						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
226						maxim,shutdown-fps-time-period-us = <640>;
227					};
228				};
229
230				max77620_default: pinmux {
231					gpio0 {
232						pins = "gpio0";
233						function = "gpio";
234					};
235
236					gpio1 {
237						pins = "gpio1";
238						function = "fps-out";
239						maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
240					};
241
242					gpio2 {
243						pins = "gpio2";
244						function = "fps-out";
245						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
246					};
247
248					gpio3 {
249						pins = "gpio3";
250						function = "fps-out";
251						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
252					};
253
254					gpio4 {
255						pins = "gpio4";
256						function = "32k-out1";
257						drive-push-pull = <1>;
258					};
259
260					gpio5 {
261						pins = "gpio5";
262						function = "gpio";
263						drive-push-pull = <0>;
264					};
265
266					gpio6 {
267						pins = "gpio6";
268						function = "gpio";
269						drive-push-pull = <1>;
270					};
271
272					gpio7 {
273						pins = "gpio7";
274						function = "gpio";
275						drive-push-pull = <0>;
276					};
277				};
278
279				regulators {
280					in-sd0-supply = <&vdd_5v0_sys>;
281					in-sd1-supply = <&vdd_5v0_sys>;
282					in-sd2-supply = <&vdd_5v0_sys>;
283					in-sd3-supply = <&vdd_5v0_sys>;
284
285					in-ldo0-1-supply = <&vdd_5v0_sys>;
286					in-ldo2-supply = <&vdd_5v0_sys>;
287					in-ldo3-5-supply = <&vdd_5v0_sys>;
288					in-ldo4-6-supply = <&vdd_1v8>;
289					in-ldo7-8-supply = <&avdd_dsi_csi>;
290
291					sd0 {
292						regulator-name = "VDD_DDR_1V1_PMIC";
293						regulator-min-microvolt = <1100000>;
294						regulator-max-microvolt = <1100000>;
295						regulator-always-on;
296						regulator-boot-on;
297					};
298
299					avdd_dsi_csi: sd1 {
300						regulator-name = "AVDD_DSI_CSI_1V2";
301						regulator-min-microvolt = <1200000>;
302						regulator-max-microvolt = <1200000>;
303					};
304
305					vdd_1v8: sd2 {
306						regulator-name = "VDD_1V8";
307						regulator-min-microvolt = <1800000>;
308						regulator-max-microvolt = <1800000>;
309					};
310
311					vdd_3v3_sys: sd3 {
312						regulator-name = "VDD_3V3_SYS";
313						regulator-min-microvolt = <3300000>;
314						regulator-max-microvolt = <3300000>;
315					};
316
317					vdd_1v8_pll: ldo0 {
318						regulator-name = "VDD_1V8_AP_PLL";
319						regulator-min-microvolt = <1800000>;
320						regulator-max-microvolt = <1800000>;
321					};
322
323					ldo2 {
324						regulator-name = "VDDIO_3V3_AOHV";
325						regulator-min-microvolt = <3300000>;
326						regulator-max-microvolt = <3300000>;
327						regulator-always-on;
328						regulator-boot-on;
329					};
330
331					vddio_sdmmc1: ldo3 {
332						regulator-name = "VDDIO_SDMMC1_AP";
333						regulator-min-microvolt = <1800000>;
334						regulator-max-microvolt = <3300000>;
335					};
336
337					ldo4 {
338						regulator-name = "VDD_RTC";
339						regulator-min-microvolt = <1000000>;
340						regulator-max-microvolt = <1000000>;
341					};
342
343					vddio_sdmmc3: ldo5 {
344						regulator-name = "VDDIO_SDMMC3_AP";
345						regulator-min-microvolt = <2800000>;
346						regulator-max-microvolt = <2800000>;
347					};
348
349					vdd_hdmi_1v05: ldo7 {
350						regulator-name = "VDD_HDMI_1V05";
351						regulator-min-microvolt = <1050000>;
352						regulator-max-microvolt = <1050000>;
353					};
354
355					vdd_pex: ldo8 {
356						regulator-name = "VDD_PEX_1V05";
357						regulator-min-microvolt = <1050000>;
358						regulator-max-microvolt = <1050000>;
359					};
360				};
361			};
362		};
363	};
364
365	cpus {
366		cpu@0 {
367			enable-method = "psci";
368		};
369
370		cpu@1 {
371			enable-method = "psci";
372		};
373
374		cpu@2 {
375			enable-method = "psci";
376		};
377
378		cpu@3 {
379			enable-method = "psci";
380		};
381
382		cpu@4 {
383			enable-method = "psci";
384		};
385
386		cpu@5 {
387			enable-method = "psci";
388		};
389	};
390
391	psci {
392		compatible = "arm,psci-1.0";
393		status = "okay";
394		method = "smc";
395	};
396
397	gnd: regulator-gnd {
398		compatible = "regulator-fixed";
399		regulator-name = "GND";
400		regulator-min-microvolt = <0>;
401		regulator-max-microvolt = <0>;
402		regulator-always-on;
403		regulator-boot-on;
404	};
405
406	vdd_5v0_sys: regulator-vdd-5v0-sys {
407		compatible = "regulator-fixed";
408		regulator-name = "VDD_5V0_SYS";
409		regulator-min-microvolt = <5000000>;
410		regulator-max-microvolt = <5000000>;
411		regulator-always-on;
412		regulator-boot-on;
413	};
414
415	vdd_1v8_ap: regulator-vdd-1v8-ap {
416		compatible = "regulator-fixed";
417		regulator-name = "VDD_1V8_AP";
418		regulator-min-microvolt = <1800000>;
419		regulator-max-microvolt = <1800000>;
420
421		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
422		enable-active-high;
423
424		vin-supply = <&vdd_1v8>;
425	};
426};
427