1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * sc7280 fragment for devices with Chrome bootloader
4 *
5 * This file mainly tries to abstract out the memory protections put into
6 * place by the Chrome bootloader which are different than what's put into
7 * place by Qualcomm's typical bootloader. It also has a smattering of other
8 * things that will hold true for any conceivable Chrome design
9 *
10 * Copyright 2022 Google LLC.
11 */
12
13/*
14 * Reserved memory changes
15 *
16 * Delete all unused memory nodes and define the peripheral memory regions
17 * required by the setup for Chrome boards.
18 */
19
20/delete-node/ &hyp_mem;
21/delete-node/ &xbl_mem;
22/delete-node/ &reserved_xbl_uefi_log;
23/delete-node/ &sec_apps_mem;
24
25/ {
26	reserved-memory {
27		adsp_mem: memory@86700000 {
28			reg = <0x0 0x86700000 0x0 0x2800000>;
29			no-map;
30		};
31
32		camera_mem: memory@8ad00000 {
33			reg = <0x0 0x8ad00000 0x0 0x500000>;
34			no-map;
35		};
36
37		venus_mem: memory@8b200000 {
38			reg = <0x0 0x8b200000 0x0 0x500000>;
39			no-map;
40		};
41
42		mpss_mem: memory@8b800000 {
43			reg = <0x0 0x8b800000 0x0 0xf600000>;
44			no-map;
45		};
46
47		wpss_mem: memory@9ae00000 {
48			reg = <0x0 0x9ae00000 0x0 0x1900000>;
49			no-map;
50		};
51
52		mba_mem: memory@9c700000 {
53			reg = <0x0 0x9c700000 0x0 0x200000>;
54			no-map;
55		};
56	};
57};
58
59/* The PMIC PON code isn't compatible w/ how Chrome EC/BIOS handle things. */
60&pmk8350_pon {
61	status = "disabled";
62};
63
64/*
65 * Chrome designs always boot from SPI flash hooked up to the qspi.
66 *
67 * It's expected that all boards will support "dual SPI" at 37.5 MHz.
68 * If some boards need a different speed or have a package that allows
69 * Quad SPI together with WP then those boards can easily override.
70 */
71&qspi {
72	status = "okay";
73	pinctrl-names = "default";
74	pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>;
75
76	spi_flash: flash@0 {
77		compatible = "jedec,spi-nor";
78		reg = <0>;
79
80		spi-max-frequency = <37500000>;
81		spi-tx-bus-width = <2>;
82		spi-rx-bus-width = <2>;
83	};
84};
85
86/* Modem setup is different on Chrome setups than typical Qualcomm setup */
87&remoteproc_mpss {
88	status = "okay";
89	compatible = "qcom,sc7280-mss-pil";
90	iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
91	interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
92	memory-region = <&mba_mem>, <&mpss_mem>;
93	firmware-name = "qcom/sc7280-herobrine/modem/mba.mbn",
94			"qcom/sc7280-herobrine/modem/qdsp6sw.mbn";
95};
96
97&remoteproc_wpss {
98	status = "okay";
99	firmware-name = "ath11k/WCN6750/hw1.0/wpss.mdt";
100};
101
102/* Increase the size from 2.5MB to 8MB */
103&rmtfs_mem {
104	reg = <0x0 0x9c900000 0x0 0x800000>;
105};
106
107&wifi {
108	status = "okay";
109
110	wifi-firmware {
111		iommus = <&apps_smmu 0x1c02 0x1>;
112	};
113};
114