1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Evoker board device tree source
4 *
5 * Copyright 2022 Google LLC.
6 */
7
8/dts-v1/;
9
10#include "sc7280-herobrine.dtsi"
11
12/ {
13	model = "Google Evoker";
14	compatible = "google,evoker", "qcom,sc7280";
15};
16
17/*
18 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
19 *
20 * Sort order matches the order in the parent files (parents before children).
21 */
22
23&pp3300_codec {
24	status = "okay";
25};
26
27/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
28
29ap_tp_i2c: &i2c0 {
30	status = "okay";
31	clock-frequency = <400000>;
32
33	trackpad: trackpad@2c {
34		compatible = "hid-over-i2c";
35		reg = <0x2c>;
36		pinctrl-names = "default";
37		pinctrl-0 = <&tp_int_odl>;
38
39		interrupt-parent = <&tlmm>;
40		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
41
42		hid-descr-addr = <0x20>;
43		vcc-supply = <&pp3300_z1>;
44
45		wakeup-source;
46	};
47};
48
49ts_i2c: &i2c13 {
50	status = "okay";
51	clock-frequency = <400000>;
52
53	ap_ts: touchscreen@10 {
54		compatible = "elan,ekth6915";
55		reg = <0x10>;
56		pinctrl-names = "default";
57		pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
58
59		interrupt-parent = <&tlmm>;
60		interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
61
62		reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
63
64		vcc33-supply = <&ts_avdd>;
65	};
66};
67
68&ap_sar_sensor_i2c {
69	status = "okay";
70};
71
72&ap_sar_sensor0 {
73	status = "okay";
74};
75
76&ap_sar_sensor1 {
77	status = "okay";
78};
79
80&mdss_edp {
81	status = "okay";
82};
83
84&mdss_edp_phy {
85	status = "okay";
86};
87
88/* For nvme */
89&pcie1 {
90	status = "okay";
91};
92
93/* For nvme */
94&pcie1_phy {
95	status = "okay";
96};
97
98&pwmleds {
99	status = "okay";
100};
101
102/* For eMMC */
103&sdhc_1 {
104	status = "okay";
105};
106
107/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
108
109&ts_rst_conn {
110	bias-disable;
111};
112
113/* PINCTRL - BOARD-SPECIFIC */
114
115/*
116 * Methodology for gpio-line-names:
117 * - If a pin goes to herobrine board and is named it gets that name.
118 * - If a pin goes to herobrine board and is not named, it gets no name.
119 * - If a pin is totally internal to Qcard then it gets Qcard name.
120 * - If a pin is not hooked up on Qcard, it gets no name.
121 */
122
123&pm8350c_gpios {
124	gpio-line-names = "FLASH_STROBE_1",		/* 1 */
125			  "AP_SUSPEND",
126			  "PM8008_1_RST_N",
127			  "",
128			  "",
129			  "",
130			  "PMIC_EDP_BL_EN",
131			  "PMIC_EDP_BL_PWM",
132			  "";
133};
134
135&tlmm {
136	gpio-line-names = "AP_TP_I2C_SDA",		/* 0 */
137			  "AP_TP_I2C_SCL",
138			  "SSD_RST_L",
139			  "PE_WAKE_ODL",
140			  "AP_SAR_SDA",
141			  "AP_SAR_SCL",
142			  "PRB_SC_GPIO_6",
143			  "TP_INT_ODL",
144			  "HP_I2C_SDA",
145			  "HP_I2C_SCL",
146
147			  "GNSS_L1_EN",			/* 10 */
148			  "GNSS_L5_EN",
149			  "SPI_AP_MOSI",
150			  "SPI_AP_MISO",
151			  "SPI_AP_CLK",
152			  "SPI_AP_CS0_L",
153			  /*
154			   * AP_FLASH_WP is crossystem ABI. Schematics
155			   * call it BIOS_FLASH_WP_OD.
156			   */
157			  "AP_FLASH_WP",
158			  "",
159			  "AP_EC_INT_L",
160			  "",
161
162			  "UF_CAM_RST_L",		/* 20 */
163			  "WF_CAM_RST_L",
164			  "UART_AP_TX_DBG_RX",
165			  "UART_DBG_TX_AP_RX",
166			  "",
167			  "PM8008_IRQ_1",
168			  "HOST2WLAN_SOL",
169			  "WLAN2HOST_SOL",
170			  "MOS_BT_UART_CTS",
171			  "MOS_BT_UART_RFR",
172
173			  "MOS_BT_UART_TX",		/* 30 */
174			  "MOS_BT_UART_RX",
175			  "PRB_SC_GPIO_32",
176			  "HUB_RST_L",
177			  "",
178			  "",
179			  "AP_SPI_FP_MISO",
180			  "AP_SPI_FP_MOSI",
181			  "AP_SPI_FP_CLK",
182			  "AP_SPI_FP_CS_L",
183
184			  "AP_EC_SPI_MISO",		/* 40 */
185			  "AP_EC_SPI_MOSI",
186			  "AP_EC_SPI_CLK",
187			  "AP_EC_SPI_CS_L",
188			  "LCM_RST_L",
189			  "EARLY_EUD_N",
190			  "",
191			  "DP_HOT_PLUG_DET",
192			  "IO_BRD_MLB_ID0",
193			  "IO_BRD_MLB_ID1",
194
195			  "IO_BRD_MLB_ID2",		/* 50 */
196			  "SSD_EN",
197			  "TS_I2C_SDA_CONN",
198			  "TS_I2C_CLK_CONN",
199			  "TS_RST_CONN",
200			  "TS_INT_CONN",
201			  "AP_I2C_TPM_SDA",
202			  "AP_I2C_TPM_SCL",
203			  "PRB_SC_GPIO_58",
204			  "PRB_SC_GPIO_59",
205
206			  "EDP_HOT_PLUG_DET_N",		/* 60 */
207			  "FP_TO_AP_IRQ_L",
208			  "",
209			  "AMP_EN",
210			  "CAM0_MCLK_GPIO_64",
211			  "CAM1_MCLK_GPIO_65",
212			  "WF_CAM_MCLK",
213			  "PRB_SC_GPIO_67",
214			  "FPMCU_BOOT0",
215			  "UF_CAM_SDA",
216
217			  "UF_CAM_SCL",			/* 70 */
218			  "",
219			  "",
220			  "WF_CAM_SDA",
221			  "WF_CAM_SCL",
222			  "",
223			  "",
224			  "EN_FP_RAILS",
225			  "FP_RST_L",
226			  "PCIE1_CLKREQ_ODL",
227
228			  "EN_PP3300_DX_EDP",		/* 80 */
229			  "SC_GPIO_81",
230			  "FORCED_USB_BOOT",
231			  "WCD_RESET_N",
232			  "MOS_WLAN_EN",
233			  "MOS_BT_EN",
234			  "MOS_SW_CTRL",
235			  "MOS_PCIE0_RST",
236			  "MOS_PCIE0_CLKREQ_N",
237			  "MOS_PCIE0_WAKE_N",
238
239			  "MOS_LAA_AS_EN",		/* 90 */
240			  "SD_CD_ODL",
241			  "",
242			  "",
243			  "MOS_BT_WLAN_SLIMBUS_CLK",
244			  "MOS_BT_WLAN_SLIMBUS_DAT0",
245			  "HP_MCLK",
246			  "HP_BCLK",
247			  "HP_DOUT",
248			  "HP_DIN",
249
250			  "HP_LRCLK",			/* 100 */
251			  "HP_IRQ",
252			  "",
253			  "",
254			  "GSC_AP_INT_ODL",
255			  "EN_PP3300_CODEC",
256			  "AMP_BCLK",
257			  "AMP_DIN",
258			  "AMP_LRCLK",
259			  "UIM1_DATA_GPIO_109",
260
261			  "UIM1_CLK_GPIO_110",		/* 110 */
262			  "UIM1_RESET_GPIO_111",
263			  "PRB_SC_GPIO_112",
264			  "UIM0_DATA",
265			  "UIM0_CLK",
266			  "UIM0_RST",
267			  "UIM0_PRESENT_ODL",
268			  "SDM_RFFE0_CLK",
269			  "SDM_RFFE0_DATA",
270			  "WF_CAM_EN",
271
272			  "FASTBOOT_SEL_0",		/* 120 */
273			  "SC_GPIO_121",
274			  "FASTBOOT_SEL_1",
275			  "SC_GPIO_123",
276			  "FASTBOOT_SEL_2",
277			  "SM_RFFE4_CLK_GRFC_8",
278			  "SM_RFFE4_DATA_GRFC_9",
279			  "WLAN_COEX_UART1_RX",
280			  "WLAN_COEX_UART1_TX",
281			  "PRB_SC_GPIO_129",
282
283			  "LCM_ID0",			/* 130 */
284			  "LCM_ID1",
285			  "",
286			  "SDR_QLINK_REQ",
287			  "SDR_QLINK_EN",
288			  "QLINK0_WMSS_RESET_N",
289			  "SMR526_QLINK1_REQ",
290			  "SMR526_QLINK1_EN",
291			  "SMR526_QLINK1_WMSS_RESET_N",
292			  "PRB_SC_GPIO_139",
293
294			  "SAR1_IRQ_ODL",		/* 140 */
295			  "SAR0_IRQ_ODL",
296			  "PRB_SC_GPIO_142",
297			  "",
298			  "WCD_SWR_TX_CLK",
299			  "WCD_SWR_TX_DATA0",
300			  "WCD_SWR_TX_DATA1",
301			  "WCD_SWR_RX_CLK",
302			  "WCD_SWR_RX_DATA0",
303			  "WCD_SWR_RX_DATA1",
304
305			  "DMIC01_CLK",			/* 150 */
306			  "DMIC01_DATA",
307			  "DMIC23_CLK",
308			  "DMIC23_DATA",
309			  "",
310			  "",
311			  "EC_IN_RW_ODL",
312			  "HUB_EN",
313			  "WCD_SWR_TX_DATA2",
314			  "",
315
316			  "",				/* 160 */
317			  "",
318			  "",
319			  "",
320			  "",
321			  "",
322			  "",
323			  "",
324			  "",
325			  "",
326
327			  "",				/* 170 */
328			  "MOS_BLE_UART_TX",
329			  "MOS_BLE_UART_RX",
330			  "",
331			  "",
332			  "";
333};
334