1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Herobrine board device tree source
4 *
5 * Copyright 2022 Google LLC.
6 */
7
8/dts-v1/;
9
10#include "sc7280-herobrine.dtsi"
11
12/ {
13	model = "Google Herobrine (rev1+)";
14	compatible = "google,herobrine", "qcom,sc7280";
15};
16
17/*
18 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
19 *
20 * Sort order matches the order in the parent files (parents before children).
21 */
22
23&pp3300_codec {
24	status = "okay";
25};
26
27&pp3300_fp_mcu {
28	status = "okay";
29};
30
31&pp2850_vcm_wf_cam {
32	status = "okay";
33};
34
35&pp2850_wf_cam {
36	status = "okay";
37};
38
39&pp1800_wf_cam {
40	status = "okay";
41};
42
43&pp1200_wf_cam {
44	status = "okay";
45};
46
47/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
48
49&ap_spi_fp {
50	status = "okay";
51};
52
53/*
54 * Although the trackpad is really part of the herobrine baseboard, we'll
55 * put the actual definition in the board device tree since different boards
56 * might hook up different trackpads (or no i2c trackpad at all in the case
57 * of tablets / detachables).
58 */
59ap_tp_i2c: &i2c0 {
60	status = "okay";
61	clock-frequency = <400000>;
62
63	trackpad: trackpad@15 {
64		compatible = "elan,ekth3000";
65		reg = <0x15>;
66		pinctrl-names = "default";
67		pinctrl-0 = <&tp_int_odl>;
68
69		interrupt-parent = <&tlmm>;
70		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
71
72		vcc-supply = <&pp3300_z1>;
73
74		wakeup-source;
75	};
76};
77
78/*
79 * The touchscreen connector might come off the Qcard, at least in the case of
80 * eDP. Like the trackpad, we'll put it in the board device tree file since
81 * different boards have different touchscreens.
82 */
83ts_i2c: &i2c13 {
84	status = "okay";
85	clock-frequency = <400000>;
86
87	ap_ts: touchscreen@5c {
88		compatible = "hid-over-i2c";
89		reg = <0x5c>;
90		pinctrl-names = "default";
91		pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
92
93		interrupt-parent = <&tlmm>;
94		interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
95
96		post-power-on-delay-ms = <500>;
97		hid-descr-addr = <0x0000>;
98
99		vdd-supply = <&ts_avdd>;
100	};
101};
102
103&mdss_edp {
104	status = "okay";
105};
106
107&mdss_edp_phy {
108	status = "okay";
109};
110
111/* For nvme */
112&pcie1 {
113	status = "okay";
114};
115
116/* For nvme */
117&pcie1_phy {
118	status = "okay";
119};
120
121/* For eMMC */
122&sdhc_1 {
123	status = "okay";
124};
125
126/* For SD Card */
127&sdhc_2 {
128	status = "okay";
129};
130
131/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
132
133/*
134 * This pin goes to the display panel but then doesn't actually do anything
135 * on the panel itself (it doesn't connect to the touchscreen controller).
136 * We'll set a pullup here just to park the line.
137 */
138&ts_rst_conn {
139	bias-pull-up;
140};
141
142/* PINCTRL - BOARD-SPECIFIC */
143
144/*
145 * Methodology for gpio-line-names:
146 * - If a pin goes to herobrine board and is named it gets that name.
147 * - If a pin goes to herobrine board and is not named, it gets no name.
148 * - If a pin is totally internal to Qcard then it gets Qcard name.
149 * - If a pin is not hooked up on Qcard, it gets no name.
150 */
151
152&pm8350c_gpios {
153	gpio-line-names = "FLASH_STROBE_1",		/* 1 */
154			  "AP_SUSPEND",
155			  "PM8008_1_RST_N",
156			  "",
157			  "",
158			  "",
159			  "PMIC_EDP_BL_EN",
160			  "PMIC_EDP_BL_PWM",
161			  "";
162};
163
164&tlmm {
165	gpio-line-names = "AP_TP_I2C_SDA",		/* 0 */
166			  "AP_TP_I2C_SCL",
167			  "SSD_RST_L",
168			  "PE_WAKE_ODL",
169			  "AP_SAR_SDA",
170			  "AP_SAR_SCL",
171			  "PRB_SC_GPIO_6",
172			  "TP_INT_ODL",
173			  "HP_I2C_SDA",
174			  "HP_I2C_SCL",
175
176			  "GNSS_L1_EN",			/* 10 */
177			  "GNSS_L5_EN",
178			  "SPI_AP_MOSI",
179			  "SPI_AP_MISO",
180			  "SPI_AP_CLK",
181			  "SPI_AP_CS0_L",
182			  /*
183			   * AP_FLASH_WP is crossystem ABI. Schematics
184			   * call it BIOS_FLASH_WP_OD.
185			   */
186			  "AP_FLASH_WP",
187			  "",
188			  "AP_EC_INT_L",
189			  "",
190
191			  "UF_CAM_RST_L",		/* 20 */
192			  "WF_CAM_RST_L",
193			  "UART_AP_TX_DBG_RX",
194			  "UART_DBG_TX_AP_RX",
195			  "",
196			  "PM8008_IRQ_1",
197			  "HOST2WLAN_SOL",
198			  "WLAN2HOST_SOL",
199			  "MOS_BT_UART_CTS",
200			  "MOS_BT_UART_RFR",
201
202			  "MOS_BT_UART_TX",		/* 30 */
203			  "MOS_BT_UART_RX",
204			  "PRB_SC_GPIO_32",
205			  "HUB_RST_L",
206			  "",
207			  "",
208			  "AP_SPI_FP_MISO",
209			  "AP_SPI_FP_MOSI",
210			  "AP_SPI_FP_CLK",
211			  "AP_SPI_FP_CS_L",
212
213			  "AP_EC_SPI_MISO",		/* 40 */
214			  "AP_EC_SPI_MOSI",
215			  "AP_EC_SPI_CLK",
216			  "AP_EC_SPI_CS_L",
217			  "LCM_RST_L",
218			  "EARLY_EUD_N",
219			  "",
220			  "DP_HOT_PLUG_DET",
221			  "IO_BRD_MLB_ID0",
222			  "IO_BRD_MLB_ID1",
223
224			  "IO_BRD_MLB_ID2",		/* 50 */
225			  "SSD_EN",
226			  "TS_I2C_SDA_CONN",
227			  "TS_I2C_CLK_CONN",
228			  "TS_RST_CONN",
229			  "TS_INT_CONN",
230			  "AP_I2C_TPM_SDA",
231			  "AP_I2C_TPM_SCL",
232			  "PRB_SC_GPIO_58",
233			  "PRB_SC_GPIO_59",
234
235			  "EDP_HOT_PLUG_DET_N",		/* 60 */
236			  "FP_TO_AP_IRQ_L",
237			  "",
238			  "AMP_EN",
239			  "CAM0_MCLK_GPIO_64",
240			  "CAM1_MCLK_GPIO_65",
241			  "WF_CAM_MCLK",
242			  "PRB_SC_GPIO_67",
243			  "FPMCU_BOOT0",
244			  "UF_CAM_SDA",
245
246			  "UF_CAM_SCL",			/* 70 */
247			  "",
248			  "",
249			  "WF_CAM_SDA",
250			  "WF_CAM_SCL",
251			  "",
252			  "",
253			  "EN_FP_RAILS",
254			  "FP_RST_L",
255			  "PCIE1_CLKREQ_ODL",
256
257			  "EN_PP3300_DX_EDP",		/* 80 */
258			  "SC_GPIO_81",
259			  "FORCED_USB_BOOT",
260			  "WCD_RESET_N",
261			  "MOS_WLAN_EN",
262			  "MOS_BT_EN",
263			  "MOS_SW_CTRL",
264			  "MOS_PCIE0_RST",
265			  "MOS_PCIE0_CLKREQ_N",
266			  "MOS_PCIE0_WAKE_N",
267
268			  "MOS_LAA_AS_EN",		/* 90 */
269			  "SD_CD_ODL",
270			  "",
271			  "",
272			  "MOS_BT_WLAN_SLIMBUS_CLK",
273			  "MOS_BT_WLAN_SLIMBUS_DAT0",
274			  "HP_MCLK",
275			  "HP_BCLK",
276			  "HP_DOUT",
277			  "HP_DIN",
278
279			  "HP_LRCLK",			/* 100 */
280			  "HP_IRQ",
281			  "",
282			  "",
283			  "GSC_AP_INT_ODL",
284			  "EN_PP3300_CODEC",
285			  "AMP_BCLK",
286			  "AMP_DIN",
287			  "AMP_LRCLK",
288			  "UIM1_DATA_GPIO_109",
289
290			  "UIM1_CLK_GPIO_110",		/* 110 */
291			  "UIM1_RESET_GPIO_111",
292			  "PRB_SC_GPIO_112",
293			  "UIM0_DATA",
294			  "UIM0_CLK",
295			  "UIM0_RST",
296			  "UIM0_PRESENT_ODL",
297			  "SDM_RFFE0_CLK",
298			  "SDM_RFFE0_DATA",
299			  "WF_CAM_EN",
300
301			  "FASTBOOT_SEL_0",		/* 120 */
302			  "SC_GPIO_121",
303			  "FASTBOOT_SEL_1",
304			  "SC_GPIO_123",
305			  "FASTBOOT_SEL_2",
306			  "SM_RFFE4_CLK_GRFC_8",
307			  "SM_RFFE4_DATA_GRFC_9",
308			  "WLAN_COEX_UART1_RX",
309			  "WLAN_COEX_UART1_TX",
310			  "PRB_SC_GPIO_129",
311
312			  "LCM_ID0",			/* 130 */
313			  "LCM_ID1",
314			  "",
315			  "SDR_QLINK_REQ",
316			  "SDR_QLINK_EN",
317			  "QLINK0_WMSS_RESET_N",
318			  "SMR526_QLINK1_REQ",
319			  "SMR526_QLINK1_EN",
320			  "SMR526_QLINK1_WMSS_RESET_N",
321			  "PRB_SC_GPIO_139",
322
323			  "SAR1_IRQ_ODL",		/* 140 */
324			  "SAR0_IRQ_ODL",
325			  "PRB_SC_GPIO_142",
326			  "",
327			  "WCD_SWR_TX_CLK",
328			  "WCD_SWR_TX_DATA0",
329			  "WCD_SWR_TX_DATA1",
330			  "WCD_SWR_RX_CLK",
331			  "WCD_SWR_RX_DATA0",
332			  "WCD_SWR_RX_DATA1",
333
334			  "DMIC01_CLK",			/* 150 */
335			  "DMIC01_DATA",
336			  "DMIC23_CLK",
337			  "DMIC23_DATA",
338			  "",
339			  "",
340			  "EC_IN_RW_ODL",
341			  "HUB_EN",
342			  "WCD_SWR_TX_DATA2",
343			  "",
344
345			  "",				/* 160 */
346			  "",
347			  "",
348			  "",
349			  "",
350			  "",
351			  "",
352			  "",
353			  "",
354			  "",
355
356			  "",				/* 170 */
357			  "MOS_BLE_UART_TX",
358			  "MOS_BLE_UART_RX",
359			  "",
360			  "",
361			  "";
362};
363