1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2019, Linaro Ltd.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10#include <dt-bindings/sound/qcom,q6afe.h>
11#include <dt-bindings/sound/qcom,q6asm.h>
12#include "sdm845.dtsi"
13#include "pm8998.dtsi"
14#include "pmi8998.dtsi"
15
16/ {
17	model = "Thundercomm Dragonboard 845c";
18	compatible = "thundercomm,db845c", "qcom,sdm845";
19	qcom,msm-id = <341 0x20001>;
20	qcom,board-id = <8 0>;
21
22	aliases {
23		serial0 = &uart9;
24		hsuart0 = &uart6;
25	};
26
27	chosen {
28		stdout-path = "serial0:115200n8";
29	};
30
31	dc12v: dc12v-regulator {
32		compatible = "regulator-fixed";
33		regulator-name = "DC12V";
34		regulator-min-microvolt = <12000000>;
35		regulator-max-microvolt = <12000000>;
36		regulator-always-on;
37	};
38
39	gpio_keys {
40		compatible = "gpio-keys";
41		autorepeat;
42
43		pinctrl-names = "default";
44		pinctrl-0 = <&vol_up_pin_a>;
45
46		vol-up {
47			label = "Volume Up";
48			linux,code = <KEY_VOLUMEUP>;
49			gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
50		};
51	};
52
53	leds {
54		compatible = "gpio-leds";
55
56		user4 {
57			label = "green:user4";
58			gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
59			linux,default-trigger = "panic-indicator";
60			default-state = "off";
61		};
62
63		wlan {
64			label = "yellow:wlan";
65			gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
66			linux,default-trigger = "phy0tx";
67			default-state = "off";
68		};
69
70		bt {
71			label = "blue:bt";
72			gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
73			linux,default-trigger = "bluetooth-power";
74			default-state = "off";
75		};
76	};
77
78	hdmi-out {
79		compatible = "hdmi-connector";
80		type = "a";
81
82		port {
83			hdmi_con: endpoint {
84				remote-endpoint = <&lt9611_out>;
85			};
86		};
87	};
88
89	lt9611_1v8: lt9611-vdd18-regulator {
90		compatible = "regulator-fixed";
91		regulator-name = "LT9611_1V8";
92
93		vin-supply = <&vdc_5v>;
94		regulator-min-microvolt = <1800000>;
95		regulator-max-microvolt = <1800000>;
96
97		gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
98		enable-active-high;
99	};
100
101	lt9611_3v3: lt9611-3v3 {
102		compatible = "regulator-fixed";
103		regulator-name = "LT9611_3V3";
104
105		vin-supply = <&vdc_3v3>;
106		regulator-min-microvolt = <3300000>;
107		regulator-max-microvolt = <3300000>;
108
109		// TODO: make it possible to drive same GPIO from two clients
110		// gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
111		// enable-active-high;
112	};
113
114	pcie0_1p05v: pcie-0-1p05v-regulator {
115		compatible = "regulator-fixed";
116		regulator-name = "PCIE0_1.05V";
117
118		vin-supply = <&vbat>;
119		regulator-min-microvolt = <1050000>;
120		regulator-max-microvolt = <1050000>;
121
122		// TODO: make it possible to drive same GPIO from two clients
123		// gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
124		// enable-active-high;
125	};
126
127	cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
128		compatible = "regulator-fixed";
129		regulator-name = "CAM0_DVDD_1V2";
130		regulator-min-microvolt = <1200000>;
131		regulator-max-microvolt = <1200000>;
132		enable-active-high;
133		gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
134		pinctrl-names = "default";
135		pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
136		vin-supply = <&vbat>;
137	};
138
139	cam0_avdd_2v8: reg_cam0_avdd_2v8 {
140		compatible = "regulator-fixed";
141		regulator-name = "CAM0_AVDD_2V8";
142		regulator-min-microvolt = <2800000>;
143		regulator-max-microvolt = <2800000>;
144		enable-active-high;
145		gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
146		pinctrl-names = "default";
147		pinctrl-0 = <&cam0_avdd_2v8_en_default>;
148		vin-supply = <&vbat>;
149	};
150
151	/* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
152	cam3_avdd_2v8: reg_cam3_avdd_2v8 {
153		compatible = "regulator-fixed";
154		regulator-name = "CAM3_AVDD_2V8";
155		regulator-min-microvolt = <2800000>;
156		regulator-max-microvolt = <2800000>;
157		regulator-always-on;
158		vin-supply = <&vbat>;
159	};
160
161	pcie0_3p3v_dual: vldo-3v3-regulator {
162		compatible = "regulator-fixed";
163		regulator-name = "VLDO_3V3";
164
165		vin-supply = <&vbat>;
166		regulator-min-microvolt = <3300000>;
167		regulator-max-microvolt = <3300000>;
168
169		gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
170		enable-active-high;
171
172		pinctrl-names = "default";
173		pinctrl-0 = <&pcie0_pwren_state>;
174	};
175
176	v5p0_hdmiout: v5p0-hdmiout-regulator {
177		compatible = "regulator-fixed";
178		regulator-name = "V5P0_HDMIOUT";
179
180		vin-supply = <&vdc_5v>;
181		regulator-min-microvolt = <500000>;
182		regulator-max-microvolt = <500000>;
183
184		// TODO: make it possible to drive same GPIO from two clients
185		// gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
186		// enable-active-high;
187	};
188
189	vbat: vbat-regulator {
190		compatible = "regulator-fixed";
191		regulator-name = "VBAT";
192
193		vin-supply = <&dc12v>;
194		regulator-min-microvolt = <4200000>;
195		regulator-max-microvolt = <4200000>;
196		regulator-always-on;
197	};
198
199	vbat_som: vbat-som-regulator {
200		compatible = "regulator-fixed";
201		regulator-name = "VBAT_SOM";
202
203		vin-supply = <&dc12v>;
204		regulator-min-microvolt = <4200000>;
205		regulator-max-microvolt = <4200000>;
206		regulator-always-on;
207	};
208
209	vdc_3v3: vdc-3v3-regulator {
210		compatible = "regulator-fixed";
211		regulator-name = "VDC_3V3";
212		vin-supply = <&dc12v>;
213		regulator-min-microvolt = <3300000>;
214		regulator-max-microvolt = <3300000>;
215		regulator-always-on;
216	};
217
218	vdc_5v: vdc-5v-regulator {
219		compatible = "regulator-fixed";
220		regulator-name = "VDC_5V";
221
222		vin-supply = <&dc12v>;
223		regulator-min-microvolt = <500000>;
224		regulator-max-microvolt = <500000>;
225		regulator-always-on;
226	};
227
228	vreg_s4a_1p8: vreg-s4a-1p8 {
229		compatible = "regulator-fixed";
230		regulator-name = "vreg_s4a_1p8";
231
232		regulator-min-microvolt = <1800000>;
233		regulator-max-microvolt = <1800000>;
234		regulator-always-on;
235	};
236
237	vph_pwr: vph-pwr-regulator {
238		compatible = "regulator-fixed";
239		regulator-name = "vph_pwr";
240
241		vin-supply = <&vbat_som>;
242	};
243};
244
245&adsp_pas {
246	status = "okay";
247
248	firmware-name = "qcom/sdm845/adsp.mbn";
249};
250
251&apps_rsc {
252	pm8998-rpmh-regulators {
253		compatible = "qcom,pm8998-rpmh-regulators";
254		qcom,pmic-id = "a";
255		vdd-s1-supply = <&vph_pwr>;
256		vdd-s2-supply = <&vph_pwr>;
257		vdd-s3-supply = <&vph_pwr>;
258		vdd-s4-supply = <&vph_pwr>;
259		vdd-s5-supply = <&vph_pwr>;
260		vdd-s6-supply = <&vph_pwr>;
261		vdd-s7-supply = <&vph_pwr>;
262		vdd-s8-supply = <&vph_pwr>;
263		vdd-s9-supply = <&vph_pwr>;
264		vdd-s10-supply = <&vph_pwr>;
265		vdd-s11-supply = <&vph_pwr>;
266		vdd-s12-supply = <&vph_pwr>;
267		vdd-s13-supply = <&vph_pwr>;
268		vdd-l1-l27-supply = <&vreg_s7a_1p025>;
269		vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
270		vdd-l3-l11-supply = <&vreg_s7a_1p025>;
271		vdd-l4-l5-supply = <&vreg_s7a_1p025>;
272		vdd-l6-supply = <&vph_pwr>;
273		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
274		vdd-l9-supply = <&vreg_bob>;
275		vdd-l10-l23-l25-supply = <&vreg_bob>;
276		vdd-l13-l19-l21-supply = <&vreg_bob>;
277		vdd-l16-l28-supply = <&vreg_bob>;
278		vdd-l18-l22-supply = <&vreg_bob>;
279		vdd-l20-l24-supply = <&vreg_bob>;
280		vdd-l26-supply = <&vreg_s3a_1p35>;
281		vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
282
283		vreg_s3a_1p35: smps3 {
284			regulator-min-microvolt = <1352000>;
285			regulator-max-microvolt = <1352000>;
286		};
287
288		vreg_s5a_2p04: smps5 {
289			regulator-min-microvolt = <1904000>;
290			regulator-max-microvolt = <2040000>;
291		};
292
293		vreg_s7a_1p025: smps7 {
294			regulator-min-microvolt = <900000>;
295			regulator-max-microvolt = <1028000>;
296		};
297
298		vreg_l1a_0p875: ldo1 {
299			regulator-min-microvolt = <880000>;
300			regulator-max-microvolt = <880000>;
301			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
302		};
303
304		vreg_l5a_0p8: ldo5 {
305			regulator-min-microvolt = <800000>;
306			regulator-max-microvolt = <800000>;
307			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
308		};
309
310		vreg_l12a_1p8: ldo12 {
311			regulator-min-microvolt = <1800000>;
312			regulator-max-microvolt = <1800000>;
313			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
314		};
315
316		vreg_l7a_1p8: ldo7 {
317			regulator-min-microvolt = <1800000>;
318			regulator-max-microvolt = <1800000>;
319			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
320		};
321
322		vreg_l13a_2p95: ldo13 {
323			regulator-min-microvolt = <1800000>;
324			regulator-max-microvolt = <2960000>;
325			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
326		};
327
328		vreg_l17a_1p3: ldo17 {
329			regulator-min-microvolt = <1304000>;
330			regulator-max-microvolt = <1304000>;
331			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332		};
333
334		vreg_l20a_2p95: ldo20 {
335			regulator-min-microvolt = <2960000>;
336			regulator-max-microvolt = <2968000>;
337			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
338		};
339
340		vreg_l21a_2p95: ldo21 {
341			regulator-min-microvolt = <2960000>;
342			regulator-max-microvolt = <2968000>;
343			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
344		};
345
346		vreg_l24a_3p075: ldo24 {
347			regulator-min-microvolt = <3088000>;
348			regulator-max-microvolt = <3088000>;
349			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
350		};
351
352		vreg_l25a_3p3: ldo25 {
353			regulator-min-microvolt = <3300000>;
354			regulator-max-microvolt = <3312000>;
355			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
356		};
357
358		vreg_l26a_1p2: ldo26 {
359			regulator-min-microvolt = <1200000>;
360			regulator-max-microvolt = <1200000>;
361			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
362		};
363
364		vreg_lvs1a_1p8: lvs1 {
365			regulator-min-microvolt = <1800000>;
366			regulator-max-microvolt = <1800000>;
367			regulator-always-on;
368		};
369
370		vreg_lvs2a_1p8: lvs2 {
371			regulator-min-microvolt = <1800000>;
372			regulator-max-microvolt = <1800000>;
373			regulator-always-on;
374		};
375	};
376
377	pmi8998-rpmh-regulators {
378		compatible = "qcom,pmi8998-rpmh-regulators";
379		qcom,pmic-id = "b";
380
381		vdd-bob-supply = <&vph_pwr>;
382
383		vreg_bob: bob {
384			regulator-min-microvolt = <3312000>;
385			regulator-max-microvolt = <3600000>;
386			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
387			regulator-allow-bypass;
388		};
389	};
390};
391
392&cdsp_pas {
393	status = "okay";
394	firmware-name = "qcom/sdm845/cdsp.mbn";
395};
396
397&dsi0 {
398	status = "okay";
399	vdda-supply = <&vreg_l26a_1p2>;
400
401	ports {
402		port@1 {
403			endpoint {
404				remote-endpoint = <&lt9611_a>;
405				data-lanes = <0 1 2 3>;
406			};
407		};
408	};
409};
410
411&dsi0_phy {
412	status = "okay";
413	vdds-supply = <&vreg_l1a_0p875>;
414};
415
416&gcc {
417	protected-clocks = <GCC_QSPI_CORE_CLK>,
418			   <GCC_QSPI_CORE_CLK_SRC>,
419			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
420			   <GCC_LPASS_Q6_AXI_CLK>,
421			   <GCC_LPASS_SWAY_CLK>;
422};
423
424&gmu {
425	status = "okay";
426};
427
428&gpi_dma0 {
429	status = "okay";
430};
431
432&gpu {
433	status = "okay";
434	zap-shader {
435		memory-region = <&gpu_mem>;
436		firmware-name = "qcom/sdm845/a630_zap.mbn";
437	};
438};
439
440&i2c10 {
441	status = "okay";
442	clock-frequency = <400000>;
443
444	lt9611_codec: hdmi-bridge@3b {
445		compatible = "lontium,lt9611";
446		reg = <0x3b>;
447		#sound-dai-cells = <1>;
448
449		interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
450
451		reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
452
453		vdd-supply = <&lt9611_1v8>;
454		vcc-supply = <&lt9611_3v3>;
455
456		pinctrl-names = "default";
457		pinctrl-0 = <&lt9611_irq_pin>, <&dsi_sw_sel>;
458
459		ports {
460			#address-cells = <1>;
461			#size-cells = <0>;
462
463			port@0 {
464				reg = <0>;
465
466				lt9611_a: endpoint {
467					remote-endpoint = <&dsi0_out>;
468				};
469			};
470
471			port@2 {
472				reg = <2>;
473
474				lt9611_out: endpoint {
475					remote-endpoint = <&hdmi_con>;
476				};
477			};
478		};
479	};
480};
481
482&i2c11 {
483	/* On Low speed expansion */
484	label = "LS-I2C1";
485	status = "okay";
486};
487
488&i2c14 {
489	/* On Low speed expansion */
490	label = "LS-I2C0";
491	status = "okay";
492};
493
494&mdss {
495	status = "okay";
496};
497
498&mss_pil {
499	status = "okay";
500	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
501};
502
503&pcie0 {
504	status = "okay";
505	perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
506	enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
507
508	vddpe-3v3-supply = <&pcie0_3p3v_dual>;
509
510	pinctrl-names = "default";
511	pinctrl-0 = <&pcie0_default_state>;
512};
513
514&pcie0_phy {
515	status = "okay";
516
517	vdda-phy-supply = <&vreg_l1a_0p875>;
518	vdda-pll-supply = <&vreg_l26a_1p2>;
519};
520
521&pcie1 {
522	status = "okay";
523	perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
524
525	pinctrl-names = "default";
526	pinctrl-0 = <&pcie1_default_state>;
527};
528
529&pcie1_phy {
530	status = "okay";
531
532	vdda-phy-supply = <&vreg_l1a_0p875>;
533	vdda-pll-supply = <&vreg_l26a_1p2>;
534};
535
536&pm8998_gpio {
537	gpio-line-names =
538		"NC",
539		"NC",
540		"WLAN_SW_CTRL",
541		"NC",
542		"PM_GPIO5_BLUE_BT_LED",
543		"VOL_UP_N",
544		"NC",
545		"ADC_IN1",
546		"PM_GPIO9_YEL_WIFI_LED",
547		"CAM0_AVDD_EN",
548		"NC",
549		"CAM0_DVDD_EN",
550		"PM_GPIO13_GREEN_U4_LED",
551		"DIV_CLK2",
552		"NC",
553		"NC",
554		"NC",
555		"SMB_STAT",
556		"NC",
557		"NC",
558		"ADC_IN2",
559		"OPTION1",
560		"WCSS_PWR_REQ",
561		"PM845_GPIO24",
562		"OPTION2",
563		"PM845_SLB";
564
565	cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
566		pins = "gpio12";
567		function = "normal";
568
569		bias-pull-up;
570		drive-push-pull;
571		qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
572	};
573
574	cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
575		pins = "gpio10";
576		function = "normal";
577
578		bias-pull-up;
579		drive-push-pull;
580		qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
581	};
582
583	vol_up_pin_a: vol-up-active {
584		pins = "gpio6";
585		function = "normal";
586		input-enable;
587		bias-pull-up;
588		qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
589	};
590};
591
592&pm8998_pon {
593	resin {
594		compatible = "qcom,pm8941-resin";
595		interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
596		debounce = <15625>;
597		bias-pull-up;
598		linux,code = <KEY_VOLUMEDOWN>;
599	};
600};
601
602/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
603&q6afedai {
604	qi2s@22 {
605		reg = <22>;
606		qcom,sd-lines = <0 1 2 3>;
607	};
608};
609
610&q6asmdai {
611	dai@0 {
612		reg = <0>;
613	};
614
615	dai@1 {
616		reg = <1>;
617	};
618
619	dai@2 {
620		reg = <2>;
621	};
622
623	dai@3 {
624		reg = <3>;
625		direction = <2>;
626		is-compress-dai;
627	};
628};
629
630&qupv3_id_0 {
631	status = "okay";
632};
633
634&qupv3_id_1 {
635	status = "okay";
636};
637
638&sdhc_2 {
639	status = "okay";
640
641	pinctrl-names = "default";
642	pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
643
644	vmmc-supply = <&vreg_l21a_2p95>;
645	vqmmc-supply = <&vreg_l13a_2p95>;
646
647	bus-width = <4>;
648	cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
649};
650
651&sound {
652	compatible = "qcom,db845c-sndcard";
653	pinctrl-0 = <&quat_mi2s_active
654			 &quat_mi2s_sd0_active
655			 &quat_mi2s_sd1_active
656			 &quat_mi2s_sd2_active
657			 &quat_mi2s_sd3_active>;
658	pinctrl-names = "default";
659	model = "DB845c";
660	audio-routing =
661		"RX_BIAS", "MCLK",
662		"AMIC1", "MIC BIAS1",
663		"AMIC2", "MIC BIAS2",
664		"DMIC0", "MIC BIAS1",
665		"DMIC1", "MIC BIAS1",
666		"DMIC2", "MIC BIAS3",
667		"DMIC3", "MIC BIAS3",
668		"SpkrLeft IN", "SPK1 OUT",
669		"SpkrRight IN", "SPK2 OUT",
670		"MM_DL1",  "MultiMedia1 Playback",
671		"MM_DL2",  "MultiMedia2 Playback",
672		"MM_DL4",  "MultiMedia4 Playback",
673		"MultiMedia3 Capture", "MM_UL3";
674
675	mm1-dai-link {
676		link-name = "MultiMedia1";
677		cpu {
678			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
679		};
680	};
681
682	mm2-dai-link {
683		link-name = "MultiMedia2";
684		cpu {
685			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
686		};
687	};
688
689	mm3-dai-link {
690		link-name = "MultiMedia3";
691		cpu {
692			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
693		};
694	};
695
696	mm4-dai-link {
697		link-name = "MultiMedia4";
698		cpu {
699			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA4>;
700		};
701	};
702
703	hdmi-dai-link {
704		link-name = "HDMI Playback";
705		cpu {
706			sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
707		};
708
709		platform {
710			sound-dai = <&q6routing>;
711		};
712
713		codec {
714			sound-dai =  <&lt9611_codec 0>;
715		};
716	};
717
718	slim-dai-link {
719		link-name = "SLIM Playback";
720		cpu {
721			sound-dai = <&q6afedai SLIMBUS_0_RX>;
722		};
723
724		platform {
725			sound-dai = <&q6routing>;
726		};
727
728		codec {
729			sound-dai =  <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
730		};
731	};
732
733	slimcap-dai-link {
734		link-name = "SLIM Capture";
735		cpu {
736			sound-dai = <&q6afedai SLIMBUS_0_TX>;
737		};
738
739		platform {
740			sound-dai = <&q6routing>;
741		};
742
743		codec {
744			sound-dai = <&wcd9340 1>;
745		};
746	};
747};
748
749&spi2 {
750	/* On Low speed expansion */
751	label = "LS-SPI0";
752	status = "okay";
753};
754
755&tlmm {
756	cam0_default: cam0_default {
757		rst {
758			pins = "gpio9";
759			function = "gpio";
760
761			drive-strength = <16>;
762			bias-disable;
763		};
764
765		mclk0 {
766			pins = "gpio13";
767			function = "cam_mclk";
768
769			drive-strength = <16>;
770			bias-disable;
771		};
772	};
773
774	cam3_default: cam3_default {
775		rst {
776			function = "gpio";
777			pins = "gpio21";
778
779			drive-strength = <16>;
780			bias-disable;
781		};
782
783		mclk3 {
784			function = "cam_mclk";
785			pins = "gpio16";
786
787			drive-strength = <16>;
788			bias-disable;
789		};
790	};
791
792	dsi_sw_sel: dsi-sw-sel {
793		pins = "gpio120";
794		function = "gpio";
795
796		drive-strength = <2>;
797		bias-disable;
798		output-high;
799	};
800
801	lt9611_irq_pin: lt9611-irq {
802		pins = "gpio84";
803		function = "gpio";
804		bias-disable;
805	};
806
807	pcie0_default_state: pcie0-default {
808		clkreq {
809			pins = "gpio36";
810			function = "pci_e0";
811			bias-pull-up;
812		};
813
814		reset-n {
815			pins = "gpio35";
816			function = "gpio";
817
818			drive-strength = <2>;
819			output-low;
820			bias-pull-down;
821		};
822
823		wake-n {
824			pins = "gpio37";
825			function = "gpio";
826
827			drive-strength = <2>;
828			bias-pull-up;
829		};
830	};
831
832	pcie0_pwren_state: pcie0-pwren {
833		pins = "gpio90";
834		function = "gpio";
835
836		drive-strength = <2>;
837		bias-disable;
838	};
839
840	pcie1_default_state: pcie1-default {
841		perst-n {
842			pins = "gpio102";
843			function = "gpio";
844
845			drive-strength = <16>;
846			bias-disable;
847		};
848
849		clkreq {
850			pins = "gpio103";
851			function = "pci_e1";
852			bias-pull-up;
853		};
854
855		wake-n {
856			pins = "gpio11";
857			function = "gpio";
858
859			drive-strength = <2>;
860			bias-pull-up;
861		};
862
863		reset-n {
864			pins = "gpio75";
865			function = "gpio";
866
867			drive-strength = <16>;
868			bias-pull-up;
869			output-high;
870		};
871	};
872
873	sdc2_default_state: sdc2-default {
874		clk {
875			pins = "sdc2_clk";
876			bias-disable;
877
878			/*
879			 * It seems that mmc_test reports errors if drive
880			 * strength is not 16 on clk, cmd, and data pins.
881			 */
882			drive-strength = <16>;
883		};
884
885		cmd {
886			pins = "sdc2_cmd";
887			bias-pull-up;
888			drive-strength = <10>;
889		};
890
891		data {
892			pins = "sdc2_data";
893			bias-pull-up;
894			drive-strength = <10>;
895		};
896	};
897
898	sdc2_card_det_n: sd-card-det-n {
899		pins = "gpio126";
900		function = "gpio";
901		bias-pull-up;
902	};
903
904	wcd_intr_default: wcd_intr_default {
905		pins = <54>;
906		function = "gpio";
907
908		input-enable;
909		bias-pull-down;
910		drive-strength = <2>;
911	};
912};
913
914&uart3 {
915	label = "LS-UART0";
916	status = "disabled";
917};
918
919&uart6 {
920	status = "okay";
921
922	bluetooth {
923		compatible = "qcom,wcn3990-bt";
924
925		vddio-supply = <&vreg_s4a_1p8>;
926		vddxo-supply = <&vreg_l7a_1p8>;
927		vddrf-supply = <&vreg_l17a_1p3>;
928		vddch0-supply = <&vreg_l25a_3p3>;
929		max-speed = <3200000>;
930	};
931};
932
933&uart9 {
934	label = "LS-UART1";
935	status = "okay";
936};
937
938&usb_1 {
939	status = "okay";
940};
941
942&usb_1_dwc3 {
943	dr_mode = "peripheral";
944};
945
946&usb_1_hsphy {
947	status = "okay";
948
949	vdd-supply = <&vreg_l1a_0p875>;
950	vdda-pll-supply = <&vreg_l12a_1p8>;
951	vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
952
953	qcom,imp-res-offset-value = <8>;
954	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
955	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
956	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
957};
958
959&usb_1_qmpphy {
960	status = "okay";
961
962	vdda-phy-supply = <&vreg_l26a_1p2>;
963	vdda-pll-supply = <&vreg_l1a_0p875>;
964};
965
966&usb_2 {
967	status = "okay";
968};
969
970&usb_2_dwc3 {
971	dr_mode = "host";
972};
973
974&usb_2_hsphy {
975	status = "okay";
976
977	vdd-supply = <&vreg_l1a_0p875>;
978	vdda-pll-supply = <&vreg_l12a_1p8>;
979	vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
980
981	qcom,imp-res-offset-value = <8>;
982	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
983};
984
985&usb_2_qmpphy {
986	status = "okay";
987
988	vdda-phy-supply = <&vreg_l26a_1p2>;
989	vdda-pll-supply = <&vreg_l1a_0p875>;
990};
991
992&ufs_mem_hc {
993	status = "okay";
994
995	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
996
997	vcc-supply = <&vreg_l20a_2p95>;
998	vcc-max-microamp = <800000>;
999};
1000
1001&ufs_mem_phy {
1002	status = "okay";
1003
1004	vdda-phy-supply = <&vreg_l1a_0p875>;
1005	vdda-pll-supply = <&vreg_l26a_1p2>;
1006};
1007
1008&venus {
1009	status = "okay";
1010};
1011
1012&wcd9340{
1013	pinctrl-0 = <&wcd_intr_default>;
1014	pinctrl-names = "default";
1015	clock-names = "extclk";
1016	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
1017	reset-gpios = <&tlmm 64 0>;
1018	vdd-buck-supply = <&vreg_s4a_1p8>;
1019	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1020	vdd-tx-supply = <&vreg_s4a_1p8>;
1021	vdd-rx-supply = <&vreg_s4a_1p8>;
1022	vdd-io-supply = <&vreg_s4a_1p8>;
1023
1024	swm: swm@c85 {
1025		left_spkr: wsa8810-left{
1026			compatible = "sdw10217201000";
1027			reg = <0 1>;
1028			powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1029			#thermal-sensor-cells = <0>;
1030			sound-name-prefix = "SpkrLeft";
1031			#sound-dai-cells = <0>;
1032		};
1033
1034		right_spkr: wsa8810-right{
1035			compatible = "sdw10217201000";
1036			powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1037			reg = <0 2>;
1038			#thermal-sensor-cells = <0>;
1039			sound-name-prefix = "SpkrRight";
1040			#sound-dai-cells = <0>;
1041		};
1042	};
1043};
1044
1045&wifi {
1046	status = "okay";
1047
1048	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1049	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1050	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1051	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1052
1053	qcom,snoc-host-cap-8bit-quirk;
1054};
1055
1056/* PINCTRL - additions to nodes defined in sdm845.dtsi */
1057&qup_spi2_default {
1058	drive-strength = <16>;
1059};
1060
1061&qup_uart3_default{
1062	pinmux {
1063		pins = "gpio41", "gpio42", "gpio43", "gpio44";
1064		function = "qup3";
1065	};
1066};
1067
1068&qup_i2c10_default {
1069	pinconf {
1070		pins = "gpio55", "gpio56";
1071		drive-strength = <2>;
1072		bias-disable;
1073	};
1074};
1075
1076&qup_uart6_default {
1077	pinmux {
1078		pins = "gpio45", "gpio46", "gpio47", "gpio48";
1079		function = "qup6";
1080	};
1081
1082	cts {
1083		pins = "gpio45";
1084		bias-disable;
1085	};
1086
1087	rts-tx {
1088		pins = "gpio46", "gpio47";
1089		drive-strength = <2>;
1090		bias-disable;
1091	};
1092
1093	rx {
1094		pins = "gpio48";
1095		bias-pull-up;
1096	};
1097};
1098
1099&qup_uart9_default {
1100	pinconf-tx {
1101		pins = "gpio4";
1102		drive-strength = <2>;
1103		bias-disable;
1104	};
1105
1106	pinconf-rx {
1107		pins = "gpio5";
1108		drive-strength = <2>;
1109		bias-pull-up;
1110	};
1111};
1112
1113&pm8998_gpio {
1114
1115};
1116
1117&cci {
1118	status = "okay";
1119};
1120
1121&camss {
1122	vdda-supply = <&vreg_l1a_0p875>;
1123
1124	status = "ok";
1125
1126	ports {
1127		#address-cells = <1>;
1128		#size-cells = <0>;
1129		port@0 {
1130			reg = <0>;
1131			csiphy0_ep: endpoint {
1132				data-lanes = <0 1 2 3>;
1133				remote-endpoint = <&ov8856_ep>;
1134			};
1135		};
1136	};
1137};
1138
1139&cci_i2c0 {
1140	camera@10 {
1141		compatible = "ovti,ov8856";
1142		reg = <0x10>;
1143
1144		// CAM0_RST_N
1145		reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
1146		pinctrl-names = "default";
1147		pinctrl-0 = <&cam0_default>;
1148		gpios = <&tlmm 13 0>,
1149			<&tlmm 9 GPIO_ACTIVE_LOW>;
1150
1151		clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
1152		clock-names = "xvclk";
1153		clock-frequency = <19200000>;
1154
1155		/* The &vreg_s4a_1p8 trace is powered on as a,
1156		 * so it is represented by a fixed regulator.
1157		 *
1158		 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
1159		 * both have to be enabled through the power management
1160		 * gpios.
1161		 */
1162		power-domains = <&clock_camcc TITAN_TOP_GDSC>;
1163
1164		dovdd-supply = <&vreg_lvs1a_1p8>;
1165		avdd-supply = <&cam0_avdd_2v8>;
1166		dvdd-supply = <&cam0_dvdd_1v2>;
1167
1168		status = "ok";
1169
1170		port {
1171			ov8856_ep: endpoint {
1172				link-frequencies = /bits/ 64
1173					<360000000 180000000>;
1174				data-lanes = <1 2 3 4>;
1175				remote-endpoint = <&csiphy0_ep>;
1176			};
1177		};
1178	};
1179};
1180
1181&cci_i2c1 {
1182	camera@60 {
1183		compatible = "ovti,ov7251";
1184
1185		// I2C address as per ov7251.txt linux documentation
1186		reg = <0x60>;
1187
1188		// CAM3_RST_N
1189		enable-gpios = <&tlmm 21 0>;
1190		pinctrl-names = "default";
1191		pinctrl-0 = <&cam3_default>;
1192		gpios = <&tlmm 16 0>,
1193			<&tlmm 21 0>;
1194
1195		clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
1196		clock-names = "xclk";
1197		clock-frequency = <24000000>;
1198
1199		/* The &vreg_s4a_1p8 trace always powered on.
1200		 *
1201		 * The 2.8V vdda-supply regulator is enabled when the
1202		 * vreg_s4a_1p8 trace is pulled high.
1203		 * It too is represented by a fixed regulator.
1204		 *
1205		 * No 1.2V vddd-supply regulator is used.
1206		 */
1207		power-domains = <&clock_camcc TITAN_TOP_GDSC>;
1208
1209		vdddo-supply = <&vreg_lvs1a_1p8>;
1210		vdda-supply = <&cam3_avdd_2v8>;
1211
1212		status = "disable";
1213
1214		port {
1215			ov7251_ep: endpoint {
1216				data-lanes = <0 1>;
1217//				remote-endpoint = <&csiphy3_ep>;
1218			};
1219		};
1220	};
1221};
1222