1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7796-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a7796"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c_dvfs; 28 }; 29 30 /* 31 * The external audio clocks are configured as 0 Hz fixed frequency 32 * clocks by default. 33 * Boards that provide audio clocks should override them. 34 */ 35 audio_clk_a: audio_clk_a { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_b: audio_clk_b { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 audio_clk_c: audio_clk_c { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 /* External CAN clock - to be overridden by boards that provide it */ 54 can_clk: can { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 cluster0_opp: opp_table0 { 61 compatible = "operating-points-v2"; 62 opp-shared; 63 64 opp-500000000 { 65 opp-hz = /bits/ 64 <500000000>; 66 opp-microvolt = <820000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1000000000 { 70 opp-hz = /bits/ 64 <1000000000>; 71 opp-microvolt = <820000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1500000000 { 75 opp-hz = /bits/ 64 <1500000000>; 76 opp-microvolt = <820000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1600000000 { 80 opp-hz = /bits/ 64 <1600000000>; 81 opp-microvolt = <900000>; 82 clock-latency-ns = <300000>; 83 turbo-mode; 84 }; 85 opp-1700000000 { 86 opp-hz = /bits/ 64 <1700000000>; 87 opp-microvolt = <900000>; 88 clock-latency-ns = <300000>; 89 turbo-mode; 90 }; 91 opp-1800000000 { 92 opp-hz = /bits/ 64 <1800000000>; 93 opp-microvolt = <960000>; 94 clock-latency-ns = <300000>; 95 turbo-mode; 96 }; 97 }; 98 99 cluster1_opp: opp_table1 { 100 compatible = "operating-points-v2"; 101 opp-shared; 102 103 opp-800000000 { 104 opp-hz = /bits/ 64 <800000000>; 105 opp-microvolt = <820000>; 106 clock-latency-ns = <300000>; 107 }; 108 opp-1000000000 { 109 opp-hz = /bits/ 64 <1000000000>; 110 opp-microvolt = <820000>; 111 clock-latency-ns = <300000>; 112 }; 113 opp-1200000000 { 114 opp-hz = /bits/ 64 <1200000000>; 115 opp-microvolt = <820000>; 116 clock-latency-ns = <300000>; 117 }; 118 opp-1300000000 { 119 opp-hz = /bits/ 64 <1300000000>; 120 opp-microvolt = <820000>; 121 clock-latency-ns = <300000>; 122 turbo-mode; 123 }; 124 }; 125 126 cpus { 127 #address-cells = <1>; 128 #size-cells = <0>; 129 130 cpu-map { 131 cluster0 { 132 core0 { 133 cpu = <&a57_0>; 134 }; 135 core1 { 136 cpu = <&a57_1>; 137 }; 138 }; 139 140 cluster1 { 141 core0 { 142 cpu = <&a53_0>; 143 }; 144 core1 { 145 cpu = <&a53_1>; 146 }; 147 core2 { 148 cpu = <&a53_2>; 149 }; 150 core3 { 151 cpu = <&a53_3>; 152 }; 153 }; 154 }; 155 156 a57_0: cpu@0 { 157 compatible = "arm,cortex-a57"; 158 reg = <0x0>; 159 device_type = "cpu"; 160 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 161 next-level-cache = <&L2_CA57>; 162 enable-method = "psci"; 163 cpu-idle-states = <&CPU_SLEEP_0>; 164 dynamic-power-coefficient = <854>; 165 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 166 operating-points-v2 = <&cluster0_opp>; 167 capacity-dmips-mhz = <1024>; 168 #cooling-cells = <2>; 169 }; 170 171 a57_1: cpu@1 { 172 compatible = "arm,cortex-a57"; 173 reg = <0x1>; 174 device_type = "cpu"; 175 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 176 next-level-cache = <&L2_CA57>; 177 enable-method = "psci"; 178 cpu-idle-states = <&CPU_SLEEP_0>; 179 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 180 operating-points-v2 = <&cluster0_opp>; 181 capacity-dmips-mhz = <1024>; 182 #cooling-cells = <2>; 183 }; 184 185 a53_0: cpu@100 { 186 compatible = "arm,cortex-a53"; 187 reg = <0x100>; 188 device_type = "cpu"; 189 power-domains = <&sysc R8A7796_PD_CA53_CPU0>; 190 next-level-cache = <&L2_CA53>; 191 enable-method = "psci"; 192 cpu-idle-states = <&CPU_SLEEP_1>; 193 #cooling-cells = <2>; 194 dynamic-power-coefficient = <277>; 195 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 196 operating-points-v2 = <&cluster1_opp>; 197 capacity-dmips-mhz = <535>; 198 }; 199 200 a53_1: cpu@101 { 201 compatible = "arm,cortex-a53"; 202 reg = <0x101>; 203 device_type = "cpu"; 204 power-domains = <&sysc R8A7796_PD_CA53_CPU1>; 205 next-level-cache = <&L2_CA53>; 206 enable-method = "psci"; 207 cpu-idle-states = <&CPU_SLEEP_1>; 208 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 209 operating-points-v2 = <&cluster1_opp>; 210 capacity-dmips-mhz = <535>; 211 }; 212 213 a53_2: cpu@102 { 214 compatible = "arm,cortex-a53"; 215 reg = <0x102>; 216 device_type = "cpu"; 217 power-domains = <&sysc R8A7796_PD_CA53_CPU2>; 218 next-level-cache = <&L2_CA53>; 219 enable-method = "psci"; 220 cpu-idle-states = <&CPU_SLEEP_1>; 221 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 222 operating-points-v2 = <&cluster1_opp>; 223 capacity-dmips-mhz = <535>; 224 }; 225 226 a53_3: cpu@103 { 227 compatible = "arm,cortex-a53"; 228 reg = <0x103>; 229 device_type = "cpu"; 230 power-domains = <&sysc R8A7796_PD_CA53_CPU3>; 231 next-level-cache = <&L2_CA53>; 232 enable-method = "psci"; 233 cpu-idle-states = <&CPU_SLEEP_1>; 234 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 235 operating-points-v2 = <&cluster1_opp>; 236 capacity-dmips-mhz = <535>; 237 }; 238 239 L2_CA57: cache-controller-0 { 240 compatible = "cache"; 241 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 242 cache-unified; 243 cache-level = <2>; 244 }; 245 246 L2_CA53: cache-controller-1 { 247 compatible = "cache"; 248 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 249 cache-unified; 250 cache-level = <2>; 251 }; 252 253 idle-states { 254 entry-method = "psci"; 255 256 CPU_SLEEP_0: cpu-sleep-0 { 257 compatible = "arm,idle-state"; 258 arm,psci-suspend-param = <0x0010000>; 259 local-timer-stop; 260 entry-latency-us = <400>; 261 exit-latency-us = <500>; 262 min-residency-us = <4000>; 263 }; 264 265 CPU_SLEEP_1: cpu-sleep-1 { 266 compatible = "arm,idle-state"; 267 arm,psci-suspend-param = <0x0010000>; 268 local-timer-stop; 269 entry-latency-us = <700>; 270 exit-latency-us = <700>; 271 min-residency-us = <5000>; 272 }; 273 }; 274 }; 275 276 extal_clk: extal { 277 compatible = "fixed-clock"; 278 #clock-cells = <0>; 279 /* This value must be overridden by the board */ 280 clock-frequency = <0>; 281 }; 282 283 extalr_clk: extalr { 284 compatible = "fixed-clock"; 285 #clock-cells = <0>; 286 /* This value must be overridden by the board */ 287 clock-frequency = <0>; 288 }; 289 290 /* External PCIe clock - can be overridden by the board */ 291 pcie_bus_clk: pcie_bus { 292 compatible = "fixed-clock"; 293 #clock-cells = <0>; 294 clock-frequency = <0>; 295 }; 296 297 pmu_a53 { 298 compatible = "arm,cortex-a53-pmu"; 299 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 300 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 301 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 302 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 303 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 304 }; 305 306 pmu_a57 { 307 compatible = "arm,cortex-a57-pmu"; 308 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 309 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 310 interrupt-affinity = <&a57_0>, <&a57_1>; 311 }; 312 313 psci { 314 compatible = "arm,psci-1.0", "arm,psci-0.2"; 315 method = "smc"; 316 }; 317 318 /* External SCIF clock - to be overridden by boards that provide it */ 319 scif_clk: scif { 320 compatible = "fixed-clock"; 321 #clock-cells = <0>; 322 clock-frequency = <0>; 323 }; 324 325 soc { 326 compatible = "simple-bus"; 327 interrupt-parent = <&gic>; 328 #address-cells = <2>; 329 #size-cells = <2>; 330 ranges; 331 332 rwdt: watchdog@e6020000 { 333 compatible = "renesas,r8a7796-wdt", 334 "renesas,rcar-gen3-wdt"; 335 reg = <0 0xe6020000 0 0x0c>; 336 clocks = <&cpg CPG_MOD 402>; 337 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 338 resets = <&cpg 402>; 339 status = "disabled"; 340 }; 341 342 gpio0: gpio@e6050000 { 343 compatible = "renesas,gpio-r8a7796", 344 "renesas,rcar-gen3-gpio"; 345 reg = <0 0xe6050000 0 0x50>; 346 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 347 #gpio-cells = <2>; 348 gpio-controller; 349 gpio-ranges = <&pfc 0 0 16>; 350 #interrupt-cells = <2>; 351 interrupt-controller; 352 clocks = <&cpg CPG_MOD 912>; 353 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 354 resets = <&cpg 912>; 355 }; 356 357 gpio1: gpio@e6051000 { 358 compatible = "renesas,gpio-r8a7796", 359 "renesas,rcar-gen3-gpio"; 360 reg = <0 0xe6051000 0 0x50>; 361 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 362 #gpio-cells = <2>; 363 gpio-controller; 364 gpio-ranges = <&pfc 0 32 29>; 365 #interrupt-cells = <2>; 366 interrupt-controller; 367 clocks = <&cpg CPG_MOD 911>; 368 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 369 resets = <&cpg 911>; 370 }; 371 372 gpio2: gpio@e6052000 { 373 compatible = "renesas,gpio-r8a7796", 374 "renesas,rcar-gen3-gpio"; 375 reg = <0 0xe6052000 0 0x50>; 376 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 377 #gpio-cells = <2>; 378 gpio-controller; 379 gpio-ranges = <&pfc 0 64 15>; 380 #interrupt-cells = <2>; 381 interrupt-controller; 382 clocks = <&cpg CPG_MOD 910>; 383 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 384 resets = <&cpg 910>; 385 }; 386 387 gpio3: gpio@e6053000 { 388 compatible = "renesas,gpio-r8a7796", 389 "renesas,rcar-gen3-gpio"; 390 reg = <0 0xe6053000 0 0x50>; 391 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 392 #gpio-cells = <2>; 393 gpio-controller; 394 gpio-ranges = <&pfc 0 96 16>; 395 #interrupt-cells = <2>; 396 interrupt-controller; 397 clocks = <&cpg CPG_MOD 909>; 398 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 399 resets = <&cpg 909>; 400 }; 401 402 gpio4: gpio@e6054000 { 403 compatible = "renesas,gpio-r8a7796", 404 "renesas,rcar-gen3-gpio"; 405 reg = <0 0xe6054000 0 0x50>; 406 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 407 #gpio-cells = <2>; 408 gpio-controller; 409 gpio-ranges = <&pfc 0 128 18>; 410 #interrupt-cells = <2>; 411 interrupt-controller; 412 clocks = <&cpg CPG_MOD 908>; 413 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 414 resets = <&cpg 908>; 415 }; 416 417 gpio5: gpio@e6055000 { 418 compatible = "renesas,gpio-r8a7796", 419 "renesas,rcar-gen3-gpio"; 420 reg = <0 0xe6055000 0 0x50>; 421 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 422 #gpio-cells = <2>; 423 gpio-controller; 424 gpio-ranges = <&pfc 0 160 26>; 425 #interrupt-cells = <2>; 426 interrupt-controller; 427 clocks = <&cpg CPG_MOD 907>; 428 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 429 resets = <&cpg 907>; 430 }; 431 432 gpio6: gpio@e6055400 { 433 compatible = "renesas,gpio-r8a7796", 434 "renesas,rcar-gen3-gpio"; 435 reg = <0 0xe6055400 0 0x50>; 436 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 437 #gpio-cells = <2>; 438 gpio-controller; 439 gpio-ranges = <&pfc 0 192 32>; 440 #interrupt-cells = <2>; 441 interrupt-controller; 442 clocks = <&cpg CPG_MOD 906>; 443 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 444 resets = <&cpg 906>; 445 }; 446 447 gpio7: gpio@e6055800 { 448 compatible = "renesas,gpio-r8a7796", 449 "renesas,rcar-gen3-gpio"; 450 reg = <0 0xe6055800 0 0x50>; 451 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 452 #gpio-cells = <2>; 453 gpio-controller; 454 gpio-ranges = <&pfc 0 224 4>; 455 #interrupt-cells = <2>; 456 interrupt-controller; 457 clocks = <&cpg CPG_MOD 905>; 458 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 459 resets = <&cpg 905>; 460 }; 461 462 pfc: pinctrl@e6060000 { 463 compatible = "renesas,pfc-r8a7796"; 464 reg = <0 0xe6060000 0 0x50c>; 465 }; 466 467 cmt0: timer@e60f0000 { 468 compatible = "renesas,r8a7796-cmt0", 469 "renesas,rcar-gen3-cmt0"; 470 reg = <0 0xe60f0000 0 0x1004>; 471 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 472 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 473 clocks = <&cpg CPG_MOD 303>; 474 clock-names = "fck"; 475 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 476 resets = <&cpg 303>; 477 status = "disabled"; 478 }; 479 480 cmt1: timer@e6130000 { 481 compatible = "renesas,r8a7796-cmt1", 482 "renesas,rcar-gen3-cmt1"; 483 reg = <0 0xe6130000 0 0x1004>; 484 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 485 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 486 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 492 clocks = <&cpg CPG_MOD 302>; 493 clock-names = "fck"; 494 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 495 resets = <&cpg 302>; 496 status = "disabled"; 497 }; 498 499 cmt2: timer@e6140000 { 500 compatible = "renesas,r8a7796-cmt1", 501 "renesas,rcar-gen3-cmt1"; 502 reg = <0 0xe6140000 0 0x1004>; 503 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 504 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 505 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 506 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 507 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 508 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 510 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 511 clocks = <&cpg CPG_MOD 301>; 512 clock-names = "fck"; 513 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 514 resets = <&cpg 301>; 515 status = "disabled"; 516 }; 517 518 cmt3: timer@e6148000 { 519 compatible = "renesas,r8a7796-cmt1", 520 "renesas,rcar-gen3-cmt1"; 521 reg = <0 0xe6148000 0 0x1004>; 522 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 523 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 524 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 300>; 531 clock-names = "fck"; 532 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 533 resets = <&cpg 300>; 534 status = "disabled"; 535 }; 536 537 cpg: clock-controller@e6150000 { 538 compatible = "renesas,r8a7796-cpg-mssr"; 539 reg = <0 0xe6150000 0 0x1000>; 540 clocks = <&extal_clk>, <&extalr_clk>; 541 clock-names = "extal", "extalr"; 542 #clock-cells = <2>; 543 #power-domain-cells = <0>; 544 #reset-cells = <1>; 545 }; 546 547 rst: reset-controller@e6160000 { 548 compatible = "renesas,r8a7796-rst"; 549 reg = <0 0xe6160000 0 0x0200>; 550 }; 551 552 sysc: system-controller@e6180000 { 553 compatible = "renesas,r8a7796-sysc"; 554 reg = <0 0xe6180000 0 0x0400>; 555 #power-domain-cells = <1>; 556 }; 557 558 tsc: thermal@e6198000 { 559 compatible = "renesas,r8a7796-thermal"; 560 reg = <0 0xe6198000 0 0x100>, 561 <0 0xe61a0000 0 0x100>, 562 <0 0xe61a8000 0 0x100>; 563 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 564 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 565 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 566 clocks = <&cpg CPG_MOD 522>; 567 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 568 resets = <&cpg 522>; 569 #thermal-sensor-cells = <1>; 570 }; 571 572 intc_ex: interrupt-controller@e61c0000 { 573 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; 574 #interrupt-cells = <2>; 575 interrupt-controller; 576 reg = <0 0xe61c0000 0 0x200>; 577 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 578 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 579 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 580 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 581 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&cpg CPG_MOD 407>; 584 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 585 resets = <&cpg 407>; 586 }; 587 588 i2c0: i2c@e6500000 { 589 #address-cells = <1>; 590 #size-cells = <0>; 591 compatible = "renesas,i2c-r8a7796", 592 "renesas,rcar-gen3-i2c"; 593 reg = <0 0xe6500000 0 0x40>; 594 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 931>; 596 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 597 resets = <&cpg 931>; 598 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 599 <&dmac2 0x91>, <&dmac2 0x90>; 600 dma-names = "tx", "rx", "tx", "rx"; 601 i2c-scl-internal-delay-ns = <110>; 602 status = "disabled"; 603 }; 604 605 i2c1: i2c@e6508000 { 606 #address-cells = <1>; 607 #size-cells = <0>; 608 compatible = "renesas,i2c-r8a7796", 609 "renesas,rcar-gen3-i2c"; 610 reg = <0 0xe6508000 0 0x40>; 611 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 930>; 613 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 614 resets = <&cpg 930>; 615 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 616 <&dmac2 0x93>, <&dmac2 0x92>; 617 dma-names = "tx", "rx", "tx", "rx"; 618 i2c-scl-internal-delay-ns = <6>; 619 status = "disabled"; 620 }; 621 622 i2c2: i2c@e6510000 { 623 #address-cells = <1>; 624 #size-cells = <0>; 625 compatible = "renesas,i2c-r8a7796", 626 "renesas,rcar-gen3-i2c"; 627 reg = <0 0xe6510000 0 0x40>; 628 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&cpg CPG_MOD 929>; 630 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 631 resets = <&cpg 929>; 632 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 633 <&dmac2 0x95>, <&dmac2 0x94>; 634 dma-names = "tx", "rx", "tx", "rx"; 635 i2c-scl-internal-delay-ns = <6>; 636 status = "disabled"; 637 }; 638 639 i2c3: i2c@e66d0000 { 640 #address-cells = <1>; 641 #size-cells = <0>; 642 compatible = "renesas,i2c-r8a7796", 643 "renesas,rcar-gen3-i2c"; 644 reg = <0 0xe66d0000 0 0x40>; 645 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 646 clocks = <&cpg CPG_MOD 928>; 647 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 648 resets = <&cpg 928>; 649 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 650 dma-names = "tx", "rx"; 651 i2c-scl-internal-delay-ns = <110>; 652 status = "disabled"; 653 }; 654 655 i2c4: i2c@e66d8000 { 656 #address-cells = <1>; 657 #size-cells = <0>; 658 compatible = "renesas,i2c-r8a7796", 659 "renesas,rcar-gen3-i2c"; 660 reg = <0 0xe66d8000 0 0x40>; 661 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 927>; 663 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 664 resets = <&cpg 927>; 665 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 666 dma-names = "tx", "rx"; 667 i2c-scl-internal-delay-ns = <110>; 668 status = "disabled"; 669 }; 670 671 i2c5: i2c@e66e0000 { 672 #address-cells = <1>; 673 #size-cells = <0>; 674 compatible = "renesas,i2c-r8a7796", 675 "renesas,rcar-gen3-i2c"; 676 reg = <0 0xe66e0000 0 0x40>; 677 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 678 clocks = <&cpg CPG_MOD 919>; 679 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 680 resets = <&cpg 919>; 681 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 682 dma-names = "tx", "rx"; 683 i2c-scl-internal-delay-ns = <110>; 684 status = "disabled"; 685 }; 686 687 i2c6: i2c@e66e8000 { 688 #address-cells = <1>; 689 #size-cells = <0>; 690 compatible = "renesas,i2c-r8a7796", 691 "renesas,rcar-gen3-i2c"; 692 reg = <0 0xe66e8000 0 0x40>; 693 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 694 clocks = <&cpg CPG_MOD 918>; 695 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 696 resets = <&cpg 918>; 697 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 698 dma-names = "tx", "rx"; 699 i2c-scl-internal-delay-ns = <6>; 700 status = "disabled"; 701 }; 702 703 i2c_dvfs: i2c@e60b0000 { 704 #address-cells = <1>; 705 #size-cells = <0>; 706 compatible = "renesas,iic-r8a7796", 707 "renesas,rcar-gen3-iic", 708 "renesas,rmobile-iic"; 709 reg = <0 0xe60b0000 0 0x425>; 710 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 711 clocks = <&cpg CPG_MOD 926>; 712 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 713 resets = <&cpg 926>; 714 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 715 dma-names = "tx", "rx"; 716 status = "disabled"; 717 }; 718 719 hscif0: serial@e6540000 { 720 compatible = "renesas,hscif-r8a7796", 721 "renesas,rcar-gen3-hscif", 722 "renesas,hscif"; 723 reg = <0 0xe6540000 0 0x60>; 724 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 725 clocks = <&cpg CPG_MOD 520>, 726 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 727 <&scif_clk>; 728 clock-names = "fck", "brg_int", "scif_clk"; 729 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 730 <&dmac2 0x31>, <&dmac2 0x30>; 731 dma-names = "tx", "rx", "tx", "rx"; 732 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 733 resets = <&cpg 520>; 734 status = "disabled"; 735 }; 736 737 hscif1: serial@e6550000 { 738 compatible = "renesas,hscif-r8a7796", 739 "renesas,rcar-gen3-hscif", 740 "renesas,hscif"; 741 reg = <0 0xe6550000 0 0x60>; 742 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 743 clocks = <&cpg CPG_MOD 519>, 744 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 745 <&scif_clk>; 746 clock-names = "fck", "brg_int", "scif_clk"; 747 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 748 <&dmac2 0x33>, <&dmac2 0x32>; 749 dma-names = "tx", "rx", "tx", "rx"; 750 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 751 resets = <&cpg 519>; 752 status = "disabled"; 753 }; 754 755 hscif2: serial@e6560000 { 756 compatible = "renesas,hscif-r8a7796", 757 "renesas,rcar-gen3-hscif", 758 "renesas,hscif"; 759 reg = <0 0xe6560000 0 0x60>; 760 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 761 clocks = <&cpg CPG_MOD 518>, 762 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 763 <&scif_clk>; 764 clock-names = "fck", "brg_int", "scif_clk"; 765 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 766 <&dmac2 0x35>, <&dmac2 0x34>; 767 dma-names = "tx", "rx", "tx", "rx"; 768 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 769 resets = <&cpg 518>; 770 status = "disabled"; 771 }; 772 773 hscif3: serial@e66a0000 { 774 compatible = "renesas,hscif-r8a7796", 775 "renesas,rcar-gen3-hscif", 776 "renesas,hscif"; 777 reg = <0 0xe66a0000 0 0x60>; 778 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 779 clocks = <&cpg CPG_MOD 517>, 780 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 781 <&scif_clk>; 782 clock-names = "fck", "brg_int", "scif_clk"; 783 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 784 dma-names = "tx", "rx"; 785 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 786 resets = <&cpg 517>; 787 status = "disabled"; 788 }; 789 790 hscif4: serial@e66b0000 { 791 compatible = "renesas,hscif-r8a7796", 792 "renesas,rcar-gen3-hscif", 793 "renesas,hscif"; 794 reg = <0 0xe66b0000 0 0x60>; 795 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 796 clocks = <&cpg CPG_MOD 516>, 797 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 798 <&scif_clk>; 799 clock-names = "fck", "brg_int", "scif_clk"; 800 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 801 dma-names = "tx", "rx"; 802 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 803 resets = <&cpg 516>; 804 status = "disabled"; 805 }; 806 807 hsusb: usb@e6590000 { 808 compatible = "renesas,usbhs-r8a7796", 809 "renesas,rcar-gen3-usbhs"; 810 reg = <0 0xe6590000 0 0x200>; 811 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 812 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 813 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 814 <&usb_dmac1 0>, <&usb_dmac1 1>; 815 dma-names = "ch0", "ch1", "ch2", "ch3"; 816 renesas,buswait = <11>; 817 phys = <&usb2_phy0 3>; 818 phy-names = "usb"; 819 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 820 resets = <&cpg 704>, <&cpg 703>; 821 status = "disabled"; 822 }; 823 824 usb_dmac0: dma-controller@e65a0000 { 825 compatible = "renesas,r8a7796-usb-dmac", 826 "renesas,usb-dmac"; 827 reg = <0 0xe65a0000 0 0x100>; 828 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 830 interrupt-names = "ch0", "ch1"; 831 clocks = <&cpg CPG_MOD 330>; 832 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 833 resets = <&cpg 330>; 834 #dma-cells = <1>; 835 dma-channels = <2>; 836 }; 837 838 usb_dmac1: dma-controller@e65b0000 { 839 compatible = "renesas,r8a7796-usb-dmac", 840 "renesas,usb-dmac"; 841 reg = <0 0xe65b0000 0 0x100>; 842 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 843 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 844 interrupt-names = "ch0", "ch1"; 845 clocks = <&cpg CPG_MOD 331>; 846 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 847 resets = <&cpg 331>; 848 #dma-cells = <1>; 849 dma-channels = <2>; 850 }; 851 852 usb3_phy0: usb-phy@e65ee000 { 853 compatible = "renesas,r8a7796-usb3-phy", 854 "renesas,rcar-gen3-usb3-phy"; 855 reg = <0 0xe65ee000 0 0x90>; 856 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 857 <&usb_extal_clk>; 858 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 859 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 860 resets = <&cpg 328>; 861 #phy-cells = <0>; 862 status = "disabled"; 863 }; 864 865 arm_cc630p: crypto@e6601000 { 866 compatible = "arm,cryptocell-630p-ree"; 867 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 868 reg = <0x0 0xe6601000 0 0x1000>; 869 clocks = <&cpg CPG_MOD 229>; 870 resets = <&cpg 229>; 871 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 872 }; 873 874 dmac0: dma-controller@e6700000 { 875 compatible = "renesas,dmac-r8a7796", 876 "renesas,rcar-dmac"; 877 reg = <0 0xe6700000 0 0x10000>; 878 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 895 interrupt-names = "error", 896 "ch0", "ch1", "ch2", "ch3", 897 "ch4", "ch5", "ch6", "ch7", 898 "ch8", "ch9", "ch10", "ch11", 899 "ch12", "ch13", "ch14", "ch15"; 900 clocks = <&cpg CPG_MOD 219>; 901 clock-names = "fck"; 902 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 903 resets = <&cpg 219>; 904 #dma-cells = <1>; 905 dma-channels = <16>; 906 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 907 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 908 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 909 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 910 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 911 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 912 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 913 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 914 }; 915 916 dmac1: dma-controller@e7300000 { 917 compatible = "renesas,dmac-r8a7796", 918 "renesas,rcar-dmac"; 919 reg = <0 0xe7300000 0 0x10000>; 920 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 921 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 922 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 923 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 924 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 926 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 927 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 928 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 929 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 930 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 931 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 932 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 933 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 936 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 937 interrupt-names = "error", 938 "ch0", "ch1", "ch2", "ch3", 939 "ch4", "ch5", "ch6", "ch7", 940 "ch8", "ch9", "ch10", "ch11", 941 "ch12", "ch13", "ch14", "ch15"; 942 clocks = <&cpg CPG_MOD 218>; 943 clock-names = "fck"; 944 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 945 resets = <&cpg 218>; 946 #dma-cells = <1>; 947 dma-channels = <16>; 948 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 949 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 950 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 951 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 952 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 953 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 954 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 955 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 956 }; 957 958 dmac2: dma-controller@e7310000 { 959 compatible = "renesas,dmac-r8a7796", 960 "renesas,rcar-dmac"; 961 reg = <0 0xe7310000 0 0x10000>; 962 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 979 interrupt-names = "error", 980 "ch0", "ch1", "ch2", "ch3", 981 "ch4", "ch5", "ch6", "ch7", 982 "ch8", "ch9", "ch10", "ch11", 983 "ch12", "ch13", "ch14", "ch15"; 984 clocks = <&cpg CPG_MOD 217>; 985 clock-names = "fck"; 986 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 987 resets = <&cpg 217>; 988 #dma-cells = <1>; 989 dma-channels = <16>; 990 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 991 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 992 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 993 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 994 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 995 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 996 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 997 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 998 }; 999 1000 ipmmu_ds0: iommu@e6740000 { 1001 compatible = "renesas,ipmmu-r8a7796"; 1002 reg = <0 0xe6740000 0 0x1000>; 1003 renesas,ipmmu-main = <&ipmmu_mm 0>; 1004 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1005 #iommu-cells = <1>; 1006 }; 1007 1008 ipmmu_ds1: iommu@e7740000 { 1009 compatible = "renesas,ipmmu-r8a7796"; 1010 reg = <0 0xe7740000 0 0x1000>; 1011 renesas,ipmmu-main = <&ipmmu_mm 1>; 1012 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1013 #iommu-cells = <1>; 1014 }; 1015 1016 ipmmu_hc: iommu@e6570000 { 1017 compatible = "renesas,ipmmu-r8a7796"; 1018 reg = <0 0xe6570000 0 0x1000>; 1019 renesas,ipmmu-main = <&ipmmu_mm 2>; 1020 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1021 #iommu-cells = <1>; 1022 }; 1023 1024 ipmmu_ir: iommu@ff8b0000 { 1025 compatible = "renesas,ipmmu-r8a7796"; 1026 reg = <0 0xff8b0000 0 0x1000>; 1027 renesas,ipmmu-main = <&ipmmu_mm 3>; 1028 power-domains = <&sysc R8A7796_PD_A3IR>; 1029 #iommu-cells = <1>; 1030 }; 1031 1032 ipmmu_mm: iommu@e67b0000 { 1033 compatible = "renesas,ipmmu-r8a7796"; 1034 reg = <0 0xe67b0000 0 0x1000>; 1035 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1037 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1038 #iommu-cells = <1>; 1039 }; 1040 1041 ipmmu_mp: iommu@ec670000 { 1042 compatible = "renesas,ipmmu-r8a7796"; 1043 reg = <0 0xec670000 0 0x1000>; 1044 renesas,ipmmu-main = <&ipmmu_mm 4>; 1045 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1046 #iommu-cells = <1>; 1047 }; 1048 1049 ipmmu_pv0: iommu@fd800000 { 1050 compatible = "renesas,ipmmu-r8a7796"; 1051 reg = <0 0xfd800000 0 0x1000>; 1052 renesas,ipmmu-main = <&ipmmu_mm 5>; 1053 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1054 #iommu-cells = <1>; 1055 }; 1056 1057 ipmmu_pv1: iommu@fd950000 { 1058 compatible = "renesas,ipmmu-r8a7796"; 1059 reg = <0 0xfd950000 0 0x1000>; 1060 renesas,ipmmu-main = <&ipmmu_mm 6>; 1061 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1062 #iommu-cells = <1>; 1063 }; 1064 1065 ipmmu_rt: iommu@ffc80000 { 1066 compatible = "renesas,ipmmu-r8a7796"; 1067 reg = <0 0xffc80000 0 0x1000>; 1068 renesas,ipmmu-main = <&ipmmu_mm 7>; 1069 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1070 #iommu-cells = <1>; 1071 }; 1072 1073 ipmmu_vc0: iommu@fe6b0000 { 1074 compatible = "renesas,ipmmu-r8a7796"; 1075 reg = <0 0xfe6b0000 0 0x1000>; 1076 renesas,ipmmu-main = <&ipmmu_mm 8>; 1077 power-domains = <&sysc R8A7796_PD_A3VC>; 1078 #iommu-cells = <1>; 1079 }; 1080 1081 ipmmu_vi0: iommu@febd0000 { 1082 compatible = "renesas,ipmmu-r8a7796"; 1083 reg = <0 0xfebd0000 0 0x1000>; 1084 renesas,ipmmu-main = <&ipmmu_mm 9>; 1085 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1086 #iommu-cells = <1>; 1087 }; 1088 1089 avb: ethernet@e6800000 { 1090 compatible = "renesas,etheravb-r8a7796", 1091 "renesas,etheravb-rcar-gen3"; 1092 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1093 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1094 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1095 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1096 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1097 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1098 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1099 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1100 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1101 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1102 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1103 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1104 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1105 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1106 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1107 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1108 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1109 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1110 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1111 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1112 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1113 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1114 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1115 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1116 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1117 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1118 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1119 "ch4", "ch5", "ch6", "ch7", 1120 "ch8", "ch9", "ch10", "ch11", 1121 "ch12", "ch13", "ch14", "ch15", 1122 "ch16", "ch17", "ch18", "ch19", 1123 "ch20", "ch21", "ch22", "ch23", 1124 "ch24"; 1125 clocks = <&cpg CPG_MOD 812>; 1126 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1127 resets = <&cpg 812>; 1128 phy-mode = "rgmii"; 1129 iommus = <&ipmmu_ds0 16>; 1130 #address-cells = <1>; 1131 #size-cells = <0>; 1132 status = "disabled"; 1133 }; 1134 1135 can0: can@e6c30000 { 1136 compatible = "renesas,can-r8a7796", 1137 "renesas,rcar-gen3-can"; 1138 reg = <0 0xe6c30000 0 0x1000>; 1139 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1140 clocks = <&cpg CPG_MOD 916>, 1141 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1142 <&can_clk>; 1143 clock-names = "clkp1", "clkp2", "can_clk"; 1144 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1145 assigned-clock-rates = <40000000>; 1146 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1147 resets = <&cpg 916>; 1148 status = "disabled"; 1149 }; 1150 1151 can1: can@e6c38000 { 1152 compatible = "renesas,can-r8a7796", 1153 "renesas,rcar-gen3-can"; 1154 reg = <0 0xe6c38000 0 0x1000>; 1155 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1156 clocks = <&cpg CPG_MOD 915>, 1157 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1158 <&can_clk>; 1159 clock-names = "clkp1", "clkp2", "can_clk"; 1160 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1161 assigned-clock-rates = <40000000>; 1162 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1163 resets = <&cpg 915>; 1164 status = "disabled"; 1165 }; 1166 1167 canfd: can@e66c0000 { 1168 compatible = "renesas,r8a7796-canfd", 1169 "renesas,rcar-gen3-canfd"; 1170 reg = <0 0xe66c0000 0 0x8000>; 1171 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1172 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1173 clocks = <&cpg CPG_MOD 914>, 1174 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1175 <&can_clk>; 1176 clock-names = "fck", "canfd", "can_clk"; 1177 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1178 assigned-clock-rates = <40000000>; 1179 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1180 resets = <&cpg 914>; 1181 status = "disabled"; 1182 1183 channel0 { 1184 status = "disabled"; 1185 }; 1186 1187 channel1 { 1188 status = "disabled"; 1189 }; 1190 }; 1191 1192 pwm0: pwm@e6e30000 { 1193 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1194 reg = <0 0xe6e30000 0 8>; 1195 #pwm-cells = <2>; 1196 clocks = <&cpg CPG_MOD 523>; 1197 resets = <&cpg 523>; 1198 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1199 status = "disabled"; 1200 }; 1201 1202 pwm1: pwm@e6e31000 { 1203 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1204 reg = <0 0xe6e31000 0 8>; 1205 #pwm-cells = <2>; 1206 clocks = <&cpg CPG_MOD 523>; 1207 resets = <&cpg 523>; 1208 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1209 status = "disabled"; 1210 }; 1211 1212 pwm2: pwm@e6e32000 { 1213 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1214 reg = <0 0xe6e32000 0 8>; 1215 #pwm-cells = <2>; 1216 clocks = <&cpg CPG_MOD 523>; 1217 resets = <&cpg 523>; 1218 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1219 status = "disabled"; 1220 }; 1221 1222 pwm3: pwm@e6e33000 { 1223 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1224 reg = <0 0xe6e33000 0 8>; 1225 #pwm-cells = <2>; 1226 clocks = <&cpg CPG_MOD 523>; 1227 resets = <&cpg 523>; 1228 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1229 status = "disabled"; 1230 }; 1231 1232 pwm4: pwm@e6e34000 { 1233 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1234 reg = <0 0xe6e34000 0 8>; 1235 #pwm-cells = <2>; 1236 clocks = <&cpg CPG_MOD 523>; 1237 resets = <&cpg 523>; 1238 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1239 status = "disabled"; 1240 }; 1241 1242 pwm5: pwm@e6e35000 { 1243 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1244 reg = <0 0xe6e35000 0 8>; 1245 #pwm-cells = <2>; 1246 clocks = <&cpg CPG_MOD 523>; 1247 resets = <&cpg 523>; 1248 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1249 status = "disabled"; 1250 }; 1251 1252 pwm6: pwm@e6e36000 { 1253 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1254 reg = <0 0xe6e36000 0 8>; 1255 #pwm-cells = <2>; 1256 clocks = <&cpg CPG_MOD 523>; 1257 resets = <&cpg 523>; 1258 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1259 status = "disabled"; 1260 }; 1261 1262 scif0: serial@e6e60000 { 1263 compatible = "renesas,scif-r8a7796", 1264 "renesas,rcar-gen3-scif", "renesas,scif"; 1265 reg = <0 0xe6e60000 0 64>; 1266 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1267 clocks = <&cpg CPG_MOD 207>, 1268 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1269 <&scif_clk>; 1270 clock-names = "fck", "brg_int", "scif_clk"; 1271 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1272 <&dmac2 0x51>, <&dmac2 0x50>; 1273 dma-names = "tx", "rx", "tx", "rx"; 1274 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1275 resets = <&cpg 207>; 1276 status = "disabled"; 1277 }; 1278 1279 scif1: serial@e6e68000 { 1280 compatible = "renesas,scif-r8a7796", 1281 "renesas,rcar-gen3-scif", "renesas,scif"; 1282 reg = <0 0xe6e68000 0 64>; 1283 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1284 clocks = <&cpg CPG_MOD 206>, 1285 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1286 <&scif_clk>; 1287 clock-names = "fck", "brg_int", "scif_clk"; 1288 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1289 <&dmac2 0x53>, <&dmac2 0x52>; 1290 dma-names = "tx", "rx", "tx", "rx"; 1291 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1292 resets = <&cpg 206>; 1293 status = "disabled"; 1294 }; 1295 1296 scif2: serial@e6e88000 { 1297 compatible = "renesas,scif-r8a7796", 1298 "renesas,rcar-gen3-scif", "renesas,scif"; 1299 reg = <0 0xe6e88000 0 64>; 1300 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1301 clocks = <&cpg CPG_MOD 310>, 1302 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1303 <&scif_clk>; 1304 clock-names = "fck", "brg_int", "scif_clk"; 1305 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1306 <&dmac2 0x13>, <&dmac2 0x12>; 1307 dma-names = "tx", "rx", "tx", "rx"; 1308 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1309 resets = <&cpg 310>; 1310 status = "disabled"; 1311 }; 1312 1313 scif3: serial@e6c50000 { 1314 compatible = "renesas,scif-r8a7796", 1315 "renesas,rcar-gen3-scif", "renesas,scif"; 1316 reg = <0 0xe6c50000 0 64>; 1317 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1318 clocks = <&cpg CPG_MOD 204>, 1319 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1320 <&scif_clk>; 1321 clock-names = "fck", "brg_int", "scif_clk"; 1322 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1323 dma-names = "tx", "rx"; 1324 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1325 resets = <&cpg 204>; 1326 status = "disabled"; 1327 }; 1328 1329 scif4: serial@e6c40000 { 1330 compatible = "renesas,scif-r8a7796", 1331 "renesas,rcar-gen3-scif", "renesas,scif"; 1332 reg = <0 0xe6c40000 0 64>; 1333 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1334 clocks = <&cpg CPG_MOD 203>, 1335 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1336 <&scif_clk>; 1337 clock-names = "fck", "brg_int", "scif_clk"; 1338 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1339 dma-names = "tx", "rx"; 1340 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1341 resets = <&cpg 203>; 1342 status = "disabled"; 1343 }; 1344 1345 scif5: serial@e6f30000 { 1346 compatible = "renesas,scif-r8a7796", 1347 "renesas,rcar-gen3-scif", "renesas,scif"; 1348 reg = <0 0xe6f30000 0 64>; 1349 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1350 clocks = <&cpg CPG_MOD 202>, 1351 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1352 <&scif_clk>; 1353 clock-names = "fck", "brg_int", "scif_clk"; 1354 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1355 <&dmac2 0x5b>, <&dmac2 0x5a>; 1356 dma-names = "tx", "rx", "tx", "rx"; 1357 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1358 resets = <&cpg 202>; 1359 status = "disabled"; 1360 }; 1361 1362 tpu: pwm@e6e80000 { 1363 compatible = "renesas,tpu-r8a7796", "renesas,tpu"; 1364 reg = <0 0xe6e80000 0 0x148>; 1365 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1366 clocks = <&cpg CPG_MOD 304>; 1367 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1368 resets = <&cpg 304>; 1369 #pwm-cells = <3>; 1370 status = "disabled"; 1371 }; 1372 1373 msiof0: spi@e6e90000 { 1374 compatible = "renesas,msiof-r8a7796", 1375 "renesas,rcar-gen3-msiof"; 1376 reg = <0 0xe6e90000 0 0x0064>; 1377 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1378 clocks = <&cpg CPG_MOD 211>; 1379 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1380 <&dmac2 0x41>, <&dmac2 0x40>; 1381 dma-names = "tx", "rx", "tx", "rx"; 1382 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1383 resets = <&cpg 211>; 1384 #address-cells = <1>; 1385 #size-cells = <0>; 1386 status = "disabled"; 1387 }; 1388 1389 msiof1: spi@e6ea0000 { 1390 compatible = "renesas,msiof-r8a7796", 1391 "renesas,rcar-gen3-msiof"; 1392 reg = <0 0xe6ea0000 0 0x0064>; 1393 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1394 clocks = <&cpg CPG_MOD 210>; 1395 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1396 <&dmac2 0x43>, <&dmac2 0x42>; 1397 dma-names = "tx", "rx", "tx", "rx"; 1398 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1399 resets = <&cpg 210>; 1400 #address-cells = <1>; 1401 #size-cells = <0>; 1402 status = "disabled"; 1403 }; 1404 1405 msiof2: spi@e6c00000 { 1406 compatible = "renesas,msiof-r8a7796", 1407 "renesas,rcar-gen3-msiof"; 1408 reg = <0 0xe6c00000 0 0x0064>; 1409 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1410 clocks = <&cpg CPG_MOD 209>; 1411 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1412 dma-names = "tx", "rx"; 1413 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1414 resets = <&cpg 209>; 1415 #address-cells = <1>; 1416 #size-cells = <0>; 1417 status = "disabled"; 1418 }; 1419 1420 msiof3: spi@e6c10000 { 1421 compatible = "renesas,msiof-r8a7796", 1422 "renesas,rcar-gen3-msiof"; 1423 reg = <0 0xe6c10000 0 0x0064>; 1424 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1425 clocks = <&cpg CPG_MOD 208>; 1426 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1427 dma-names = "tx", "rx"; 1428 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1429 resets = <&cpg 208>; 1430 #address-cells = <1>; 1431 #size-cells = <0>; 1432 status = "disabled"; 1433 }; 1434 1435 vin0: video@e6ef0000 { 1436 compatible = "renesas,vin-r8a7796"; 1437 reg = <0 0xe6ef0000 0 0x1000>; 1438 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1439 clocks = <&cpg CPG_MOD 811>; 1440 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1441 resets = <&cpg 811>; 1442 renesas,id = <0>; 1443 status = "disabled"; 1444 1445 ports { 1446 #address-cells = <1>; 1447 #size-cells = <0>; 1448 1449 port@1 { 1450 #address-cells = <1>; 1451 #size-cells = <0>; 1452 1453 reg = <1>; 1454 1455 vin0csi20: endpoint@0 { 1456 reg = <0>; 1457 remote-endpoint = <&csi20vin0>; 1458 }; 1459 vin0csi40: endpoint@2 { 1460 reg = <2>; 1461 remote-endpoint = <&csi40vin0>; 1462 }; 1463 }; 1464 }; 1465 }; 1466 1467 vin1: video@e6ef1000 { 1468 compatible = "renesas,vin-r8a7796"; 1469 reg = <0 0xe6ef1000 0 0x1000>; 1470 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1471 clocks = <&cpg CPG_MOD 810>; 1472 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1473 resets = <&cpg 810>; 1474 renesas,id = <1>; 1475 status = "disabled"; 1476 1477 ports { 1478 #address-cells = <1>; 1479 #size-cells = <0>; 1480 1481 port@1 { 1482 #address-cells = <1>; 1483 #size-cells = <0>; 1484 1485 reg = <1>; 1486 1487 vin1csi20: endpoint@0 { 1488 reg = <0>; 1489 remote-endpoint = <&csi20vin1>; 1490 }; 1491 vin1csi40: endpoint@2 { 1492 reg = <2>; 1493 remote-endpoint = <&csi40vin1>; 1494 }; 1495 }; 1496 }; 1497 }; 1498 1499 vin2: video@e6ef2000 { 1500 compatible = "renesas,vin-r8a7796"; 1501 reg = <0 0xe6ef2000 0 0x1000>; 1502 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1503 clocks = <&cpg CPG_MOD 809>; 1504 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1505 resets = <&cpg 809>; 1506 renesas,id = <2>; 1507 status = "disabled"; 1508 1509 ports { 1510 #address-cells = <1>; 1511 #size-cells = <0>; 1512 1513 port@1 { 1514 #address-cells = <1>; 1515 #size-cells = <0>; 1516 1517 reg = <1>; 1518 1519 vin2csi20: endpoint@0 { 1520 reg = <0>; 1521 remote-endpoint = <&csi20vin2>; 1522 }; 1523 vin2csi40: endpoint@2 { 1524 reg = <2>; 1525 remote-endpoint = <&csi40vin2>; 1526 }; 1527 }; 1528 }; 1529 }; 1530 1531 vin3: video@e6ef3000 { 1532 compatible = "renesas,vin-r8a7796"; 1533 reg = <0 0xe6ef3000 0 0x1000>; 1534 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1535 clocks = <&cpg CPG_MOD 808>; 1536 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1537 resets = <&cpg 808>; 1538 renesas,id = <3>; 1539 status = "disabled"; 1540 1541 ports { 1542 #address-cells = <1>; 1543 #size-cells = <0>; 1544 1545 port@1 { 1546 #address-cells = <1>; 1547 #size-cells = <0>; 1548 1549 reg = <1>; 1550 1551 vin3csi20: endpoint@0 { 1552 reg = <0>; 1553 remote-endpoint = <&csi20vin3>; 1554 }; 1555 vin3csi40: endpoint@2 { 1556 reg = <2>; 1557 remote-endpoint = <&csi40vin3>; 1558 }; 1559 }; 1560 }; 1561 }; 1562 1563 vin4: video@e6ef4000 { 1564 compatible = "renesas,vin-r8a7796"; 1565 reg = <0 0xe6ef4000 0 0x1000>; 1566 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1567 clocks = <&cpg CPG_MOD 807>; 1568 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1569 resets = <&cpg 807>; 1570 renesas,id = <4>; 1571 status = "disabled"; 1572 1573 ports { 1574 #address-cells = <1>; 1575 #size-cells = <0>; 1576 1577 port@1 { 1578 #address-cells = <1>; 1579 #size-cells = <0>; 1580 1581 reg = <1>; 1582 1583 vin4csi20: endpoint@0 { 1584 reg = <0>; 1585 remote-endpoint = <&csi20vin4>; 1586 }; 1587 vin4csi40: endpoint@2 { 1588 reg = <2>; 1589 remote-endpoint = <&csi40vin4>; 1590 }; 1591 }; 1592 }; 1593 }; 1594 1595 vin5: video@e6ef5000 { 1596 compatible = "renesas,vin-r8a7796"; 1597 reg = <0 0xe6ef5000 0 0x1000>; 1598 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1599 clocks = <&cpg CPG_MOD 806>; 1600 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1601 resets = <&cpg 806>; 1602 renesas,id = <5>; 1603 status = "disabled"; 1604 1605 ports { 1606 #address-cells = <1>; 1607 #size-cells = <0>; 1608 1609 port@1 { 1610 #address-cells = <1>; 1611 #size-cells = <0>; 1612 1613 reg = <1>; 1614 1615 vin5csi20: endpoint@0 { 1616 reg = <0>; 1617 remote-endpoint = <&csi20vin5>; 1618 }; 1619 vin5csi40: endpoint@2 { 1620 reg = <2>; 1621 remote-endpoint = <&csi40vin5>; 1622 }; 1623 }; 1624 }; 1625 }; 1626 1627 vin6: video@e6ef6000 { 1628 compatible = "renesas,vin-r8a7796"; 1629 reg = <0 0xe6ef6000 0 0x1000>; 1630 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1631 clocks = <&cpg CPG_MOD 805>; 1632 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1633 resets = <&cpg 805>; 1634 renesas,id = <6>; 1635 status = "disabled"; 1636 1637 ports { 1638 #address-cells = <1>; 1639 #size-cells = <0>; 1640 1641 port@1 { 1642 #address-cells = <1>; 1643 #size-cells = <0>; 1644 1645 reg = <1>; 1646 1647 vin6csi20: endpoint@0 { 1648 reg = <0>; 1649 remote-endpoint = <&csi20vin6>; 1650 }; 1651 vin6csi40: endpoint@2 { 1652 reg = <2>; 1653 remote-endpoint = <&csi40vin6>; 1654 }; 1655 }; 1656 }; 1657 }; 1658 1659 vin7: video@e6ef7000 { 1660 compatible = "renesas,vin-r8a7796"; 1661 reg = <0 0xe6ef7000 0 0x1000>; 1662 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1663 clocks = <&cpg CPG_MOD 804>; 1664 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1665 resets = <&cpg 804>; 1666 renesas,id = <7>; 1667 status = "disabled"; 1668 1669 ports { 1670 #address-cells = <1>; 1671 #size-cells = <0>; 1672 1673 port@1 { 1674 #address-cells = <1>; 1675 #size-cells = <0>; 1676 1677 reg = <1>; 1678 1679 vin7csi20: endpoint@0 { 1680 reg = <0>; 1681 remote-endpoint = <&csi20vin7>; 1682 }; 1683 vin7csi40: endpoint@2 { 1684 reg = <2>; 1685 remote-endpoint = <&csi40vin7>; 1686 }; 1687 }; 1688 }; 1689 }; 1690 1691 drif00: rif@e6f40000 { 1692 compatible = "renesas,r8a7796-drif", 1693 "renesas,rcar-gen3-drif"; 1694 reg = <0 0xe6f40000 0 0x64>; 1695 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1696 clocks = <&cpg CPG_MOD 515>; 1697 clock-names = "fck"; 1698 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1699 dma-names = "rx", "rx"; 1700 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1701 resets = <&cpg 515>; 1702 renesas,bonding = <&drif01>; 1703 status = "disabled"; 1704 }; 1705 1706 drif01: rif@e6f50000 { 1707 compatible = "renesas,r8a7796-drif", 1708 "renesas,rcar-gen3-drif"; 1709 reg = <0 0xe6f50000 0 0x64>; 1710 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1711 clocks = <&cpg CPG_MOD 514>; 1712 clock-names = "fck"; 1713 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1714 dma-names = "rx", "rx"; 1715 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1716 resets = <&cpg 514>; 1717 renesas,bonding = <&drif00>; 1718 status = "disabled"; 1719 }; 1720 1721 drif10: rif@e6f60000 { 1722 compatible = "renesas,r8a7796-drif", 1723 "renesas,rcar-gen3-drif"; 1724 reg = <0 0xe6f60000 0 0x64>; 1725 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1726 clocks = <&cpg CPG_MOD 513>; 1727 clock-names = "fck"; 1728 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1729 dma-names = "rx", "rx"; 1730 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1731 resets = <&cpg 513>; 1732 renesas,bonding = <&drif11>; 1733 status = "disabled"; 1734 }; 1735 1736 drif11: rif@e6f70000 { 1737 compatible = "renesas,r8a7796-drif", 1738 "renesas,rcar-gen3-drif"; 1739 reg = <0 0xe6f70000 0 0x64>; 1740 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1741 clocks = <&cpg CPG_MOD 512>; 1742 clock-names = "fck"; 1743 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1744 dma-names = "rx", "rx"; 1745 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1746 resets = <&cpg 512>; 1747 renesas,bonding = <&drif10>; 1748 status = "disabled"; 1749 }; 1750 1751 drif20: rif@e6f80000 { 1752 compatible = "renesas,r8a7796-drif", 1753 "renesas,rcar-gen3-drif"; 1754 reg = <0 0xe6f80000 0 0x64>; 1755 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1756 clocks = <&cpg CPG_MOD 511>; 1757 clock-names = "fck"; 1758 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1759 dma-names = "rx", "rx"; 1760 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1761 resets = <&cpg 511>; 1762 renesas,bonding = <&drif21>; 1763 status = "disabled"; 1764 }; 1765 1766 drif21: rif@e6f90000 { 1767 compatible = "renesas,r8a7796-drif", 1768 "renesas,rcar-gen3-drif"; 1769 reg = <0 0xe6f90000 0 0x64>; 1770 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1771 clocks = <&cpg CPG_MOD 510>; 1772 clock-names = "fck"; 1773 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1774 dma-names = "rx", "rx"; 1775 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1776 resets = <&cpg 510>; 1777 renesas,bonding = <&drif20>; 1778 status = "disabled"; 1779 }; 1780 1781 drif30: rif@e6fa0000 { 1782 compatible = "renesas,r8a7796-drif", 1783 "renesas,rcar-gen3-drif"; 1784 reg = <0 0xe6fa0000 0 0x64>; 1785 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1786 clocks = <&cpg CPG_MOD 509>; 1787 clock-names = "fck"; 1788 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1789 dma-names = "rx", "rx"; 1790 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1791 resets = <&cpg 509>; 1792 renesas,bonding = <&drif31>; 1793 status = "disabled"; 1794 }; 1795 1796 drif31: rif@e6fb0000 { 1797 compatible = "renesas,r8a7796-drif", 1798 "renesas,rcar-gen3-drif"; 1799 reg = <0 0xe6fb0000 0 0x64>; 1800 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1801 clocks = <&cpg CPG_MOD 508>; 1802 clock-names = "fck"; 1803 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1804 dma-names = "rx", "rx"; 1805 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1806 resets = <&cpg 508>; 1807 renesas,bonding = <&drif30>; 1808 status = "disabled"; 1809 }; 1810 1811 rcar_sound: sound@ec500000 { 1812 /* 1813 * #sound-dai-cells is required 1814 * 1815 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1816 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1817 */ 1818 /* 1819 * #clock-cells is required for audio_clkout0/1/2/3 1820 * 1821 * clkout : #clock-cells = <0>; <&rcar_sound>; 1822 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1823 */ 1824 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1825 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1826 <0 0xec5a0000 0 0x100>, /* ADG */ 1827 <0 0xec540000 0 0x1000>, /* SSIU */ 1828 <0 0xec541000 0 0x280>, /* SSI */ 1829 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1830 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1831 1832 clocks = <&cpg CPG_MOD 1005>, 1833 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1834 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1835 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1836 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1837 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1838 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1839 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1840 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1841 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1842 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1843 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1844 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1845 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1846 <&audio_clk_a>, <&audio_clk_b>, 1847 <&audio_clk_c>, 1848 <&cpg CPG_CORE R8A7796_CLK_S0D4>; 1849 clock-names = "ssi-all", 1850 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1851 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1852 "ssi.1", "ssi.0", 1853 "src.9", "src.8", "src.7", "src.6", 1854 "src.5", "src.4", "src.3", "src.2", 1855 "src.1", "src.0", 1856 "mix.1", "mix.0", 1857 "ctu.1", "ctu.0", 1858 "dvc.0", "dvc.1", 1859 "clk_a", "clk_b", "clk_c", "clk_i"; 1860 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1861 resets = <&cpg 1005>, 1862 <&cpg 1006>, <&cpg 1007>, 1863 <&cpg 1008>, <&cpg 1009>, 1864 <&cpg 1010>, <&cpg 1011>, 1865 <&cpg 1012>, <&cpg 1013>, 1866 <&cpg 1014>, <&cpg 1015>; 1867 reset-names = "ssi-all", 1868 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1869 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1870 "ssi.1", "ssi.0"; 1871 status = "disabled"; 1872 1873 rcar_sound,ctu { 1874 ctu00: ctu-0 { }; 1875 ctu01: ctu-1 { }; 1876 ctu02: ctu-2 { }; 1877 ctu03: ctu-3 { }; 1878 ctu10: ctu-4 { }; 1879 ctu11: ctu-5 { }; 1880 ctu12: ctu-6 { }; 1881 ctu13: ctu-7 { }; 1882 }; 1883 1884 rcar_sound,dvc { 1885 dvc0: dvc-0 { 1886 dmas = <&audma1 0xbc>; 1887 dma-names = "tx"; 1888 }; 1889 dvc1: dvc-1 { 1890 dmas = <&audma1 0xbe>; 1891 dma-names = "tx"; 1892 }; 1893 }; 1894 1895 rcar_sound,mix { 1896 mix0: mix-0 { }; 1897 mix1: mix-1 { }; 1898 }; 1899 1900 rcar_sound,src { 1901 src0: src-0 { 1902 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1903 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1904 dma-names = "rx", "tx"; 1905 }; 1906 src1: src-1 { 1907 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1908 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1909 dma-names = "rx", "tx"; 1910 }; 1911 src2: src-2 { 1912 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1913 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1914 dma-names = "rx", "tx"; 1915 }; 1916 src3: src-3 { 1917 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1918 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1919 dma-names = "rx", "tx"; 1920 }; 1921 src4: src-4 { 1922 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1923 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1924 dma-names = "rx", "tx"; 1925 }; 1926 src5: src-5 { 1927 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1928 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1929 dma-names = "rx", "tx"; 1930 }; 1931 src6: src-6 { 1932 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1933 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1934 dma-names = "rx", "tx"; 1935 }; 1936 src7: src-7 { 1937 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1938 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1939 dma-names = "rx", "tx"; 1940 }; 1941 src8: src-8 { 1942 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1943 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1944 dma-names = "rx", "tx"; 1945 }; 1946 src9: src-9 { 1947 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1948 dmas = <&audma0 0x97>, <&audma1 0xba>; 1949 dma-names = "rx", "tx"; 1950 }; 1951 }; 1952 1953 rcar_sound,ssi { 1954 ssi0: ssi-0 { 1955 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1956 dmas = <&audma0 0x01>, <&audma1 0x02>; 1957 dma-names = "rx", "tx"; 1958 }; 1959 ssi1: ssi-1 { 1960 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1961 dmas = <&audma0 0x03>, <&audma1 0x04>; 1962 dma-names = "rx", "tx"; 1963 }; 1964 ssi2: ssi-2 { 1965 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1966 dmas = <&audma0 0x05>, <&audma1 0x06>; 1967 dma-names = "rx", "tx"; 1968 }; 1969 ssi3: ssi-3 { 1970 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1971 dmas = <&audma0 0x07>, <&audma1 0x08>; 1972 dma-names = "rx", "tx"; 1973 }; 1974 ssi4: ssi-4 { 1975 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1976 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1977 dma-names = "rx", "tx"; 1978 }; 1979 ssi5: ssi-5 { 1980 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1981 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1982 dma-names = "rx", "tx"; 1983 }; 1984 ssi6: ssi-6 { 1985 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1986 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1987 dma-names = "rx", "tx"; 1988 }; 1989 ssi7: ssi-7 { 1990 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1991 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1992 dma-names = "rx", "tx"; 1993 }; 1994 ssi8: ssi-8 { 1995 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1996 dmas = <&audma0 0x11>, <&audma1 0x12>; 1997 dma-names = "rx", "tx"; 1998 }; 1999 ssi9: ssi-9 { 2000 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2001 dmas = <&audma0 0x13>, <&audma1 0x14>; 2002 dma-names = "rx", "tx"; 2003 }; 2004 }; 2005 2006 rcar_sound,ssiu { 2007 ssiu00: ssiu-0 { 2008 dmas = <&audma0 0x15>, <&audma1 0x16>; 2009 dma-names = "rx", "tx"; 2010 }; 2011 ssiu01: ssiu-1 { 2012 dmas = <&audma0 0x35>, <&audma1 0x36>; 2013 dma-names = "rx", "tx"; 2014 }; 2015 ssiu02: ssiu-2 { 2016 dmas = <&audma0 0x37>, <&audma1 0x38>; 2017 dma-names = "rx", "tx"; 2018 }; 2019 ssiu03: ssiu-3 { 2020 dmas = <&audma0 0x47>, <&audma1 0x48>; 2021 dma-names = "rx", "tx"; 2022 }; 2023 ssiu04: ssiu-4 { 2024 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2025 dma-names = "rx", "tx"; 2026 }; 2027 ssiu05: ssiu-5 { 2028 dmas = <&audma0 0x43>, <&audma1 0x44>; 2029 dma-names = "rx", "tx"; 2030 }; 2031 ssiu06: ssiu-6 { 2032 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2033 dma-names = "rx", "tx"; 2034 }; 2035 ssiu07: ssiu-7 { 2036 dmas = <&audma0 0x53>, <&audma1 0x54>; 2037 dma-names = "rx", "tx"; 2038 }; 2039 ssiu10: ssiu-8 { 2040 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2041 dma-names = "rx", "tx"; 2042 }; 2043 ssiu11: ssiu-9 { 2044 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2045 dma-names = "rx", "tx"; 2046 }; 2047 ssiu12: ssiu-10 { 2048 dmas = <&audma0 0x57>, <&audma1 0x58>; 2049 dma-names = "rx", "tx"; 2050 }; 2051 ssiu13: ssiu-11 { 2052 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2053 dma-names = "rx", "tx"; 2054 }; 2055 ssiu14: ssiu-12 { 2056 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2057 dma-names = "rx", "tx"; 2058 }; 2059 ssiu15: ssiu-13 { 2060 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2061 dma-names = "rx", "tx"; 2062 }; 2063 ssiu16: ssiu-14 { 2064 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2065 dma-names = "rx", "tx"; 2066 }; 2067 ssiu17: ssiu-15 { 2068 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2069 dma-names = "rx", "tx"; 2070 }; 2071 ssiu20: ssiu-16 { 2072 dmas = <&audma0 0x63>, <&audma1 0x64>; 2073 dma-names = "rx", "tx"; 2074 }; 2075 ssiu21: ssiu-17 { 2076 dmas = <&audma0 0x67>, <&audma1 0x68>; 2077 dma-names = "rx", "tx"; 2078 }; 2079 ssiu22: ssiu-18 { 2080 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2081 dma-names = "rx", "tx"; 2082 }; 2083 ssiu23: ssiu-19 { 2084 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2085 dma-names = "rx", "tx"; 2086 }; 2087 ssiu24: ssiu-20 { 2088 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2089 dma-names = "rx", "tx"; 2090 }; 2091 ssiu25: ssiu-21 { 2092 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2093 dma-names = "rx", "tx"; 2094 }; 2095 ssiu26: ssiu-22 { 2096 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2097 dma-names = "rx", "tx"; 2098 }; 2099 ssiu27: ssiu-23 { 2100 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2101 dma-names = "rx", "tx"; 2102 }; 2103 ssiu30: ssiu-24 { 2104 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2105 dma-names = "rx", "tx"; 2106 }; 2107 ssiu31: ssiu-25 { 2108 dmas = <&audma0 0x21>, <&audma1 0x22>; 2109 dma-names = "rx", "tx"; 2110 }; 2111 ssiu32: ssiu-26 { 2112 dmas = <&audma0 0x23>, <&audma1 0x24>; 2113 dma-names = "rx", "tx"; 2114 }; 2115 ssiu33: ssiu-27 { 2116 dmas = <&audma0 0x25>, <&audma1 0x26>; 2117 dma-names = "rx", "tx"; 2118 }; 2119 ssiu34: ssiu-28 { 2120 dmas = <&audma0 0x27>, <&audma1 0x28>; 2121 dma-names = "rx", "tx"; 2122 }; 2123 ssiu35: ssiu-29 { 2124 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2125 dma-names = "rx", "tx"; 2126 }; 2127 ssiu36: ssiu-30 { 2128 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2129 dma-names = "rx", "tx"; 2130 }; 2131 ssiu37: ssiu-31 { 2132 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2133 dma-names = "rx", "tx"; 2134 }; 2135 ssiu40: ssiu-32 { 2136 dmas = <&audma0 0x71>, <&audma1 0x72>; 2137 dma-names = "rx", "tx"; 2138 }; 2139 ssiu41: ssiu-33 { 2140 dmas = <&audma0 0x17>, <&audma1 0x18>; 2141 dma-names = "rx", "tx"; 2142 }; 2143 ssiu42: ssiu-34 { 2144 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2145 dma-names = "rx", "tx"; 2146 }; 2147 ssiu43: ssiu-35 { 2148 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2149 dma-names = "rx", "tx"; 2150 }; 2151 ssiu44: ssiu-36 { 2152 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2153 dma-names = "rx", "tx"; 2154 }; 2155 ssiu45: ssiu-37 { 2156 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2157 dma-names = "rx", "tx"; 2158 }; 2159 ssiu46: ssiu-38 { 2160 dmas = <&audma0 0x31>, <&audma1 0x32>; 2161 dma-names = "rx", "tx"; 2162 }; 2163 ssiu47: ssiu-39 { 2164 dmas = <&audma0 0x33>, <&audma1 0x34>; 2165 dma-names = "rx", "tx"; 2166 }; 2167 ssiu50: ssiu-40 { 2168 dmas = <&audma0 0x73>, <&audma1 0x74>; 2169 dma-names = "rx", "tx"; 2170 }; 2171 ssiu60: ssiu-41 { 2172 dmas = <&audma0 0x75>, <&audma1 0x76>; 2173 dma-names = "rx", "tx"; 2174 }; 2175 ssiu70: ssiu-42 { 2176 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2177 dma-names = "rx", "tx"; 2178 }; 2179 ssiu80: ssiu-43 { 2180 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2181 dma-names = "rx", "tx"; 2182 }; 2183 ssiu90: ssiu-44 { 2184 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2185 dma-names = "rx", "tx"; 2186 }; 2187 ssiu91: ssiu-45 { 2188 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2189 dma-names = "rx", "tx"; 2190 }; 2191 ssiu92: ssiu-46 { 2192 dmas = <&audma0 0x81>, <&audma1 0x82>; 2193 dma-names = "rx", "tx"; 2194 }; 2195 ssiu93: ssiu-47 { 2196 dmas = <&audma0 0x83>, <&audma1 0x84>; 2197 dma-names = "rx", "tx"; 2198 }; 2199 ssiu94: ssiu-48 { 2200 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2201 dma-names = "rx", "tx"; 2202 }; 2203 ssiu95: ssiu-49 { 2204 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2205 dma-names = "rx", "tx"; 2206 }; 2207 ssiu96: ssiu-50 { 2208 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2209 dma-names = "rx", "tx"; 2210 }; 2211 ssiu97: ssiu-51 { 2212 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2213 dma-names = "rx", "tx"; 2214 }; 2215 }; 2216 }; 2217 2218 audma0: dma-controller@ec700000 { 2219 compatible = "renesas,dmac-r8a7796", 2220 "renesas,rcar-dmac"; 2221 reg = <0 0xec700000 0 0x10000>; 2222 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2223 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2224 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2225 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2226 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2227 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2228 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2229 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2230 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2231 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2232 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2233 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2234 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2235 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2236 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2237 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2238 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2239 interrupt-names = "error", 2240 "ch0", "ch1", "ch2", "ch3", 2241 "ch4", "ch5", "ch6", "ch7", 2242 "ch8", "ch9", "ch10", "ch11", 2243 "ch12", "ch13", "ch14", "ch15"; 2244 clocks = <&cpg CPG_MOD 502>; 2245 clock-names = "fck"; 2246 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2247 resets = <&cpg 502>; 2248 #dma-cells = <1>; 2249 dma-channels = <16>; 2250 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2251 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2252 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2253 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2254 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2255 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2256 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2257 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2258 }; 2259 2260 audma1: dma-controller@ec720000 { 2261 compatible = "renesas,dmac-r8a7796", 2262 "renesas,rcar-dmac"; 2263 reg = <0 0xec720000 0 0x10000>; 2264 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2265 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2266 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2267 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2268 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2269 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2270 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2271 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2272 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2273 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2274 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2275 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2276 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2277 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2278 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2279 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2280 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2281 interrupt-names = "error", 2282 "ch0", "ch1", "ch2", "ch3", 2283 "ch4", "ch5", "ch6", "ch7", 2284 "ch8", "ch9", "ch10", "ch11", 2285 "ch12", "ch13", "ch14", "ch15"; 2286 clocks = <&cpg CPG_MOD 501>; 2287 clock-names = "fck"; 2288 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2289 resets = <&cpg 501>; 2290 #dma-cells = <1>; 2291 dma-channels = <16>; 2292 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2293 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2294 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2295 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2296 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2297 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2298 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2299 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2300 }; 2301 2302 xhci0: usb@ee000000 { 2303 compatible = "renesas,xhci-r8a7796", 2304 "renesas,rcar-gen3-xhci"; 2305 reg = <0 0xee000000 0 0xc00>; 2306 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2307 clocks = <&cpg CPG_MOD 328>; 2308 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2309 resets = <&cpg 328>; 2310 status = "disabled"; 2311 }; 2312 2313 usb3_peri0: usb@ee020000 { 2314 compatible = "renesas,r8a7796-usb3-peri", 2315 "renesas,rcar-gen3-usb3-peri"; 2316 reg = <0 0xee020000 0 0x400>; 2317 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2318 clocks = <&cpg CPG_MOD 328>; 2319 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2320 resets = <&cpg 328>; 2321 status = "disabled"; 2322 }; 2323 2324 ohci0: usb@ee080000 { 2325 compatible = "generic-ohci"; 2326 reg = <0 0xee080000 0 0x100>; 2327 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2328 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2329 phys = <&usb2_phy0 1>; 2330 phy-names = "usb"; 2331 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2332 resets = <&cpg 703>, <&cpg 704>; 2333 status = "disabled"; 2334 }; 2335 2336 ohci1: usb@ee0a0000 { 2337 compatible = "generic-ohci"; 2338 reg = <0 0xee0a0000 0 0x100>; 2339 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2340 clocks = <&cpg CPG_MOD 702>; 2341 phys = <&usb2_phy1 1>; 2342 phy-names = "usb"; 2343 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2344 resets = <&cpg 702>; 2345 status = "disabled"; 2346 }; 2347 2348 ehci0: usb@ee080100 { 2349 compatible = "generic-ehci"; 2350 reg = <0 0xee080100 0 0x100>; 2351 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2352 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2353 phys = <&usb2_phy0 2>; 2354 phy-names = "usb"; 2355 companion = <&ohci0>; 2356 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2357 resets = <&cpg 703>, <&cpg 704>; 2358 status = "disabled"; 2359 }; 2360 2361 ehci1: usb@ee0a0100 { 2362 compatible = "generic-ehci"; 2363 reg = <0 0xee0a0100 0 0x100>; 2364 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2365 clocks = <&cpg CPG_MOD 702>; 2366 phys = <&usb2_phy1 2>; 2367 phy-names = "usb"; 2368 companion = <&ohci1>; 2369 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2370 resets = <&cpg 702>; 2371 status = "disabled"; 2372 }; 2373 2374 usb2_phy0: usb-phy@ee080200 { 2375 compatible = "renesas,usb2-phy-r8a7796", 2376 "renesas,rcar-gen3-usb2-phy"; 2377 reg = <0 0xee080200 0 0x700>; 2378 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2379 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2380 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2381 resets = <&cpg 703>, <&cpg 704>; 2382 #phy-cells = <1>; 2383 status = "disabled"; 2384 }; 2385 2386 usb2_phy1: usb-phy@ee0a0200 { 2387 compatible = "renesas,usb2-phy-r8a7796", 2388 "renesas,rcar-gen3-usb2-phy"; 2389 reg = <0 0xee0a0200 0 0x700>; 2390 clocks = <&cpg CPG_MOD 702>; 2391 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2392 resets = <&cpg 702>; 2393 #phy-cells = <1>; 2394 status = "disabled"; 2395 }; 2396 2397 sdhi0: mmc@ee100000 { 2398 compatible = "renesas,sdhi-r8a7796", 2399 "renesas,rcar-gen3-sdhi"; 2400 reg = <0 0xee100000 0 0x2000>; 2401 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2402 clocks = <&cpg CPG_MOD 314>; 2403 max-frequency = <200000000>; 2404 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2405 resets = <&cpg 314>; 2406 iommus = <&ipmmu_ds1 32>; 2407 status = "disabled"; 2408 }; 2409 2410 sdhi1: mmc@ee120000 { 2411 compatible = "renesas,sdhi-r8a7796", 2412 "renesas,rcar-gen3-sdhi"; 2413 reg = <0 0xee120000 0 0x2000>; 2414 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2415 clocks = <&cpg CPG_MOD 313>; 2416 max-frequency = <200000000>; 2417 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2418 resets = <&cpg 313>; 2419 iommus = <&ipmmu_ds1 33>; 2420 status = "disabled"; 2421 }; 2422 2423 sdhi2: mmc@ee140000 { 2424 compatible = "renesas,sdhi-r8a7796", 2425 "renesas,rcar-gen3-sdhi"; 2426 reg = <0 0xee140000 0 0x2000>; 2427 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2428 clocks = <&cpg CPG_MOD 312>; 2429 max-frequency = <200000000>; 2430 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2431 resets = <&cpg 312>; 2432 iommus = <&ipmmu_ds1 34>; 2433 status = "disabled"; 2434 }; 2435 2436 sdhi3: mmc@ee160000 { 2437 compatible = "renesas,sdhi-r8a7796", 2438 "renesas,rcar-gen3-sdhi"; 2439 reg = <0 0xee160000 0 0x2000>; 2440 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2441 clocks = <&cpg CPG_MOD 311>; 2442 max-frequency = <200000000>; 2443 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2444 resets = <&cpg 311>; 2445 iommus = <&ipmmu_ds1 35>; 2446 status = "disabled"; 2447 }; 2448 2449 gic: interrupt-controller@f1010000 { 2450 compatible = "arm,gic-400"; 2451 #interrupt-cells = <3>; 2452 #address-cells = <0>; 2453 interrupt-controller; 2454 reg = <0x0 0xf1010000 0 0x1000>, 2455 <0x0 0xf1020000 0 0x20000>, 2456 <0x0 0xf1040000 0 0x20000>, 2457 <0x0 0xf1060000 0 0x20000>; 2458 interrupts = <GIC_PPI 9 2459 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2460 clocks = <&cpg CPG_MOD 408>; 2461 clock-names = "clk"; 2462 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2463 resets = <&cpg 408>; 2464 }; 2465 2466 pciec0: pcie@fe000000 { 2467 compatible = "renesas,pcie-r8a7796", 2468 "renesas,pcie-rcar-gen3"; 2469 reg = <0 0xfe000000 0 0x80000>; 2470 #address-cells = <3>; 2471 #size-cells = <2>; 2472 bus-range = <0x00 0xff>; 2473 device_type = "pci"; 2474 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2475 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2476 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2477 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2478 /* Map all possible DDR as inbound ranges */ 2479 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2480 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2481 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2482 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2483 #interrupt-cells = <1>; 2484 interrupt-map-mask = <0 0 0 0>; 2485 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2486 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2487 clock-names = "pcie", "pcie_bus"; 2488 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2489 resets = <&cpg 319>; 2490 status = "disabled"; 2491 }; 2492 2493 pciec1: pcie@ee800000 { 2494 compatible = "renesas,pcie-r8a7796", 2495 "renesas,pcie-rcar-gen3"; 2496 reg = <0 0xee800000 0 0x80000>; 2497 #address-cells = <3>; 2498 #size-cells = <2>; 2499 bus-range = <0x00 0xff>; 2500 device_type = "pci"; 2501 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2502 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2503 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2504 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2505 /* Map all possible DDR as inbound ranges */ 2506 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2507 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2508 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2509 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2510 #interrupt-cells = <1>; 2511 interrupt-map-mask = <0 0 0 0>; 2512 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2513 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2514 clock-names = "pcie", "pcie_bus"; 2515 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2516 resets = <&cpg 318>; 2517 status = "disabled"; 2518 }; 2519 2520 imr-lx4@fe860000 { 2521 compatible = "renesas,r8a7796-imr-lx4", 2522 "renesas,imr-lx4"; 2523 reg = <0 0xfe860000 0 0x2000>; 2524 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2525 clocks = <&cpg CPG_MOD 823>; 2526 power-domains = <&sysc R8A7796_PD_A3VC>; 2527 resets = <&cpg 823>; 2528 }; 2529 2530 imr-lx4@fe870000 { 2531 compatible = "renesas,r8a7796-imr-lx4", 2532 "renesas,imr-lx4"; 2533 reg = <0 0xfe870000 0 0x2000>; 2534 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2535 clocks = <&cpg CPG_MOD 822>; 2536 power-domains = <&sysc R8A7796_PD_A3VC>; 2537 resets = <&cpg 822>; 2538 }; 2539 2540 fdp1@fe940000 { 2541 compatible = "renesas,fdp1"; 2542 reg = <0 0xfe940000 0 0x2400>; 2543 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2544 clocks = <&cpg CPG_MOD 119>; 2545 power-domains = <&sysc R8A7796_PD_A3VC>; 2546 resets = <&cpg 119>; 2547 renesas,fcp = <&fcpf0>; 2548 }; 2549 2550 fcpf0: fcp@fe950000 { 2551 compatible = "renesas,fcpf"; 2552 reg = <0 0xfe950000 0 0x200>; 2553 clocks = <&cpg CPG_MOD 615>; 2554 power-domains = <&sysc R8A7796_PD_A3VC>; 2555 resets = <&cpg 615>; 2556 }; 2557 2558 fcpvb0: fcp@fe96f000 { 2559 compatible = "renesas,fcpv"; 2560 reg = <0 0xfe96f000 0 0x200>; 2561 clocks = <&cpg CPG_MOD 607>; 2562 power-domains = <&sysc R8A7796_PD_A3VC>; 2563 resets = <&cpg 607>; 2564 }; 2565 2566 fcpvi0: fcp@fe9af000 { 2567 compatible = "renesas,fcpv"; 2568 reg = <0 0xfe9af000 0 0x200>; 2569 clocks = <&cpg CPG_MOD 611>; 2570 power-domains = <&sysc R8A7796_PD_A3VC>; 2571 resets = <&cpg 611>; 2572 iommus = <&ipmmu_vc0 19>; 2573 }; 2574 2575 fcpvd0: fcp@fea27000 { 2576 compatible = "renesas,fcpv"; 2577 reg = <0 0xfea27000 0 0x200>; 2578 clocks = <&cpg CPG_MOD 603>; 2579 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2580 resets = <&cpg 603>; 2581 iommus = <&ipmmu_vi0 8>; 2582 }; 2583 2584 fcpvd1: fcp@fea2f000 { 2585 compatible = "renesas,fcpv"; 2586 reg = <0 0xfea2f000 0 0x200>; 2587 clocks = <&cpg CPG_MOD 602>; 2588 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2589 resets = <&cpg 602>; 2590 iommus = <&ipmmu_vi0 9>; 2591 }; 2592 2593 fcpvd2: fcp@fea37000 { 2594 compatible = "renesas,fcpv"; 2595 reg = <0 0xfea37000 0 0x200>; 2596 clocks = <&cpg CPG_MOD 601>; 2597 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2598 resets = <&cpg 601>; 2599 iommus = <&ipmmu_vi0 10>; 2600 }; 2601 2602 vspb: vsp@fe960000 { 2603 compatible = "renesas,vsp2"; 2604 reg = <0 0xfe960000 0 0x8000>; 2605 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2606 clocks = <&cpg CPG_MOD 626>; 2607 power-domains = <&sysc R8A7796_PD_A3VC>; 2608 resets = <&cpg 626>; 2609 2610 renesas,fcp = <&fcpvb0>; 2611 }; 2612 2613 vspd0: vsp@fea20000 { 2614 compatible = "renesas,vsp2"; 2615 reg = <0 0xfea20000 0 0x5000>; 2616 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2617 clocks = <&cpg CPG_MOD 623>; 2618 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2619 resets = <&cpg 623>; 2620 2621 renesas,fcp = <&fcpvd0>; 2622 }; 2623 2624 vspd1: vsp@fea28000 { 2625 compatible = "renesas,vsp2"; 2626 reg = <0 0xfea28000 0 0x5000>; 2627 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2628 clocks = <&cpg CPG_MOD 622>; 2629 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2630 resets = <&cpg 622>; 2631 2632 renesas,fcp = <&fcpvd1>; 2633 }; 2634 2635 vspd2: vsp@fea30000 { 2636 compatible = "renesas,vsp2"; 2637 reg = <0 0xfea30000 0 0x5000>; 2638 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2639 clocks = <&cpg CPG_MOD 621>; 2640 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2641 resets = <&cpg 621>; 2642 2643 renesas,fcp = <&fcpvd2>; 2644 }; 2645 2646 vspi0: vsp@fe9a0000 { 2647 compatible = "renesas,vsp2"; 2648 reg = <0 0xfe9a0000 0 0x8000>; 2649 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2650 clocks = <&cpg CPG_MOD 631>; 2651 power-domains = <&sysc R8A7796_PD_A3VC>; 2652 resets = <&cpg 631>; 2653 2654 renesas,fcp = <&fcpvi0>; 2655 }; 2656 2657 cmm0: cmm@fea40000 { 2658 compatible = "renesas,r8a7796-cmm", 2659 "renesas,rcar-gen3-cmm"; 2660 reg = <0 0xfea40000 0 0x1000>; 2661 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2662 clocks = <&cpg CPG_MOD 711>; 2663 resets = <&cpg 711>; 2664 }; 2665 2666 cmm1: cmm@fea50000 { 2667 compatible = "renesas,r8a7796-cmm", 2668 "renesas,rcar-gen3-cmm"; 2669 reg = <0 0xfea50000 0 0x1000>; 2670 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2671 clocks = <&cpg CPG_MOD 710>; 2672 resets = <&cpg 710>; 2673 }; 2674 2675 cmm2: cmm@fea60000 { 2676 compatible = "renesas,r8a7796-cmm", 2677 "renesas,rcar-gen3-cmm"; 2678 reg = <0 0xfea60000 0 0x1000>; 2679 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2680 clocks = <&cpg CPG_MOD 709>; 2681 resets = <&cpg 709>; 2682 }; 2683 2684 csi20: csi2@fea80000 { 2685 compatible = "renesas,r8a7796-csi2"; 2686 reg = <0 0xfea80000 0 0x10000>; 2687 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2688 clocks = <&cpg CPG_MOD 714>; 2689 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2690 resets = <&cpg 714>; 2691 status = "disabled"; 2692 2693 ports { 2694 #address-cells = <1>; 2695 #size-cells = <0>; 2696 2697 port@1 { 2698 #address-cells = <1>; 2699 #size-cells = <0>; 2700 2701 reg = <1>; 2702 2703 csi20vin0: endpoint@0 { 2704 reg = <0>; 2705 remote-endpoint = <&vin0csi20>; 2706 }; 2707 csi20vin1: endpoint@1 { 2708 reg = <1>; 2709 remote-endpoint = <&vin1csi20>; 2710 }; 2711 csi20vin2: endpoint@2 { 2712 reg = <2>; 2713 remote-endpoint = <&vin2csi20>; 2714 }; 2715 csi20vin3: endpoint@3 { 2716 reg = <3>; 2717 remote-endpoint = <&vin3csi20>; 2718 }; 2719 csi20vin4: endpoint@4 { 2720 reg = <4>; 2721 remote-endpoint = <&vin4csi20>; 2722 }; 2723 csi20vin5: endpoint@5 { 2724 reg = <5>; 2725 remote-endpoint = <&vin5csi20>; 2726 }; 2727 csi20vin6: endpoint@6 { 2728 reg = <6>; 2729 remote-endpoint = <&vin6csi20>; 2730 }; 2731 csi20vin7: endpoint@7 { 2732 reg = <7>; 2733 remote-endpoint = <&vin7csi20>; 2734 }; 2735 }; 2736 }; 2737 }; 2738 2739 csi40: csi2@feaa0000 { 2740 compatible = "renesas,r8a7796-csi2"; 2741 reg = <0 0xfeaa0000 0 0x10000>; 2742 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2743 clocks = <&cpg CPG_MOD 716>; 2744 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2745 resets = <&cpg 716>; 2746 status = "disabled"; 2747 2748 ports { 2749 #address-cells = <1>; 2750 #size-cells = <0>; 2751 2752 port@1 { 2753 #address-cells = <1>; 2754 #size-cells = <0>; 2755 2756 reg = <1>; 2757 2758 csi40vin0: endpoint@0 { 2759 reg = <0>; 2760 remote-endpoint = <&vin0csi40>; 2761 }; 2762 csi40vin1: endpoint@1 { 2763 reg = <1>; 2764 remote-endpoint = <&vin1csi40>; 2765 }; 2766 csi40vin2: endpoint@2 { 2767 reg = <2>; 2768 remote-endpoint = <&vin2csi40>; 2769 }; 2770 csi40vin3: endpoint@3 { 2771 reg = <3>; 2772 remote-endpoint = <&vin3csi40>; 2773 }; 2774 csi40vin4: endpoint@4 { 2775 reg = <4>; 2776 remote-endpoint = <&vin4csi40>; 2777 }; 2778 csi40vin5: endpoint@5 { 2779 reg = <5>; 2780 remote-endpoint = <&vin5csi40>; 2781 }; 2782 csi40vin6: endpoint@6 { 2783 reg = <6>; 2784 remote-endpoint = <&vin6csi40>; 2785 }; 2786 csi40vin7: endpoint@7 { 2787 reg = <7>; 2788 remote-endpoint = <&vin7csi40>; 2789 }; 2790 }; 2791 2792 }; 2793 }; 2794 2795 hdmi0: hdmi@fead0000 { 2796 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; 2797 reg = <0 0xfead0000 0 0x10000>; 2798 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2799 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; 2800 clock-names = "iahb", "isfr"; 2801 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2802 resets = <&cpg 729>; 2803 status = "disabled"; 2804 2805 ports { 2806 #address-cells = <1>; 2807 #size-cells = <0>; 2808 port@0 { 2809 reg = <0>; 2810 dw_hdmi0_in: endpoint { 2811 remote-endpoint = <&du_out_hdmi0>; 2812 }; 2813 }; 2814 port@1 { 2815 reg = <1>; 2816 }; 2817 port@2 { 2818 /* HDMI sound */ 2819 reg = <2>; 2820 }; 2821 }; 2822 }; 2823 2824 du: display@feb00000 { 2825 compatible = "renesas,du-r8a7796"; 2826 reg = <0 0xfeb00000 0 0x70000>; 2827 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2828 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2829 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2830 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2831 <&cpg CPG_MOD 722>; 2832 clock-names = "du.0", "du.1", "du.2"; 2833 resets = <&cpg 724>, <&cpg 722>; 2834 reset-names = "du.0", "du.2"; 2835 2836 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>; 2837 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2838 2839 status = "disabled"; 2840 2841 ports { 2842 #address-cells = <1>; 2843 #size-cells = <0>; 2844 2845 port@0 { 2846 reg = <0>; 2847 du_out_rgb: endpoint { 2848 }; 2849 }; 2850 port@1 { 2851 reg = <1>; 2852 du_out_hdmi0: endpoint { 2853 remote-endpoint = <&dw_hdmi0_in>; 2854 }; 2855 }; 2856 port@2 { 2857 reg = <2>; 2858 du_out_lvds0: endpoint { 2859 remote-endpoint = <&lvds0_in>; 2860 }; 2861 }; 2862 }; 2863 }; 2864 2865 lvds0: lvds@feb90000 { 2866 compatible = "renesas,r8a7796-lvds"; 2867 reg = <0 0xfeb90000 0 0x14>; 2868 clocks = <&cpg CPG_MOD 727>; 2869 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2870 resets = <&cpg 727>; 2871 status = "disabled"; 2872 2873 ports { 2874 #address-cells = <1>; 2875 #size-cells = <0>; 2876 2877 port@0 { 2878 reg = <0>; 2879 lvds0_in: endpoint { 2880 remote-endpoint = <&du_out_lvds0>; 2881 }; 2882 }; 2883 port@1 { 2884 reg = <1>; 2885 lvds0_out: endpoint { 2886 }; 2887 }; 2888 }; 2889 }; 2890 2891 prr: chipid@fff00044 { 2892 compatible = "renesas,prr"; 2893 reg = <0 0xfff00044 0 4>; 2894 }; 2895 }; 2896 2897 thermal-zones { 2898 sensor_thermal1: sensor-thermal1 { 2899 polling-delay-passive = <250>; 2900 polling-delay = <1000>; 2901 thermal-sensors = <&tsc 0>; 2902 sustainable-power = <3874>; 2903 2904 trips { 2905 sensor1_crit: sensor1-crit { 2906 temperature = <120000>; 2907 hysteresis = <1000>; 2908 type = "critical"; 2909 }; 2910 }; 2911 }; 2912 2913 sensor_thermal2: sensor-thermal2 { 2914 polling-delay-passive = <250>; 2915 polling-delay = <1000>; 2916 thermal-sensors = <&tsc 1>; 2917 sustainable-power = <3874>; 2918 2919 trips { 2920 sensor2_crit: sensor2-crit { 2921 temperature = <120000>; 2922 hysteresis = <1000>; 2923 type = "critical"; 2924 }; 2925 }; 2926 }; 2927 2928 sensor_thermal3: sensor-thermal3 { 2929 polling-delay-passive = <250>; 2930 polling-delay = <1000>; 2931 thermal-sensors = <&tsc 2>; 2932 sustainable-power = <3874>; 2933 2934 cooling-maps { 2935 map0 { 2936 trip = <&target>; 2937 cooling-device = <&a57_0 2 4>; 2938 contribution = <1024>; 2939 }; 2940 map1 { 2941 trip = <&target>; 2942 cooling-device = <&a53_0 0 2>; 2943 contribution = <1024>; 2944 }; 2945 }; 2946 trips { 2947 target: trip-point1 { 2948 temperature = <100000>; 2949 hysteresis = <1000>; 2950 type = "passive"; 2951 }; 2952 2953 sensor3_crit: sensor3-crit { 2954 temperature = <120000>; 2955 hysteresis = <1000>; 2956 type = "critical"; 2957 }; 2958 }; 2959 }; 2960 }; 2961 2962 timer { 2963 compatible = "arm,armv8-timer"; 2964 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2965 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2966 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2967 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 2968 }; 2969 2970 /* External USB clocks - can be overridden by the board */ 2971 usb3s0_clk: usb3s0 { 2972 compatible = "fixed-clock"; 2973 #clock-cells = <0>; 2974 clock-frequency = <0>; 2975 }; 2976 2977 usb_extal_clk: usb_extal { 2978 compatible = "fixed-clock"; 2979 #clock-cells = <0>; 2980 clock-frequency = <0>; 2981 }; 2982}; 2983