1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a7796-sysc.h>
11
12#define CPG_AUDIO_CLK_I		R8A7796_CLK_S0D4
13
14/ {
15	compatible = "renesas,r8a7796";
16	#address-cells = <2>;
17	#size-cells = <2>;
18
19	aliases {
20		i2c0 = &i2c0;
21		i2c1 = &i2c1;
22		i2c2 = &i2c2;
23		i2c3 = &i2c3;
24		i2c4 = &i2c4;
25		i2c5 = &i2c5;
26		i2c6 = &i2c6;
27		i2c7 = &i2c_dvfs;
28	};
29
30	/*
31	 * The external audio clocks are configured as 0 Hz fixed frequency
32	 * clocks by default.
33	 * Boards that provide audio clocks should override them.
34	 */
35	audio_clk_a: audio_clk_a {
36		compatible = "fixed-clock";
37		#clock-cells = <0>;
38		clock-frequency = <0>;
39	};
40
41	audio_clk_b: audio_clk_b {
42		compatible = "fixed-clock";
43		#clock-cells = <0>;
44		clock-frequency = <0>;
45	};
46
47	audio_clk_c: audio_clk_c {
48		compatible = "fixed-clock";
49		#clock-cells = <0>;
50		clock-frequency = <0>;
51	};
52
53	/* External CAN clock - to be overridden by boards that provide it */
54	can_clk: can {
55		compatible = "fixed-clock";
56		#clock-cells = <0>;
57		clock-frequency = <0>;
58	};
59
60	cluster0_opp: opp_table0 {
61		compatible = "operating-points-v2";
62		opp-shared;
63
64		opp-500000000 {
65			opp-hz = /bits/ 64 <500000000>;
66			opp-microvolt = <820000>;
67			clock-latency-ns = <300000>;
68		};
69		opp-1000000000 {
70			opp-hz = /bits/ 64 <1000000000>;
71			opp-microvolt = <820000>;
72			clock-latency-ns = <300000>;
73		};
74		opp-1500000000 {
75			opp-hz = /bits/ 64 <1500000000>;
76			opp-microvolt = <820000>;
77			clock-latency-ns = <300000>;
78		};
79		opp-1600000000 {
80			opp-hz = /bits/ 64 <1600000000>;
81			opp-microvolt = <900000>;
82			clock-latency-ns = <300000>;
83			turbo-mode;
84		};
85		opp-1700000000 {
86			opp-hz = /bits/ 64 <1700000000>;
87			opp-microvolt = <900000>;
88			clock-latency-ns = <300000>;
89			turbo-mode;
90		};
91		opp-1800000000 {
92			opp-hz = /bits/ 64 <1800000000>;
93			opp-microvolt = <960000>;
94			clock-latency-ns = <300000>;
95			turbo-mode;
96		};
97	};
98
99	cluster1_opp: opp_table1 {
100		compatible = "operating-points-v2";
101		opp-shared;
102
103		opp-800000000 {
104			opp-hz = /bits/ 64 <800000000>;
105			opp-microvolt = <820000>;
106			clock-latency-ns = <300000>;
107		};
108		opp-1000000000 {
109			opp-hz = /bits/ 64 <1000000000>;
110			opp-microvolt = <820000>;
111			clock-latency-ns = <300000>;
112		};
113		opp-1200000000 {
114			opp-hz = /bits/ 64 <1200000000>;
115			opp-microvolt = <820000>;
116			clock-latency-ns = <300000>;
117		};
118		opp-1300000000 {
119			opp-hz = /bits/ 64 <1300000000>;
120			opp-microvolt = <820000>;
121			clock-latency-ns = <300000>;
122			turbo-mode;
123		};
124	};
125
126	cpus {
127		#address-cells = <1>;
128		#size-cells = <0>;
129
130		cpu-map {
131			cluster0 {
132				core0 {
133					cpu = <&a57_0>;
134				};
135				core1 {
136					cpu = <&a57_1>;
137				};
138			};
139
140			cluster1 {
141				core0 {
142					cpu = <&a53_0>;
143				};
144				core1 {
145					cpu = <&a53_1>;
146				};
147				core2 {
148					cpu = <&a53_2>;
149				};
150				core3 {
151					cpu = <&a53_3>;
152				};
153			};
154		};
155
156		a57_0: cpu@0 {
157			compatible = "arm,cortex-a57";
158			reg = <0x0>;
159			device_type = "cpu";
160			power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
161			next-level-cache = <&L2_CA57>;
162			enable-method = "psci";
163			cpu-idle-states = <&CPU_SLEEP_0>;
164			dynamic-power-coefficient = <854>;
165			clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
166			operating-points-v2 = <&cluster0_opp>;
167			capacity-dmips-mhz = <1024>;
168			#cooling-cells = <2>;
169		};
170
171		a57_1: cpu@1 {
172			compatible = "arm,cortex-a57";
173			reg = <0x1>;
174			device_type = "cpu";
175			power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
176			next-level-cache = <&L2_CA57>;
177			enable-method = "psci";
178			cpu-idle-states = <&CPU_SLEEP_0>;
179			clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
180			operating-points-v2 = <&cluster0_opp>;
181			capacity-dmips-mhz = <1024>;
182			#cooling-cells = <2>;
183		};
184
185		a53_0: cpu@100 {
186			compatible = "arm,cortex-a53";
187			reg = <0x100>;
188			device_type = "cpu";
189			power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
190			next-level-cache = <&L2_CA53>;
191			enable-method = "psci";
192			cpu-idle-states = <&CPU_SLEEP_1>;
193			#cooling-cells = <2>;
194			dynamic-power-coefficient = <277>;
195			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
196			operating-points-v2 = <&cluster1_opp>;
197			capacity-dmips-mhz = <535>;
198		};
199
200		a53_1: cpu@101 {
201			compatible = "arm,cortex-a53";
202			reg = <0x101>;
203			device_type = "cpu";
204			power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
205			next-level-cache = <&L2_CA53>;
206			enable-method = "psci";
207			cpu-idle-states = <&CPU_SLEEP_1>;
208			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
209			operating-points-v2 = <&cluster1_opp>;
210			capacity-dmips-mhz = <535>;
211		};
212
213		a53_2: cpu@102 {
214			compatible = "arm,cortex-a53";
215			reg = <0x102>;
216			device_type = "cpu";
217			power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
218			next-level-cache = <&L2_CA53>;
219			enable-method = "psci";
220			cpu-idle-states = <&CPU_SLEEP_1>;
221			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
222			operating-points-v2 = <&cluster1_opp>;
223			capacity-dmips-mhz = <535>;
224		};
225
226		a53_3: cpu@103 {
227			compatible = "arm,cortex-a53";
228			reg = <0x103>;
229			device_type = "cpu";
230			power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
231			next-level-cache = <&L2_CA53>;
232			enable-method = "psci";
233			cpu-idle-states = <&CPU_SLEEP_1>;
234			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
235			operating-points-v2 = <&cluster1_opp>;
236			capacity-dmips-mhz = <535>;
237		};
238
239		L2_CA57: cache-controller-0 {
240			compatible = "cache";
241			power-domains = <&sysc R8A7796_PD_CA57_SCU>;
242			cache-unified;
243			cache-level = <2>;
244		};
245
246		L2_CA53: cache-controller-1 {
247			compatible = "cache";
248			power-domains = <&sysc R8A7796_PD_CA53_SCU>;
249			cache-unified;
250			cache-level = <2>;
251		};
252
253		idle-states {
254			entry-method = "psci";
255
256			CPU_SLEEP_0: cpu-sleep-0 {
257				compatible = "arm,idle-state";
258				arm,psci-suspend-param = <0x0010000>;
259				local-timer-stop;
260				entry-latency-us = <400>;
261				exit-latency-us = <500>;
262				min-residency-us = <4000>;
263			};
264
265			CPU_SLEEP_1: cpu-sleep-1 {
266				compatible = "arm,idle-state";
267				arm,psci-suspend-param = <0x0010000>;
268				local-timer-stop;
269				entry-latency-us = <700>;
270				exit-latency-us = <700>;
271				min-residency-us = <5000>;
272			};
273		};
274	};
275
276	extal_clk: extal {
277		compatible = "fixed-clock";
278		#clock-cells = <0>;
279		/* This value must be overridden by the board */
280		clock-frequency = <0>;
281	};
282
283	extalr_clk: extalr {
284		compatible = "fixed-clock";
285		#clock-cells = <0>;
286		/* This value must be overridden by the board */
287		clock-frequency = <0>;
288	};
289
290	/* External PCIe clock - can be overridden by the board */
291	pcie_bus_clk: pcie_bus {
292		compatible = "fixed-clock";
293		#clock-cells = <0>;
294		clock-frequency = <0>;
295	};
296
297	pmu_a53 {
298		compatible = "arm,cortex-a53-pmu";
299		interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
300				      <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
301				      <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
302				      <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
303		interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
304	};
305
306	pmu_a57 {
307		compatible = "arm,cortex-a57-pmu";
308		interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
309				      <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
310		interrupt-affinity = <&a57_0>, <&a57_1>;
311	};
312
313	psci {
314		compatible = "arm,psci-1.0", "arm,psci-0.2";
315		method = "smc";
316	};
317
318	/* External SCIF clock - to be overridden by boards that provide it */
319	scif_clk: scif {
320		compatible = "fixed-clock";
321		#clock-cells = <0>;
322		clock-frequency = <0>;
323	};
324
325	soc {
326		compatible = "simple-bus";
327		interrupt-parent = <&gic>;
328		#address-cells = <2>;
329		#size-cells = <2>;
330		ranges;
331
332		rwdt: watchdog@e6020000 {
333			compatible = "renesas,r8a7796-wdt",
334				     "renesas,rcar-gen3-wdt";
335			reg = <0 0xe6020000 0 0x0c>;
336			clocks = <&cpg CPG_MOD 402>;
337			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
338			resets = <&cpg 402>;
339			status = "disabled";
340		};
341
342		gpio0: gpio@e6050000 {
343			compatible = "renesas,gpio-r8a7796",
344				     "renesas,rcar-gen3-gpio";
345			reg = <0 0xe6050000 0 0x50>;
346			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
347			#gpio-cells = <2>;
348			gpio-controller;
349			gpio-ranges = <&pfc 0 0 16>;
350			#interrupt-cells = <2>;
351			interrupt-controller;
352			clocks = <&cpg CPG_MOD 912>;
353			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
354			resets = <&cpg 912>;
355		};
356
357		gpio1: gpio@e6051000 {
358			compatible = "renesas,gpio-r8a7796",
359				     "renesas,rcar-gen3-gpio";
360			reg = <0 0xe6051000 0 0x50>;
361			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
362			#gpio-cells = <2>;
363			gpio-controller;
364			gpio-ranges = <&pfc 0 32 29>;
365			#interrupt-cells = <2>;
366			interrupt-controller;
367			clocks = <&cpg CPG_MOD 911>;
368			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
369			resets = <&cpg 911>;
370		};
371
372		gpio2: gpio@e6052000 {
373			compatible = "renesas,gpio-r8a7796",
374				     "renesas,rcar-gen3-gpio";
375			reg = <0 0xe6052000 0 0x50>;
376			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
377			#gpio-cells = <2>;
378			gpio-controller;
379			gpio-ranges = <&pfc 0 64 15>;
380			#interrupt-cells = <2>;
381			interrupt-controller;
382			clocks = <&cpg CPG_MOD 910>;
383			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
384			resets = <&cpg 910>;
385		};
386
387		gpio3: gpio@e6053000 {
388			compatible = "renesas,gpio-r8a7796",
389				     "renesas,rcar-gen3-gpio";
390			reg = <0 0xe6053000 0 0x50>;
391			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
392			#gpio-cells = <2>;
393			gpio-controller;
394			gpio-ranges = <&pfc 0 96 16>;
395			#interrupt-cells = <2>;
396			interrupt-controller;
397			clocks = <&cpg CPG_MOD 909>;
398			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
399			resets = <&cpg 909>;
400		};
401
402		gpio4: gpio@e6054000 {
403			compatible = "renesas,gpio-r8a7796",
404				     "renesas,rcar-gen3-gpio";
405			reg = <0 0xe6054000 0 0x50>;
406			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
407			#gpio-cells = <2>;
408			gpio-controller;
409			gpio-ranges = <&pfc 0 128 18>;
410			#interrupt-cells = <2>;
411			interrupt-controller;
412			clocks = <&cpg CPG_MOD 908>;
413			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
414			resets = <&cpg 908>;
415		};
416
417		gpio5: gpio@e6055000 {
418			compatible = "renesas,gpio-r8a7796",
419				     "renesas,rcar-gen3-gpio";
420			reg = <0 0xe6055000 0 0x50>;
421			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
422			#gpio-cells = <2>;
423			gpio-controller;
424			gpio-ranges = <&pfc 0 160 26>;
425			#interrupt-cells = <2>;
426			interrupt-controller;
427			clocks = <&cpg CPG_MOD 907>;
428			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
429			resets = <&cpg 907>;
430		};
431
432		gpio6: gpio@e6055400 {
433			compatible = "renesas,gpio-r8a7796",
434				     "renesas,rcar-gen3-gpio";
435			reg = <0 0xe6055400 0 0x50>;
436			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
437			#gpio-cells = <2>;
438			gpio-controller;
439			gpio-ranges = <&pfc 0 192 32>;
440			#interrupt-cells = <2>;
441			interrupt-controller;
442			clocks = <&cpg CPG_MOD 906>;
443			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
444			resets = <&cpg 906>;
445		};
446
447		gpio7: gpio@e6055800 {
448			compatible = "renesas,gpio-r8a7796",
449				     "renesas,rcar-gen3-gpio";
450			reg = <0 0xe6055800 0 0x50>;
451			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
452			#gpio-cells = <2>;
453			gpio-controller;
454			gpio-ranges = <&pfc 0 224 4>;
455			#interrupt-cells = <2>;
456			interrupt-controller;
457			clocks = <&cpg CPG_MOD 905>;
458			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
459			resets = <&cpg 905>;
460		};
461
462		pfc: pinctrl@e6060000 {
463			compatible = "renesas,pfc-r8a7796";
464			reg = <0 0xe6060000 0 0x50c>;
465		};
466
467		cmt0: timer@e60f0000 {
468			compatible = "renesas,r8a7796-cmt0",
469				     "renesas,rcar-gen3-cmt0";
470			reg = <0 0xe60f0000 0 0x1004>;
471			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
472				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
473			clocks = <&cpg CPG_MOD 303>;
474			clock-names = "fck";
475			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
476			resets = <&cpg 303>;
477			status = "disabled";
478		};
479
480		cmt1: timer@e6130000 {
481			compatible = "renesas,r8a7796-cmt1",
482				     "renesas,rcar-gen3-cmt1";
483			reg = <0 0xe6130000 0 0x1004>;
484			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
485				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
486				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
487				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
488				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
489				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
490				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
491				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
492			clocks = <&cpg CPG_MOD 302>;
493			clock-names = "fck";
494			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
495			resets = <&cpg 302>;
496			status = "disabled";
497		};
498
499		cmt2: timer@e6140000 {
500			compatible = "renesas,r8a7796-cmt1",
501				     "renesas,rcar-gen3-cmt1";
502			reg = <0 0xe6140000 0 0x1004>;
503			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
504				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
505				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
506				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
507				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
508				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
509				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
510				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
511			clocks = <&cpg CPG_MOD 301>;
512			clock-names = "fck";
513			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
514			resets = <&cpg 301>;
515			status = "disabled";
516		};
517
518		cmt3: timer@e6148000 {
519			compatible = "renesas,r8a7796-cmt1",
520				     "renesas,rcar-gen3-cmt1";
521			reg = <0 0xe6148000 0 0x1004>;
522			interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
523				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
524				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
525				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
526				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
527				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
528				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
529				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
530			clocks = <&cpg CPG_MOD 300>;
531			clock-names = "fck";
532			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
533			resets = <&cpg 300>;
534			status = "disabled";
535		};
536
537		cpg: clock-controller@e6150000 {
538			compatible = "renesas,r8a7796-cpg-mssr";
539			reg = <0 0xe6150000 0 0x1000>;
540			clocks = <&extal_clk>, <&extalr_clk>;
541			clock-names = "extal", "extalr";
542			#clock-cells = <2>;
543			#power-domain-cells = <0>;
544			#reset-cells = <1>;
545		};
546
547		rst: reset-controller@e6160000 {
548			compatible = "renesas,r8a7796-rst";
549			reg = <0 0xe6160000 0 0x0200>;
550		};
551
552		sysc: system-controller@e6180000 {
553			compatible = "renesas,r8a7796-sysc";
554			reg = <0 0xe6180000 0 0x0400>;
555			#power-domain-cells = <1>;
556		};
557
558		tsc: thermal@e6198000 {
559			compatible = "renesas,r8a7796-thermal";
560			reg = <0 0xe6198000 0 0x100>,
561			      <0 0xe61a0000 0 0x100>,
562			      <0 0xe61a8000 0 0x100>;
563			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
564				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
565				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
566			clocks = <&cpg CPG_MOD 522>;
567			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
568			resets = <&cpg 522>;
569			#thermal-sensor-cells = <1>;
570		};
571
572		intc_ex: interrupt-controller@e61c0000 {
573			compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
574			#interrupt-cells = <2>;
575			interrupt-controller;
576			reg = <0 0xe61c0000 0 0x200>;
577			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
578				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
579				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
580				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
581				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
582				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
583			clocks = <&cpg CPG_MOD 407>;
584			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
585			resets = <&cpg 407>;
586		};
587
588		tmu0: timer@e61e0000 {
589			compatible = "renesas,tmu-r8a7796", "renesas,tmu";
590			reg = <0 0xe61e0000 0 0x30>;
591			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
592				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
593				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
594			clocks = <&cpg CPG_MOD 125>;
595			clock-names = "fck";
596			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
597			resets = <&cpg 125>;
598			status = "disabled";
599		};
600
601		tmu1: timer@e6fc0000 {
602			compatible = "renesas,tmu-r8a7796", "renesas,tmu";
603			reg = <0 0xe6fc0000 0 0x30>;
604			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
605				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
606				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
607			clocks = <&cpg CPG_MOD 124>;
608			clock-names = "fck";
609			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
610			resets = <&cpg 124>;
611			status = "disabled";
612		};
613
614		tmu2: timer@e6fd0000 {
615			compatible = "renesas,tmu-r8a7796", "renesas,tmu";
616			reg = <0 0xe6fd0000 0 0x30>;
617			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
618				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
619				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
620			clocks = <&cpg CPG_MOD 123>;
621			clock-names = "fck";
622			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
623			resets = <&cpg 123>;
624			status = "disabled";
625		};
626
627		tmu3: timer@e6fe0000 {
628			compatible = "renesas,tmu-r8a7796", "renesas,tmu";
629			reg = <0 0xe6fe0000 0 0x30>;
630			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
631				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
632				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
633			clocks = <&cpg CPG_MOD 122>;
634			clock-names = "fck";
635			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
636			resets = <&cpg 122>;
637			status = "disabled";
638		};
639
640		tmu4: timer@ffc00000 {
641			compatible = "renesas,tmu-r8a7796", "renesas,tmu";
642			reg = <0 0xffc00000 0 0x30>;
643			interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
644				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
645				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
646			clocks = <&cpg CPG_MOD 121>;
647			clock-names = "fck";
648			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
649			resets = <&cpg 121>;
650			status = "disabled";
651		};
652
653		i2c0: i2c@e6500000 {
654			#address-cells = <1>;
655			#size-cells = <0>;
656			compatible = "renesas,i2c-r8a7796",
657				     "renesas,rcar-gen3-i2c";
658			reg = <0 0xe6500000 0 0x40>;
659			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
660			clocks = <&cpg CPG_MOD 931>;
661			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
662			resets = <&cpg 931>;
663			dmas = <&dmac1 0x91>, <&dmac1 0x90>,
664			       <&dmac2 0x91>, <&dmac2 0x90>;
665			dma-names = "tx", "rx", "tx", "rx";
666			i2c-scl-internal-delay-ns = <110>;
667			status = "disabled";
668		};
669
670		i2c1: i2c@e6508000 {
671			#address-cells = <1>;
672			#size-cells = <0>;
673			compatible = "renesas,i2c-r8a7796",
674				     "renesas,rcar-gen3-i2c";
675			reg = <0 0xe6508000 0 0x40>;
676			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
677			clocks = <&cpg CPG_MOD 930>;
678			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
679			resets = <&cpg 930>;
680			dmas = <&dmac1 0x93>, <&dmac1 0x92>,
681			       <&dmac2 0x93>, <&dmac2 0x92>;
682			dma-names = "tx", "rx", "tx", "rx";
683			i2c-scl-internal-delay-ns = <6>;
684			status = "disabled";
685		};
686
687		i2c2: i2c@e6510000 {
688			#address-cells = <1>;
689			#size-cells = <0>;
690			compatible = "renesas,i2c-r8a7796",
691				     "renesas,rcar-gen3-i2c";
692			reg = <0 0xe6510000 0 0x40>;
693			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
694			clocks = <&cpg CPG_MOD 929>;
695			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
696			resets = <&cpg 929>;
697			dmas = <&dmac1 0x95>, <&dmac1 0x94>,
698			       <&dmac2 0x95>, <&dmac2 0x94>;
699			dma-names = "tx", "rx", "tx", "rx";
700			i2c-scl-internal-delay-ns = <6>;
701			status = "disabled";
702		};
703
704		i2c3: i2c@e66d0000 {
705			#address-cells = <1>;
706			#size-cells = <0>;
707			compatible = "renesas,i2c-r8a7796",
708				     "renesas,rcar-gen3-i2c";
709			reg = <0 0xe66d0000 0 0x40>;
710			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
711			clocks = <&cpg CPG_MOD 928>;
712			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
713			resets = <&cpg 928>;
714			dmas = <&dmac0 0x97>, <&dmac0 0x96>;
715			dma-names = "tx", "rx";
716			i2c-scl-internal-delay-ns = <110>;
717			status = "disabled";
718		};
719
720		i2c4: i2c@e66d8000 {
721			#address-cells = <1>;
722			#size-cells = <0>;
723			compatible = "renesas,i2c-r8a7796",
724				     "renesas,rcar-gen3-i2c";
725			reg = <0 0xe66d8000 0 0x40>;
726			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
727			clocks = <&cpg CPG_MOD 927>;
728			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
729			resets = <&cpg 927>;
730			dmas = <&dmac0 0x99>, <&dmac0 0x98>;
731			dma-names = "tx", "rx";
732			i2c-scl-internal-delay-ns = <110>;
733			status = "disabled";
734		};
735
736		i2c5: i2c@e66e0000 {
737			#address-cells = <1>;
738			#size-cells = <0>;
739			compatible = "renesas,i2c-r8a7796",
740				     "renesas,rcar-gen3-i2c";
741			reg = <0 0xe66e0000 0 0x40>;
742			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
743			clocks = <&cpg CPG_MOD 919>;
744			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
745			resets = <&cpg 919>;
746			dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
747			dma-names = "tx", "rx";
748			i2c-scl-internal-delay-ns = <110>;
749			status = "disabled";
750		};
751
752		i2c6: i2c@e66e8000 {
753			#address-cells = <1>;
754			#size-cells = <0>;
755			compatible = "renesas,i2c-r8a7796",
756				     "renesas,rcar-gen3-i2c";
757			reg = <0 0xe66e8000 0 0x40>;
758			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
759			clocks = <&cpg CPG_MOD 918>;
760			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
761			resets = <&cpg 918>;
762			dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
763			dma-names = "tx", "rx";
764			i2c-scl-internal-delay-ns = <6>;
765			status = "disabled";
766		};
767
768		i2c_dvfs: i2c@e60b0000 {
769			#address-cells = <1>;
770			#size-cells = <0>;
771			compatible = "renesas,iic-r8a7796",
772				     "renesas,rcar-gen3-iic",
773				     "renesas,rmobile-iic";
774			reg = <0 0xe60b0000 0 0x425>;
775			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
776			clocks = <&cpg CPG_MOD 926>;
777			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
778			resets = <&cpg 926>;
779			dmas = <&dmac0 0x11>, <&dmac0 0x10>;
780			dma-names = "tx", "rx";
781			status = "disabled";
782		};
783
784		hscif0: serial@e6540000 {
785			compatible = "renesas,hscif-r8a7796",
786				     "renesas,rcar-gen3-hscif",
787				     "renesas,hscif";
788			reg = <0 0xe6540000 0 0x60>;
789			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
790			clocks = <&cpg CPG_MOD 520>,
791				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
792				 <&scif_clk>;
793			clock-names = "fck", "brg_int", "scif_clk";
794			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
795			       <&dmac2 0x31>, <&dmac2 0x30>;
796			dma-names = "tx", "rx", "tx", "rx";
797			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
798			resets = <&cpg 520>;
799			status = "disabled";
800		};
801
802		hscif1: serial@e6550000 {
803			compatible = "renesas,hscif-r8a7796",
804				     "renesas,rcar-gen3-hscif",
805				     "renesas,hscif";
806			reg = <0 0xe6550000 0 0x60>;
807			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
808			clocks = <&cpg CPG_MOD 519>,
809				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
810				 <&scif_clk>;
811			clock-names = "fck", "brg_int", "scif_clk";
812			dmas = <&dmac1 0x33>, <&dmac1 0x32>,
813			       <&dmac2 0x33>, <&dmac2 0x32>;
814			dma-names = "tx", "rx", "tx", "rx";
815			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
816			resets = <&cpg 519>;
817			status = "disabled";
818		};
819
820		hscif2: serial@e6560000 {
821			compatible = "renesas,hscif-r8a7796",
822				     "renesas,rcar-gen3-hscif",
823				     "renesas,hscif";
824			reg = <0 0xe6560000 0 0x60>;
825			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
826			clocks = <&cpg CPG_MOD 518>,
827				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
828				 <&scif_clk>;
829			clock-names = "fck", "brg_int", "scif_clk";
830			dmas = <&dmac1 0x35>, <&dmac1 0x34>,
831			       <&dmac2 0x35>, <&dmac2 0x34>;
832			dma-names = "tx", "rx", "tx", "rx";
833			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
834			resets = <&cpg 518>;
835			status = "disabled";
836		};
837
838		hscif3: serial@e66a0000 {
839			compatible = "renesas,hscif-r8a7796",
840				     "renesas,rcar-gen3-hscif",
841				     "renesas,hscif";
842			reg = <0 0xe66a0000 0 0x60>;
843			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
844			clocks = <&cpg CPG_MOD 517>,
845				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
846				 <&scif_clk>;
847			clock-names = "fck", "brg_int", "scif_clk";
848			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
849			dma-names = "tx", "rx";
850			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
851			resets = <&cpg 517>;
852			status = "disabled";
853		};
854
855		hscif4: serial@e66b0000 {
856			compatible = "renesas,hscif-r8a7796",
857				     "renesas,rcar-gen3-hscif",
858				     "renesas,hscif";
859			reg = <0 0xe66b0000 0 0x60>;
860			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
861			clocks = <&cpg CPG_MOD 516>,
862				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
863				 <&scif_clk>;
864			clock-names = "fck", "brg_int", "scif_clk";
865			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
866			dma-names = "tx", "rx";
867			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
868			resets = <&cpg 516>;
869			status = "disabled";
870		};
871
872		hsusb: usb@e6590000 {
873			compatible = "renesas,usbhs-r8a7796",
874				     "renesas,rcar-gen3-usbhs";
875			reg = <0 0xe6590000 0 0x200>;
876			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
877			clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
878			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
879			       <&usb_dmac1 0>, <&usb_dmac1 1>;
880			dma-names = "ch0", "ch1", "ch2", "ch3";
881			renesas,buswait = <11>;
882			phys = <&usb2_phy0 3>;
883			phy-names = "usb";
884			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
885			resets = <&cpg 704>, <&cpg 703>;
886			status = "disabled";
887		};
888
889		usb_dmac0: dma-controller@e65a0000 {
890			compatible = "renesas,r8a7796-usb-dmac",
891				     "renesas,usb-dmac";
892			reg = <0 0xe65a0000 0 0x100>;
893			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
894				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
895			interrupt-names = "ch0", "ch1";
896			clocks = <&cpg CPG_MOD 330>;
897			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
898			resets = <&cpg 330>;
899			#dma-cells = <1>;
900			dma-channels = <2>;
901		};
902
903		usb_dmac1: dma-controller@e65b0000 {
904			compatible = "renesas,r8a7796-usb-dmac",
905				     "renesas,usb-dmac";
906			reg = <0 0xe65b0000 0 0x100>;
907			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
908				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
909			interrupt-names = "ch0", "ch1";
910			clocks = <&cpg CPG_MOD 331>;
911			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
912			resets = <&cpg 331>;
913			#dma-cells = <1>;
914			dma-channels = <2>;
915		};
916
917		usb3_phy0: usb-phy@e65ee000 {
918			compatible = "renesas,r8a7796-usb3-phy",
919				     "renesas,rcar-gen3-usb3-phy";
920			reg = <0 0xe65ee000 0 0x90>;
921			clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
922				 <&usb_extal_clk>;
923			clock-names = "usb3-if", "usb3s_clk", "usb_extal";
924			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
925			resets = <&cpg 328>;
926			#phy-cells = <0>;
927			status = "disabled";
928		};
929
930		arm_cc630p: crypto@e6601000 {
931			compatible = "arm,cryptocell-630p-ree";
932			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
933			reg = <0x0 0xe6601000 0 0x1000>;
934			clocks = <&cpg CPG_MOD 229>;
935			resets = <&cpg 229>;
936			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
937		};
938
939		dmac0: dma-controller@e6700000 {
940			compatible = "renesas,dmac-r8a7796",
941				     "renesas,rcar-dmac";
942			reg = <0 0xe6700000 0 0x10000>;
943			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
944				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
945				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
946				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
947				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
948				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
949				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
950				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
951				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
952				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
953				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
954				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
955				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
956				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
957				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
958				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
959				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
960			interrupt-names = "error",
961					"ch0", "ch1", "ch2", "ch3",
962					"ch4", "ch5", "ch6", "ch7",
963					"ch8", "ch9", "ch10", "ch11",
964					"ch12", "ch13", "ch14", "ch15";
965			clocks = <&cpg CPG_MOD 219>;
966			clock-names = "fck";
967			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
968			resets = <&cpg 219>;
969			#dma-cells = <1>;
970			dma-channels = <16>;
971			iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
972			       <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
973			       <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
974			       <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
975			       <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
976			       <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
977			       <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
978			       <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
979		};
980
981		dmac1: dma-controller@e7300000 {
982			compatible = "renesas,dmac-r8a7796",
983				     "renesas,rcar-dmac";
984			reg = <0 0xe7300000 0 0x10000>;
985			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
986				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
987				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
988				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
989				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
990				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
991				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
992				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
993				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
994				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
995				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
996				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
997				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
998				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
999				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1000				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1001				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1002			interrupt-names = "error",
1003					"ch0", "ch1", "ch2", "ch3",
1004					"ch4", "ch5", "ch6", "ch7",
1005					"ch8", "ch9", "ch10", "ch11",
1006					"ch12", "ch13", "ch14", "ch15";
1007			clocks = <&cpg CPG_MOD 218>;
1008			clock-names = "fck";
1009			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1010			resets = <&cpg 218>;
1011			#dma-cells = <1>;
1012			dma-channels = <16>;
1013			iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1014			       <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1015			       <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1016			       <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1017			       <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1018			       <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1019			       <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1020			       <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1021		};
1022
1023		dmac2: dma-controller@e7310000 {
1024			compatible = "renesas,dmac-r8a7796",
1025				     "renesas,rcar-dmac";
1026			reg = <0 0xe7310000 0 0x10000>;
1027			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1028				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1029				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1030				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1031				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1032				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1033				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1034				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1035				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1036				     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1037				     <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1038				     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1039				     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1040				     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1041				     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1042				     <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1043				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1044			interrupt-names = "error",
1045					"ch0", "ch1", "ch2", "ch3",
1046					"ch4", "ch5", "ch6", "ch7",
1047					"ch8", "ch9", "ch10", "ch11",
1048					"ch12", "ch13", "ch14", "ch15";
1049			clocks = <&cpg CPG_MOD 217>;
1050			clock-names = "fck";
1051			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1052			resets = <&cpg 217>;
1053			#dma-cells = <1>;
1054			dma-channels = <16>;
1055			iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1056			       <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1057			       <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1058			       <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1059			       <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1060			       <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1061			       <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1062			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1063		};
1064
1065		ipmmu_ds0: iommu@e6740000 {
1066			compatible = "renesas,ipmmu-r8a7796";
1067			reg = <0 0xe6740000 0 0x1000>;
1068			renesas,ipmmu-main = <&ipmmu_mm 0>;
1069			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1070			#iommu-cells = <1>;
1071		};
1072
1073		ipmmu_ds1: iommu@e7740000 {
1074			compatible = "renesas,ipmmu-r8a7796";
1075			reg = <0 0xe7740000 0 0x1000>;
1076			renesas,ipmmu-main = <&ipmmu_mm 1>;
1077			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1078			#iommu-cells = <1>;
1079		};
1080
1081		ipmmu_hc: iommu@e6570000 {
1082			compatible = "renesas,ipmmu-r8a7796";
1083			reg = <0 0xe6570000 0 0x1000>;
1084			renesas,ipmmu-main = <&ipmmu_mm 2>;
1085			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1086			#iommu-cells = <1>;
1087		};
1088
1089		ipmmu_ir: iommu@ff8b0000 {
1090			compatible = "renesas,ipmmu-r8a7796";
1091			reg = <0 0xff8b0000 0 0x1000>;
1092			renesas,ipmmu-main = <&ipmmu_mm 3>;
1093			power-domains = <&sysc R8A7796_PD_A3IR>;
1094			#iommu-cells = <1>;
1095		};
1096
1097		ipmmu_mm: iommu@e67b0000 {
1098			compatible = "renesas,ipmmu-r8a7796";
1099			reg = <0 0xe67b0000 0 0x1000>;
1100			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1101				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1102			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1103			#iommu-cells = <1>;
1104		};
1105
1106		ipmmu_mp: iommu@ec670000 {
1107			compatible = "renesas,ipmmu-r8a7796";
1108			reg = <0 0xec670000 0 0x1000>;
1109			renesas,ipmmu-main = <&ipmmu_mm 4>;
1110			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1111			#iommu-cells = <1>;
1112		};
1113
1114		ipmmu_pv0: iommu@fd800000 {
1115			compatible = "renesas,ipmmu-r8a7796";
1116			reg = <0 0xfd800000 0 0x1000>;
1117			renesas,ipmmu-main = <&ipmmu_mm 5>;
1118			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1119			#iommu-cells = <1>;
1120		};
1121
1122		ipmmu_pv1: iommu@fd950000 {
1123			compatible = "renesas,ipmmu-r8a7796";
1124			reg = <0 0xfd950000 0 0x1000>;
1125			renesas,ipmmu-main = <&ipmmu_mm 6>;
1126			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1127			#iommu-cells = <1>;
1128		};
1129
1130		ipmmu_rt: iommu@ffc80000 {
1131			compatible = "renesas,ipmmu-r8a7796";
1132			reg = <0 0xffc80000 0 0x1000>;
1133			renesas,ipmmu-main = <&ipmmu_mm 7>;
1134			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1135			#iommu-cells = <1>;
1136		};
1137
1138		ipmmu_vc0: iommu@fe6b0000 {
1139			compatible = "renesas,ipmmu-r8a7796";
1140			reg = <0 0xfe6b0000 0 0x1000>;
1141			renesas,ipmmu-main = <&ipmmu_mm 8>;
1142			power-domains = <&sysc R8A7796_PD_A3VC>;
1143			#iommu-cells = <1>;
1144		};
1145
1146		ipmmu_vi0: iommu@febd0000 {
1147			compatible = "renesas,ipmmu-r8a7796";
1148			reg = <0 0xfebd0000 0 0x1000>;
1149			renesas,ipmmu-main = <&ipmmu_mm 9>;
1150			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1151			#iommu-cells = <1>;
1152		};
1153
1154		avb: ethernet@e6800000 {
1155			compatible = "renesas,etheravb-r8a7796",
1156				     "renesas,etheravb-rcar-gen3";
1157			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1158			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1159				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1160				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1161				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1162				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1163				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1164				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1165				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1166				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1167				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1168				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1169				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1170				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1171				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1172				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1173				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1174				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1175				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1176				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1177				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1178				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1179				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1180				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1181				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1182				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1183			interrupt-names = "ch0", "ch1", "ch2", "ch3",
1184					  "ch4", "ch5", "ch6", "ch7",
1185					  "ch8", "ch9", "ch10", "ch11",
1186					  "ch12", "ch13", "ch14", "ch15",
1187					  "ch16", "ch17", "ch18", "ch19",
1188					  "ch20", "ch21", "ch22", "ch23",
1189					  "ch24";
1190			clocks = <&cpg CPG_MOD 812>;
1191			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1192			resets = <&cpg 812>;
1193			phy-mode = "rgmii";
1194			rx-internal-delay-ps = <0>;
1195			tx-internal-delay-ps = <0>;
1196			iommus = <&ipmmu_ds0 16>;
1197			#address-cells = <1>;
1198			#size-cells = <0>;
1199			status = "disabled";
1200		};
1201
1202		can0: can@e6c30000 {
1203			compatible = "renesas,can-r8a7796",
1204				     "renesas,rcar-gen3-can";
1205			reg = <0 0xe6c30000 0 0x1000>;
1206			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1207			clocks = <&cpg CPG_MOD 916>,
1208			       <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1209			       <&can_clk>;
1210			clock-names = "clkp1", "clkp2", "can_clk";
1211			assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1212			assigned-clock-rates = <40000000>;
1213			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1214			resets = <&cpg 916>;
1215			status = "disabled";
1216		};
1217
1218		can1: can@e6c38000 {
1219			compatible = "renesas,can-r8a7796",
1220				     "renesas,rcar-gen3-can";
1221			reg = <0 0xe6c38000 0 0x1000>;
1222			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1223			clocks = <&cpg CPG_MOD 915>,
1224			       <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1225			       <&can_clk>;
1226			clock-names = "clkp1", "clkp2", "can_clk";
1227			assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1228			assigned-clock-rates = <40000000>;
1229			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1230			resets = <&cpg 915>;
1231			status = "disabled";
1232		};
1233
1234		canfd: can@e66c0000 {
1235			compatible = "renesas,r8a7796-canfd",
1236				     "renesas,rcar-gen3-canfd";
1237			reg = <0 0xe66c0000 0 0x8000>;
1238			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1239				   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1240			clocks = <&cpg CPG_MOD 914>,
1241			       <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1242			       <&can_clk>;
1243			clock-names = "fck", "canfd", "can_clk";
1244			assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1245			assigned-clock-rates = <40000000>;
1246			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1247			resets = <&cpg 914>;
1248			status = "disabled";
1249
1250			channel0 {
1251				status = "disabled";
1252			};
1253
1254			channel1 {
1255				status = "disabled";
1256			};
1257		};
1258
1259		pwm0: pwm@e6e30000 {
1260			compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1261			reg = <0 0xe6e30000 0 8>;
1262			#pwm-cells = <2>;
1263			clocks = <&cpg CPG_MOD 523>;
1264			resets = <&cpg 523>;
1265			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1266			status = "disabled";
1267		};
1268
1269		pwm1: pwm@e6e31000 {
1270			compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1271			reg = <0 0xe6e31000 0 8>;
1272			#pwm-cells = <2>;
1273			clocks = <&cpg CPG_MOD 523>;
1274			resets = <&cpg 523>;
1275			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1276			status = "disabled";
1277		};
1278
1279		pwm2: pwm@e6e32000 {
1280			compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1281			reg = <0 0xe6e32000 0 8>;
1282			#pwm-cells = <2>;
1283			clocks = <&cpg CPG_MOD 523>;
1284			resets = <&cpg 523>;
1285			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1286			status = "disabled";
1287		};
1288
1289		pwm3: pwm@e6e33000 {
1290			compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1291			reg = <0 0xe6e33000 0 8>;
1292			#pwm-cells = <2>;
1293			clocks = <&cpg CPG_MOD 523>;
1294			resets = <&cpg 523>;
1295			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1296			status = "disabled";
1297		};
1298
1299		pwm4: pwm@e6e34000 {
1300			compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1301			reg = <0 0xe6e34000 0 8>;
1302			#pwm-cells = <2>;
1303			clocks = <&cpg CPG_MOD 523>;
1304			resets = <&cpg 523>;
1305			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1306			status = "disabled";
1307		};
1308
1309		pwm5: pwm@e6e35000 {
1310			compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1311			reg = <0 0xe6e35000 0 8>;
1312			#pwm-cells = <2>;
1313			clocks = <&cpg CPG_MOD 523>;
1314			resets = <&cpg 523>;
1315			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1316			status = "disabled";
1317		};
1318
1319		pwm6: pwm@e6e36000 {
1320			compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1321			reg = <0 0xe6e36000 0 8>;
1322			#pwm-cells = <2>;
1323			clocks = <&cpg CPG_MOD 523>;
1324			resets = <&cpg 523>;
1325			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1326			status = "disabled";
1327		};
1328
1329		scif0: serial@e6e60000 {
1330			compatible = "renesas,scif-r8a7796",
1331				     "renesas,rcar-gen3-scif", "renesas,scif";
1332			reg = <0 0xe6e60000 0 64>;
1333			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1334			clocks = <&cpg CPG_MOD 207>,
1335				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1336				 <&scif_clk>;
1337			clock-names = "fck", "brg_int", "scif_clk";
1338			dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1339			       <&dmac2 0x51>, <&dmac2 0x50>;
1340			dma-names = "tx", "rx", "tx", "rx";
1341			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1342			resets = <&cpg 207>;
1343			status = "disabled";
1344		};
1345
1346		scif1: serial@e6e68000 {
1347			compatible = "renesas,scif-r8a7796",
1348				     "renesas,rcar-gen3-scif", "renesas,scif";
1349			reg = <0 0xe6e68000 0 64>;
1350			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1351			clocks = <&cpg CPG_MOD 206>,
1352				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1353				 <&scif_clk>;
1354			clock-names = "fck", "brg_int", "scif_clk";
1355			dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1356			       <&dmac2 0x53>, <&dmac2 0x52>;
1357			dma-names = "tx", "rx", "tx", "rx";
1358			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1359			resets = <&cpg 206>;
1360			status = "disabled";
1361		};
1362
1363		scif2: serial@e6e88000 {
1364			compatible = "renesas,scif-r8a7796",
1365				     "renesas,rcar-gen3-scif", "renesas,scif";
1366			reg = <0 0xe6e88000 0 64>;
1367			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1368			clocks = <&cpg CPG_MOD 310>,
1369				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1370				 <&scif_clk>;
1371			clock-names = "fck", "brg_int", "scif_clk";
1372			dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1373			       <&dmac2 0x13>, <&dmac2 0x12>;
1374			dma-names = "tx", "rx", "tx", "rx";
1375			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1376			resets = <&cpg 310>;
1377			status = "disabled";
1378		};
1379
1380		scif3: serial@e6c50000 {
1381			compatible = "renesas,scif-r8a7796",
1382				     "renesas,rcar-gen3-scif", "renesas,scif";
1383			reg = <0 0xe6c50000 0 64>;
1384			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1385			clocks = <&cpg CPG_MOD 204>,
1386				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1387				 <&scif_clk>;
1388			clock-names = "fck", "brg_int", "scif_clk";
1389			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1390			dma-names = "tx", "rx";
1391			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1392			resets = <&cpg 204>;
1393			status = "disabled";
1394		};
1395
1396		scif4: serial@e6c40000 {
1397			compatible = "renesas,scif-r8a7796",
1398				     "renesas,rcar-gen3-scif", "renesas,scif";
1399			reg = <0 0xe6c40000 0 64>;
1400			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1401			clocks = <&cpg CPG_MOD 203>,
1402				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1403				 <&scif_clk>;
1404			clock-names = "fck", "brg_int", "scif_clk";
1405			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1406			dma-names = "tx", "rx";
1407			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1408			resets = <&cpg 203>;
1409			status = "disabled";
1410		};
1411
1412		scif5: serial@e6f30000 {
1413			compatible = "renesas,scif-r8a7796",
1414				     "renesas,rcar-gen3-scif", "renesas,scif";
1415			reg = <0 0xe6f30000 0 64>;
1416			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1417			clocks = <&cpg CPG_MOD 202>,
1418				 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1419				 <&scif_clk>;
1420			clock-names = "fck", "brg_int", "scif_clk";
1421			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1422			       <&dmac2 0x5b>, <&dmac2 0x5a>;
1423			dma-names = "tx", "rx", "tx", "rx";
1424			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1425			resets = <&cpg 202>;
1426			status = "disabled";
1427		};
1428
1429		tpu: pwm@e6e80000 {
1430			compatible = "renesas,tpu-r8a7796", "renesas,tpu";
1431			reg = <0 0xe6e80000 0 0x148>;
1432			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1433			clocks = <&cpg CPG_MOD 304>;
1434			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1435			resets = <&cpg 304>;
1436			#pwm-cells = <3>;
1437			status = "disabled";
1438		};
1439
1440		msiof0: spi@e6e90000 {
1441			compatible = "renesas,msiof-r8a7796",
1442				     "renesas,rcar-gen3-msiof";
1443			reg = <0 0xe6e90000 0 0x0064>;
1444			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1445			clocks = <&cpg CPG_MOD 211>;
1446			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1447			       <&dmac2 0x41>, <&dmac2 0x40>;
1448			dma-names = "tx", "rx", "tx", "rx";
1449			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1450			resets = <&cpg 211>;
1451			#address-cells = <1>;
1452			#size-cells = <0>;
1453			status = "disabled";
1454		};
1455
1456		msiof1: spi@e6ea0000 {
1457			compatible = "renesas,msiof-r8a7796",
1458				     "renesas,rcar-gen3-msiof";
1459			reg = <0 0xe6ea0000 0 0x0064>;
1460			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1461			clocks = <&cpg CPG_MOD 210>;
1462			dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1463			       <&dmac2 0x43>, <&dmac2 0x42>;
1464			dma-names = "tx", "rx", "tx", "rx";
1465			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1466			resets = <&cpg 210>;
1467			#address-cells = <1>;
1468			#size-cells = <0>;
1469			status = "disabled";
1470		};
1471
1472		msiof2: spi@e6c00000 {
1473			compatible = "renesas,msiof-r8a7796",
1474				     "renesas,rcar-gen3-msiof";
1475			reg = <0 0xe6c00000 0 0x0064>;
1476			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1477			clocks = <&cpg CPG_MOD 209>;
1478			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1479			dma-names = "tx", "rx";
1480			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1481			resets = <&cpg 209>;
1482			#address-cells = <1>;
1483			#size-cells = <0>;
1484			status = "disabled";
1485		};
1486
1487		msiof3: spi@e6c10000 {
1488			compatible = "renesas,msiof-r8a7796",
1489				     "renesas,rcar-gen3-msiof";
1490			reg = <0 0xe6c10000 0 0x0064>;
1491			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1492			clocks = <&cpg CPG_MOD 208>;
1493			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1494			dma-names = "tx", "rx";
1495			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1496			resets = <&cpg 208>;
1497			#address-cells = <1>;
1498			#size-cells = <0>;
1499			status = "disabled";
1500		};
1501
1502		vin0: video@e6ef0000 {
1503			compatible = "renesas,vin-r8a7796";
1504			reg = <0 0xe6ef0000 0 0x1000>;
1505			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1506			clocks = <&cpg CPG_MOD 811>;
1507			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1508			resets = <&cpg 811>;
1509			renesas,id = <0>;
1510			status = "disabled";
1511
1512			ports {
1513				#address-cells = <1>;
1514				#size-cells = <0>;
1515
1516				port@1 {
1517					#address-cells = <1>;
1518					#size-cells = <0>;
1519
1520					reg = <1>;
1521
1522					vin0csi20: endpoint@0 {
1523						reg = <0>;
1524						remote-endpoint = <&csi20vin0>;
1525					};
1526					vin0csi40: endpoint@2 {
1527						reg = <2>;
1528						remote-endpoint = <&csi40vin0>;
1529					};
1530				};
1531			};
1532		};
1533
1534		vin1: video@e6ef1000 {
1535			compatible = "renesas,vin-r8a7796";
1536			reg = <0 0xe6ef1000 0 0x1000>;
1537			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1538			clocks = <&cpg CPG_MOD 810>;
1539			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1540			resets = <&cpg 810>;
1541			renesas,id = <1>;
1542			status = "disabled";
1543
1544			ports {
1545				#address-cells = <1>;
1546				#size-cells = <0>;
1547
1548				port@1 {
1549					#address-cells = <1>;
1550					#size-cells = <0>;
1551
1552					reg = <1>;
1553
1554					vin1csi20: endpoint@0 {
1555						reg = <0>;
1556						remote-endpoint = <&csi20vin1>;
1557					};
1558					vin1csi40: endpoint@2 {
1559						reg = <2>;
1560						remote-endpoint = <&csi40vin1>;
1561					};
1562				};
1563			};
1564		};
1565
1566		vin2: video@e6ef2000 {
1567			compatible = "renesas,vin-r8a7796";
1568			reg = <0 0xe6ef2000 0 0x1000>;
1569			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1570			clocks = <&cpg CPG_MOD 809>;
1571			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1572			resets = <&cpg 809>;
1573			renesas,id = <2>;
1574			status = "disabled";
1575
1576			ports {
1577				#address-cells = <1>;
1578				#size-cells = <0>;
1579
1580				port@1 {
1581					#address-cells = <1>;
1582					#size-cells = <0>;
1583
1584					reg = <1>;
1585
1586					vin2csi20: endpoint@0 {
1587						reg = <0>;
1588						remote-endpoint = <&csi20vin2>;
1589					};
1590					vin2csi40: endpoint@2 {
1591						reg = <2>;
1592						remote-endpoint = <&csi40vin2>;
1593					};
1594				};
1595			};
1596		};
1597
1598		vin3: video@e6ef3000 {
1599			compatible = "renesas,vin-r8a7796";
1600			reg = <0 0xe6ef3000 0 0x1000>;
1601			interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1602			clocks = <&cpg CPG_MOD 808>;
1603			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1604			resets = <&cpg 808>;
1605			renesas,id = <3>;
1606			status = "disabled";
1607
1608			ports {
1609				#address-cells = <1>;
1610				#size-cells = <0>;
1611
1612				port@1 {
1613					#address-cells = <1>;
1614					#size-cells = <0>;
1615
1616					reg = <1>;
1617
1618					vin3csi20: endpoint@0 {
1619						reg = <0>;
1620						remote-endpoint = <&csi20vin3>;
1621					};
1622					vin3csi40: endpoint@2 {
1623						reg = <2>;
1624						remote-endpoint = <&csi40vin3>;
1625					};
1626				};
1627			};
1628		};
1629
1630		vin4: video@e6ef4000 {
1631			compatible = "renesas,vin-r8a7796";
1632			reg = <0 0xe6ef4000 0 0x1000>;
1633			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1634			clocks = <&cpg CPG_MOD 807>;
1635			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1636			resets = <&cpg 807>;
1637			renesas,id = <4>;
1638			status = "disabled";
1639
1640			ports {
1641				#address-cells = <1>;
1642				#size-cells = <0>;
1643
1644				port@1 {
1645					#address-cells = <1>;
1646					#size-cells = <0>;
1647
1648					reg = <1>;
1649
1650					vin4csi20: endpoint@0 {
1651						reg = <0>;
1652						remote-endpoint = <&csi20vin4>;
1653					};
1654					vin4csi40: endpoint@2 {
1655						reg = <2>;
1656						remote-endpoint = <&csi40vin4>;
1657					};
1658				};
1659			};
1660		};
1661
1662		vin5: video@e6ef5000 {
1663			compatible = "renesas,vin-r8a7796";
1664			reg = <0 0xe6ef5000 0 0x1000>;
1665			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1666			clocks = <&cpg CPG_MOD 806>;
1667			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1668			resets = <&cpg 806>;
1669			renesas,id = <5>;
1670			status = "disabled";
1671
1672			ports {
1673				#address-cells = <1>;
1674				#size-cells = <0>;
1675
1676				port@1 {
1677					#address-cells = <1>;
1678					#size-cells = <0>;
1679
1680					reg = <1>;
1681
1682					vin5csi20: endpoint@0 {
1683						reg = <0>;
1684						remote-endpoint = <&csi20vin5>;
1685					};
1686					vin5csi40: endpoint@2 {
1687						reg = <2>;
1688						remote-endpoint = <&csi40vin5>;
1689					};
1690				};
1691			};
1692		};
1693
1694		vin6: video@e6ef6000 {
1695			compatible = "renesas,vin-r8a7796";
1696			reg = <0 0xe6ef6000 0 0x1000>;
1697			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1698			clocks = <&cpg CPG_MOD 805>;
1699			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1700			resets = <&cpg 805>;
1701			renesas,id = <6>;
1702			status = "disabled";
1703
1704			ports {
1705				#address-cells = <1>;
1706				#size-cells = <0>;
1707
1708				port@1 {
1709					#address-cells = <1>;
1710					#size-cells = <0>;
1711
1712					reg = <1>;
1713
1714					vin6csi20: endpoint@0 {
1715						reg = <0>;
1716						remote-endpoint = <&csi20vin6>;
1717					};
1718					vin6csi40: endpoint@2 {
1719						reg = <2>;
1720						remote-endpoint = <&csi40vin6>;
1721					};
1722				};
1723			};
1724		};
1725
1726		vin7: video@e6ef7000 {
1727			compatible = "renesas,vin-r8a7796";
1728			reg = <0 0xe6ef7000 0 0x1000>;
1729			interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1730			clocks = <&cpg CPG_MOD 804>;
1731			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1732			resets = <&cpg 804>;
1733			renesas,id = <7>;
1734			status = "disabled";
1735
1736			ports {
1737				#address-cells = <1>;
1738				#size-cells = <0>;
1739
1740				port@1 {
1741					#address-cells = <1>;
1742					#size-cells = <0>;
1743
1744					reg = <1>;
1745
1746					vin7csi20: endpoint@0 {
1747						reg = <0>;
1748						remote-endpoint = <&csi20vin7>;
1749					};
1750					vin7csi40: endpoint@2 {
1751						reg = <2>;
1752						remote-endpoint = <&csi40vin7>;
1753					};
1754				};
1755			};
1756		};
1757
1758		drif00: rif@e6f40000 {
1759			compatible = "renesas,r8a7796-drif",
1760				     "renesas,rcar-gen3-drif";
1761			reg = <0 0xe6f40000 0 0x64>;
1762			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1763			clocks = <&cpg CPG_MOD 515>;
1764			clock-names = "fck";
1765			dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1766			dma-names = "rx", "rx";
1767			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1768			resets = <&cpg 515>;
1769			renesas,bonding = <&drif01>;
1770			status = "disabled";
1771		};
1772
1773		drif01: rif@e6f50000 {
1774			compatible = "renesas,r8a7796-drif",
1775				     "renesas,rcar-gen3-drif";
1776			reg = <0 0xe6f50000 0 0x64>;
1777			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1778			clocks = <&cpg CPG_MOD 514>;
1779			clock-names = "fck";
1780			dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1781			dma-names = "rx", "rx";
1782			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1783			resets = <&cpg 514>;
1784			renesas,bonding = <&drif00>;
1785			status = "disabled";
1786		};
1787
1788		drif10: rif@e6f60000 {
1789			compatible = "renesas,r8a7796-drif",
1790				     "renesas,rcar-gen3-drif";
1791			reg = <0 0xe6f60000 0 0x64>;
1792			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1793			clocks = <&cpg CPG_MOD 513>;
1794			clock-names = "fck";
1795			dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1796			dma-names = "rx", "rx";
1797			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1798			resets = <&cpg 513>;
1799			renesas,bonding = <&drif11>;
1800			status = "disabled";
1801		};
1802
1803		drif11: rif@e6f70000 {
1804			compatible = "renesas,r8a7796-drif",
1805				     "renesas,rcar-gen3-drif";
1806			reg = <0 0xe6f70000 0 0x64>;
1807			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1808			clocks = <&cpg CPG_MOD 512>;
1809			clock-names = "fck";
1810			dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1811			dma-names = "rx", "rx";
1812			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1813			resets = <&cpg 512>;
1814			renesas,bonding = <&drif10>;
1815			status = "disabled";
1816		};
1817
1818		drif20: rif@e6f80000 {
1819			compatible = "renesas,r8a7796-drif",
1820				     "renesas,rcar-gen3-drif";
1821			reg = <0 0xe6f80000 0 0x64>;
1822			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1823			clocks = <&cpg CPG_MOD 511>;
1824			clock-names = "fck";
1825			dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1826			dma-names = "rx", "rx";
1827			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1828			resets = <&cpg 511>;
1829			renesas,bonding = <&drif21>;
1830			status = "disabled";
1831		};
1832
1833		drif21: rif@e6f90000 {
1834			compatible = "renesas,r8a7796-drif",
1835				     "renesas,rcar-gen3-drif";
1836			reg = <0 0xe6f90000 0 0x64>;
1837			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1838			clocks = <&cpg CPG_MOD 510>;
1839			clock-names = "fck";
1840			dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1841			dma-names = "rx", "rx";
1842			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1843			resets = <&cpg 510>;
1844			renesas,bonding = <&drif20>;
1845			status = "disabled";
1846		};
1847
1848		drif30: rif@e6fa0000 {
1849			compatible = "renesas,r8a7796-drif",
1850				     "renesas,rcar-gen3-drif";
1851			reg = <0 0xe6fa0000 0 0x64>;
1852			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1853			clocks = <&cpg CPG_MOD 509>;
1854			clock-names = "fck";
1855			dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1856			dma-names = "rx", "rx";
1857			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1858			resets = <&cpg 509>;
1859			renesas,bonding = <&drif31>;
1860			status = "disabled";
1861		};
1862
1863		drif31: rif@e6fb0000 {
1864			compatible = "renesas,r8a7796-drif",
1865				     "renesas,rcar-gen3-drif";
1866			reg = <0 0xe6fb0000 0 0x64>;
1867			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1868			clocks = <&cpg CPG_MOD 508>;
1869			clock-names = "fck";
1870			dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1871			dma-names = "rx", "rx";
1872			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1873			resets = <&cpg 508>;
1874			renesas,bonding = <&drif30>;
1875			status = "disabled";
1876		};
1877
1878		rcar_sound: sound@ec500000 {
1879			/*
1880			 * #sound-dai-cells is required
1881			 *
1882			 * Single DAI : #sound-dai-cells = <0>;	<&rcar_sound>;
1883			 * Multi  DAI : #sound-dai-cells = <1>;	<&rcar_sound N>;
1884			 */
1885			/*
1886			 * #clock-cells is required for audio_clkout0/1/2/3
1887			 *
1888			 * clkout	: #clock-cells = <0>;	<&rcar_sound>;
1889			 * clkout0/1/2/3: #clock-cells = <1>;	<&rcar_sound N>;
1890			 */
1891			compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1892			reg =	<0 0xec500000 0 0x1000>, /* SCU */
1893				<0 0xec5a0000 0 0x100>,  /* ADG */
1894				<0 0xec540000 0 0x1000>, /* SSIU */
1895				<0 0xec541000 0 0x280>,  /* SSI */
1896				<0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1897			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1898
1899			clocks = <&cpg CPG_MOD 1005>,
1900				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1901				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1902				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1903				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1904				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1905				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1906				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1907				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1908				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1909				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1910				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1911				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1912				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1913				 <&audio_clk_a>, <&audio_clk_b>,
1914				 <&audio_clk_c>,
1915				 <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1916			clock-names = "ssi-all",
1917				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1918				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1919				      "ssi.1", "ssi.0",
1920				      "src.9", "src.8", "src.7", "src.6",
1921				      "src.5", "src.4", "src.3", "src.2",
1922				      "src.1", "src.0",
1923				      "mix.1", "mix.0",
1924				      "ctu.1", "ctu.0",
1925				      "dvc.0", "dvc.1",
1926				      "clk_a", "clk_b", "clk_c", "clk_i";
1927			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1928			resets = <&cpg 1005>,
1929				 <&cpg 1006>, <&cpg 1007>,
1930				 <&cpg 1008>, <&cpg 1009>,
1931				 <&cpg 1010>, <&cpg 1011>,
1932				 <&cpg 1012>, <&cpg 1013>,
1933				 <&cpg 1014>, <&cpg 1015>;
1934			reset-names = "ssi-all",
1935				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1936				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1937				      "ssi.1", "ssi.0";
1938			status = "disabled";
1939
1940			rcar_sound,ctu {
1941				ctu00: ctu-0 { };
1942				ctu01: ctu-1 { };
1943				ctu02: ctu-2 { };
1944				ctu03: ctu-3 { };
1945				ctu10: ctu-4 { };
1946				ctu11: ctu-5 { };
1947				ctu12: ctu-6 { };
1948				ctu13: ctu-7 { };
1949			};
1950
1951			rcar_sound,dvc {
1952				dvc0: dvc-0 {
1953					dmas = <&audma1 0xbc>;
1954					dma-names = "tx";
1955				};
1956				dvc1: dvc-1 {
1957					dmas = <&audma1 0xbe>;
1958					dma-names = "tx";
1959				};
1960			};
1961
1962			rcar_sound,mix {
1963				mix0: mix-0 { };
1964				mix1: mix-1 { };
1965			};
1966
1967			rcar_sound,src {
1968				src0: src-0 {
1969					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1970					dmas = <&audma0 0x85>, <&audma1 0x9a>;
1971					dma-names = "rx", "tx";
1972				};
1973				src1: src-1 {
1974					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1975					dmas = <&audma0 0x87>, <&audma1 0x9c>;
1976					dma-names = "rx", "tx";
1977				};
1978				src2: src-2 {
1979					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1980					dmas = <&audma0 0x89>, <&audma1 0x9e>;
1981					dma-names = "rx", "tx";
1982				};
1983				src3: src-3 {
1984					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1985					dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1986					dma-names = "rx", "tx";
1987				};
1988				src4: src-4 {
1989					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1990					dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1991					dma-names = "rx", "tx";
1992				};
1993				src5: src-5 {
1994					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1995					dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1996					dma-names = "rx", "tx";
1997				};
1998				src6: src-6 {
1999					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
2000					dmas = <&audma0 0x91>, <&audma1 0xb4>;
2001					dma-names = "rx", "tx";
2002				};
2003				src7: src-7 {
2004					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
2005					dmas = <&audma0 0x93>, <&audma1 0xb6>;
2006					dma-names = "rx", "tx";
2007				};
2008				src8: src-8 {
2009					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
2010					dmas = <&audma0 0x95>, <&audma1 0xb8>;
2011					dma-names = "rx", "tx";
2012				};
2013				src9: src-9 {
2014					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
2015					dmas = <&audma0 0x97>, <&audma1 0xba>;
2016					dma-names = "rx", "tx";
2017				};
2018			};
2019
2020			rcar_sound,ssi {
2021				ssi0: ssi-0 {
2022					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2023					dmas = <&audma0 0x01>, <&audma1 0x02>;
2024					dma-names = "rx", "tx";
2025				};
2026				ssi1: ssi-1 {
2027					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2028					dmas = <&audma0 0x03>, <&audma1 0x04>;
2029					dma-names = "rx", "tx";
2030				};
2031				ssi2: ssi-2 {
2032					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2033					dmas = <&audma0 0x05>, <&audma1 0x06>;
2034					dma-names = "rx", "tx";
2035				};
2036				ssi3: ssi-3 {
2037					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2038					dmas = <&audma0 0x07>, <&audma1 0x08>;
2039					dma-names = "rx", "tx";
2040				};
2041				ssi4: ssi-4 {
2042					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2043					dmas = <&audma0 0x09>, <&audma1 0x0a>;
2044					dma-names = "rx", "tx";
2045				};
2046				ssi5: ssi-5 {
2047					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2048					dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2049					dma-names = "rx", "tx";
2050				};
2051				ssi6: ssi-6 {
2052					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2053					dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2054					dma-names = "rx", "tx";
2055				};
2056				ssi7: ssi-7 {
2057					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2058					dmas = <&audma0 0x0f>, <&audma1 0x10>;
2059					dma-names = "rx", "tx";
2060				};
2061				ssi8: ssi-8 {
2062					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2063					dmas = <&audma0 0x11>, <&audma1 0x12>;
2064					dma-names = "rx", "tx";
2065				};
2066				ssi9: ssi-9 {
2067					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2068					dmas = <&audma0 0x13>, <&audma1 0x14>;
2069					dma-names = "rx", "tx";
2070				};
2071			};
2072
2073			rcar_sound,ssiu {
2074				ssiu00: ssiu-0 {
2075					dmas = <&audma0 0x15>, <&audma1 0x16>;
2076					dma-names = "rx", "tx";
2077				};
2078				ssiu01: ssiu-1 {
2079					dmas = <&audma0 0x35>, <&audma1 0x36>;
2080					dma-names = "rx", "tx";
2081				};
2082				ssiu02: ssiu-2 {
2083					dmas = <&audma0 0x37>, <&audma1 0x38>;
2084					dma-names = "rx", "tx";
2085				};
2086				ssiu03: ssiu-3 {
2087					dmas = <&audma0 0x47>, <&audma1 0x48>;
2088					dma-names = "rx", "tx";
2089				};
2090				ssiu04: ssiu-4 {
2091					dmas = <&audma0 0x3F>, <&audma1 0x40>;
2092					dma-names = "rx", "tx";
2093				};
2094				ssiu05: ssiu-5 {
2095					dmas = <&audma0 0x43>, <&audma1 0x44>;
2096					dma-names = "rx", "tx";
2097				};
2098				ssiu06: ssiu-6 {
2099					dmas = <&audma0 0x4F>, <&audma1 0x50>;
2100					dma-names = "rx", "tx";
2101				};
2102				ssiu07: ssiu-7 {
2103					dmas = <&audma0 0x53>, <&audma1 0x54>;
2104					dma-names = "rx", "tx";
2105				};
2106				ssiu10: ssiu-8 {
2107					dmas = <&audma0 0x49>, <&audma1 0x4a>;
2108					dma-names = "rx", "tx";
2109				};
2110				ssiu11: ssiu-9 {
2111					dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2112					dma-names = "rx", "tx";
2113				};
2114				ssiu12: ssiu-10 {
2115					dmas = <&audma0 0x57>, <&audma1 0x58>;
2116					dma-names = "rx", "tx";
2117				};
2118				ssiu13: ssiu-11 {
2119					dmas = <&audma0 0x59>, <&audma1 0x5A>;
2120					dma-names = "rx", "tx";
2121				};
2122				ssiu14: ssiu-12 {
2123					dmas = <&audma0 0x5F>, <&audma1 0x60>;
2124					dma-names = "rx", "tx";
2125				};
2126				ssiu15: ssiu-13 {
2127					dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2128					dma-names = "rx", "tx";
2129				};
2130				ssiu16: ssiu-14 {
2131					dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2132					dma-names = "rx", "tx";
2133				};
2134				ssiu17: ssiu-15 {
2135					dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2136					dma-names = "rx", "tx";
2137				};
2138				ssiu20: ssiu-16 {
2139					dmas = <&audma0 0x63>, <&audma1 0x64>;
2140					dma-names = "rx", "tx";
2141				};
2142				ssiu21: ssiu-17 {
2143					dmas = <&audma0 0x67>, <&audma1 0x68>;
2144					dma-names = "rx", "tx";
2145				};
2146				ssiu22: ssiu-18 {
2147					dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2148					dma-names = "rx", "tx";
2149				};
2150				ssiu23: ssiu-19 {
2151					dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2152					dma-names = "rx", "tx";
2153				};
2154				ssiu24: ssiu-20 {
2155					dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2156					dma-names = "rx", "tx";
2157				};
2158				ssiu25: ssiu-21 {
2159					dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2160					dma-names = "rx", "tx";
2161				};
2162				ssiu26: ssiu-22 {
2163					dmas = <&audma0 0xED>, <&audma1 0xEE>;
2164					dma-names = "rx", "tx";
2165				};
2166				ssiu27: ssiu-23 {
2167					dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2168					dma-names = "rx", "tx";
2169				};
2170				ssiu30: ssiu-24 {
2171					dmas = <&audma0 0x6f>, <&audma1 0x70>;
2172					dma-names = "rx", "tx";
2173				};
2174				ssiu31: ssiu-25 {
2175					dmas = <&audma0 0x21>, <&audma1 0x22>;
2176					dma-names = "rx", "tx";
2177				};
2178				ssiu32: ssiu-26 {
2179					dmas = <&audma0 0x23>, <&audma1 0x24>;
2180					dma-names = "rx", "tx";
2181				};
2182				ssiu33: ssiu-27 {
2183					dmas = <&audma0 0x25>, <&audma1 0x26>;
2184					dma-names = "rx", "tx";
2185				};
2186				ssiu34: ssiu-28 {
2187					dmas = <&audma0 0x27>, <&audma1 0x28>;
2188					dma-names = "rx", "tx";
2189				};
2190				ssiu35: ssiu-29 {
2191					dmas = <&audma0 0x29>, <&audma1 0x2A>;
2192					dma-names = "rx", "tx";
2193				};
2194				ssiu36: ssiu-30 {
2195					dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2196					dma-names = "rx", "tx";
2197				};
2198				ssiu37: ssiu-31 {
2199					dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2200					dma-names = "rx", "tx";
2201				};
2202				ssiu40: ssiu-32 {
2203					dmas =	<&audma0 0x71>, <&audma1 0x72>;
2204					dma-names = "rx", "tx";
2205				};
2206				ssiu41: ssiu-33 {
2207					dmas = <&audma0 0x17>, <&audma1 0x18>;
2208					dma-names = "rx", "tx";
2209				};
2210				ssiu42: ssiu-34 {
2211					dmas = <&audma0 0x19>, <&audma1 0x1A>;
2212					dma-names = "rx", "tx";
2213				};
2214				ssiu43: ssiu-35 {
2215					dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2216					dma-names = "rx", "tx";
2217				};
2218				ssiu44: ssiu-36 {
2219					dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2220					dma-names = "rx", "tx";
2221				};
2222				ssiu45: ssiu-37 {
2223					dmas = <&audma0 0x1F>, <&audma1 0x20>;
2224					dma-names = "rx", "tx";
2225				};
2226				ssiu46: ssiu-38 {
2227					dmas = <&audma0 0x31>, <&audma1 0x32>;
2228					dma-names = "rx", "tx";
2229				};
2230				ssiu47: ssiu-39 {
2231					dmas = <&audma0 0x33>, <&audma1 0x34>;
2232					dma-names = "rx", "tx";
2233				};
2234				ssiu50: ssiu-40 {
2235					dmas = <&audma0 0x73>, <&audma1 0x74>;
2236					dma-names = "rx", "tx";
2237				};
2238				ssiu60: ssiu-41 {
2239					dmas = <&audma0 0x75>, <&audma1 0x76>;
2240					dma-names = "rx", "tx";
2241				};
2242				ssiu70: ssiu-42 {
2243					dmas = <&audma0 0x79>, <&audma1 0x7a>;
2244					dma-names = "rx", "tx";
2245				};
2246				ssiu80: ssiu-43 {
2247					dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2248					dma-names = "rx", "tx";
2249				};
2250				ssiu90: ssiu-44 {
2251					dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2252					dma-names = "rx", "tx";
2253				};
2254				ssiu91: ssiu-45 {
2255					dmas = <&audma0 0x7F>, <&audma1 0x80>;
2256					dma-names = "rx", "tx";
2257				};
2258				ssiu92: ssiu-46 {
2259					dmas = <&audma0 0x81>, <&audma1 0x82>;
2260					dma-names = "rx", "tx";
2261				};
2262				ssiu93: ssiu-47 {
2263					dmas = <&audma0 0x83>, <&audma1 0x84>;
2264					dma-names = "rx", "tx";
2265				};
2266				ssiu94: ssiu-48 {
2267					dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2268					dma-names = "rx", "tx";
2269				};
2270				ssiu95: ssiu-49 {
2271					dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2272					dma-names = "rx", "tx";
2273				};
2274				ssiu96: ssiu-50 {
2275					dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2276					dma-names = "rx", "tx";
2277				};
2278				ssiu97: ssiu-51 {
2279					dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2280					dma-names = "rx", "tx";
2281				};
2282			};
2283		};
2284
2285		audma0: dma-controller@ec700000 {
2286			compatible = "renesas,dmac-r8a7796",
2287				     "renesas,rcar-dmac";
2288			reg = <0 0xec700000 0 0x10000>;
2289			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2290				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2291				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2292				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2293				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2294				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2295				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2296				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2297				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2298				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2299				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2300				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2301				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2302				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2303				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2304				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2305				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2306			interrupt-names = "error",
2307					"ch0", "ch1", "ch2", "ch3",
2308					"ch4", "ch5", "ch6", "ch7",
2309					"ch8", "ch9", "ch10", "ch11",
2310					"ch12", "ch13", "ch14", "ch15";
2311			clocks = <&cpg CPG_MOD 502>;
2312			clock-names = "fck";
2313			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2314			resets = <&cpg 502>;
2315			#dma-cells = <1>;
2316			dma-channels = <16>;
2317			iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2318			       <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2319			       <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2320			       <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2321			       <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2322			       <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2323			       <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2324			       <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2325		};
2326
2327		audma1: dma-controller@ec720000 {
2328			compatible = "renesas,dmac-r8a7796",
2329				     "renesas,rcar-dmac";
2330			reg = <0 0xec720000 0 0x10000>;
2331			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2332				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2333				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2334				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2335				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2336				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2337				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2338				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2339				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2340				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2341				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2342				     <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2343				     <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2344				     <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2345				     <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2346				     <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2347				     <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2348			interrupt-names = "error",
2349					"ch0", "ch1", "ch2", "ch3",
2350					"ch4", "ch5", "ch6", "ch7",
2351					"ch8", "ch9", "ch10", "ch11",
2352					"ch12", "ch13", "ch14", "ch15";
2353			clocks = <&cpg CPG_MOD 501>;
2354			clock-names = "fck";
2355			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2356			resets = <&cpg 501>;
2357			#dma-cells = <1>;
2358			dma-channels = <16>;
2359			iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2360			       <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2361			       <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2362			       <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2363			       <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2364			       <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2365			       <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2366			       <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2367		};
2368
2369		xhci0: usb@ee000000 {
2370			compatible = "renesas,xhci-r8a7796",
2371				     "renesas,rcar-gen3-xhci";
2372			reg = <0 0xee000000 0 0xc00>;
2373			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2374			clocks = <&cpg CPG_MOD 328>;
2375			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2376			resets = <&cpg 328>;
2377			status = "disabled";
2378		};
2379
2380		usb3_peri0: usb@ee020000 {
2381			compatible = "renesas,r8a7796-usb3-peri",
2382				     "renesas,rcar-gen3-usb3-peri";
2383			reg = <0 0xee020000 0 0x400>;
2384			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2385			clocks = <&cpg CPG_MOD 328>;
2386			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2387			resets = <&cpg 328>;
2388			status = "disabled";
2389		};
2390
2391		ohci0: usb@ee080000 {
2392			compatible = "generic-ohci";
2393			reg = <0 0xee080000 0 0x100>;
2394			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2395			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2396			phys = <&usb2_phy0 1>;
2397			phy-names = "usb";
2398			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2399			resets = <&cpg 703>, <&cpg 704>;
2400			status = "disabled";
2401		};
2402
2403		ohci1: usb@ee0a0000 {
2404			compatible = "generic-ohci";
2405			reg = <0 0xee0a0000 0 0x100>;
2406			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2407			clocks = <&cpg CPG_MOD 702>;
2408			phys = <&usb2_phy1 1>;
2409			phy-names = "usb";
2410			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2411			resets = <&cpg 702>;
2412			status = "disabled";
2413		};
2414
2415		ehci0: usb@ee080100 {
2416			compatible = "generic-ehci";
2417			reg = <0 0xee080100 0 0x100>;
2418			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2419			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2420			phys = <&usb2_phy0 2>;
2421			phy-names = "usb";
2422			companion = <&ohci0>;
2423			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2424			resets = <&cpg 703>, <&cpg 704>;
2425			status = "disabled";
2426		};
2427
2428		ehci1: usb@ee0a0100 {
2429			compatible = "generic-ehci";
2430			reg = <0 0xee0a0100 0 0x100>;
2431			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2432			clocks = <&cpg CPG_MOD 702>;
2433			phys = <&usb2_phy1 2>;
2434			phy-names = "usb";
2435			companion = <&ohci1>;
2436			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2437			resets = <&cpg 702>;
2438			status = "disabled";
2439		};
2440
2441		usb2_phy0: usb-phy@ee080200 {
2442			compatible = "renesas,usb2-phy-r8a7796",
2443				     "renesas,rcar-gen3-usb2-phy";
2444			reg = <0 0xee080200 0 0x700>;
2445			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2446			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2447			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2448			resets = <&cpg 703>, <&cpg 704>;
2449			#phy-cells = <1>;
2450			status = "disabled";
2451		};
2452
2453		usb2_phy1: usb-phy@ee0a0200 {
2454			compatible = "renesas,usb2-phy-r8a7796",
2455				     "renesas,rcar-gen3-usb2-phy";
2456			reg = <0 0xee0a0200 0 0x700>;
2457			clocks = <&cpg CPG_MOD 702>;
2458			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2459			resets = <&cpg 702>;
2460			#phy-cells = <1>;
2461			status = "disabled";
2462		};
2463
2464		sdhi0: mmc@ee100000 {
2465			compatible = "renesas,sdhi-r8a7796",
2466				     "renesas,rcar-gen3-sdhi";
2467			reg = <0 0xee100000 0 0x2000>;
2468			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2469			clocks = <&cpg CPG_MOD 314>;
2470			max-frequency = <200000000>;
2471			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2472			resets = <&cpg 314>;
2473			iommus = <&ipmmu_ds1 32>;
2474			status = "disabled";
2475		};
2476
2477		sdhi1: mmc@ee120000 {
2478			compatible = "renesas,sdhi-r8a7796",
2479				     "renesas,rcar-gen3-sdhi";
2480			reg = <0 0xee120000 0 0x2000>;
2481			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2482			clocks = <&cpg CPG_MOD 313>;
2483			max-frequency = <200000000>;
2484			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2485			resets = <&cpg 313>;
2486			iommus = <&ipmmu_ds1 33>;
2487			status = "disabled";
2488		};
2489
2490		sdhi2: mmc@ee140000 {
2491			compatible = "renesas,sdhi-r8a7796",
2492				     "renesas,rcar-gen3-sdhi";
2493			reg = <0 0xee140000 0 0x2000>;
2494			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2495			clocks = <&cpg CPG_MOD 312>;
2496			max-frequency = <200000000>;
2497			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2498			resets = <&cpg 312>;
2499			iommus = <&ipmmu_ds1 34>;
2500			status = "disabled";
2501		};
2502
2503		sdhi3: mmc@ee160000 {
2504			compatible = "renesas,sdhi-r8a7796",
2505				     "renesas,rcar-gen3-sdhi";
2506			reg = <0 0xee160000 0 0x2000>;
2507			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2508			clocks = <&cpg CPG_MOD 311>;
2509			max-frequency = <200000000>;
2510			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2511			resets = <&cpg 311>;
2512			iommus = <&ipmmu_ds1 35>;
2513			status = "disabled";
2514		};
2515
2516		gic: interrupt-controller@f1010000 {
2517			compatible = "arm,gic-400";
2518			#interrupt-cells = <3>;
2519			#address-cells = <0>;
2520			interrupt-controller;
2521			reg = <0x0 0xf1010000 0 0x1000>,
2522			      <0x0 0xf1020000 0 0x20000>,
2523			      <0x0 0xf1040000 0 0x20000>,
2524			      <0x0 0xf1060000 0 0x20000>;
2525			interrupts = <GIC_PPI 9
2526					(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2527			clocks = <&cpg CPG_MOD 408>;
2528			clock-names = "clk";
2529			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2530			resets = <&cpg 408>;
2531		};
2532
2533		pciec0: pcie@fe000000 {
2534			compatible = "renesas,pcie-r8a7796",
2535				     "renesas,pcie-rcar-gen3";
2536			reg = <0 0xfe000000 0 0x80000>;
2537			#address-cells = <3>;
2538			#size-cells = <2>;
2539			bus-range = <0x00 0xff>;
2540			device_type = "pci";
2541			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2542				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2543				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2544				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2545			/* Map all possible DDR as inbound ranges */
2546			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2547			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2548				<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2549				<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2550			#interrupt-cells = <1>;
2551			interrupt-map-mask = <0 0 0 0>;
2552			interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2553			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2554			clock-names = "pcie", "pcie_bus";
2555			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2556			resets = <&cpg 319>;
2557			status = "disabled";
2558		};
2559
2560		pciec1: pcie@ee800000 {
2561			compatible = "renesas,pcie-r8a7796",
2562				     "renesas,pcie-rcar-gen3";
2563			reg = <0 0xee800000 0 0x80000>;
2564			#address-cells = <3>;
2565			#size-cells = <2>;
2566			bus-range = <0x00 0xff>;
2567			device_type = "pci";
2568			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2569				 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2570				 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2571				 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2572			/* Map all possible DDR as inbound ranges */
2573			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2574			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2575				<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2576				<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2577			#interrupt-cells = <1>;
2578			interrupt-map-mask = <0 0 0 0>;
2579			interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2580			clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2581			clock-names = "pcie", "pcie_bus";
2582			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2583			resets = <&cpg 318>;
2584			status = "disabled";
2585		};
2586
2587		imr-lx4@fe860000 {
2588			compatible = "renesas,r8a7796-imr-lx4",
2589				     "renesas,imr-lx4";
2590			reg = <0 0xfe860000 0 0x2000>;
2591			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2592			clocks = <&cpg CPG_MOD 823>;
2593			power-domains = <&sysc R8A7796_PD_A3VC>;
2594			resets = <&cpg 823>;
2595		};
2596
2597		imr-lx4@fe870000 {
2598			compatible = "renesas,r8a7796-imr-lx4",
2599				     "renesas,imr-lx4";
2600			reg = <0 0xfe870000 0 0x2000>;
2601			interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2602			clocks = <&cpg CPG_MOD 822>;
2603			power-domains = <&sysc R8A7796_PD_A3VC>;
2604			resets = <&cpg 822>;
2605		};
2606
2607		fdp1@fe940000 {
2608			compatible = "renesas,fdp1";
2609			reg = <0 0xfe940000 0 0x2400>;
2610			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2611			clocks = <&cpg CPG_MOD 119>;
2612			power-domains = <&sysc R8A7796_PD_A3VC>;
2613			resets = <&cpg 119>;
2614			renesas,fcp = <&fcpf0>;
2615		};
2616
2617		fcpf0: fcp@fe950000 {
2618			compatible = "renesas,fcpf";
2619			reg = <0 0xfe950000 0 0x200>;
2620			clocks = <&cpg CPG_MOD 615>;
2621			power-domains = <&sysc R8A7796_PD_A3VC>;
2622			resets = <&cpg 615>;
2623		};
2624
2625		fcpvb0: fcp@fe96f000 {
2626			compatible = "renesas,fcpv";
2627			reg = <0 0xfe96f000 0 0x200>;
2628			clocks = <&cpg CPG_MOD 607>;
2629			power-domains = <&sysc R8A7796_PD_A3VC>;
2630			resets = <&cpg 607>;
2631		};
2632
2633		fcpvi0: fcp@fe9af000 {
2634			compatible = "renesas,fcpv";
2635			reg = <0 0xfe9af000 0 0x200>;
2636			clocks = <&cpg CPG_MOD 611>;
2637			power-domains = <&sysc R8A7796_PD_A3VC>;
2638			resets = <&cpg 611>;
2639			iommus = <&ipmmu_vc0 19>;
2640		};
2641
2642		fcpvd0: fcp@fea27000 {
2643			compatible = "renesas,fcpv";
2644			reg = <0 0xfea27000 0 0x200>;
2645			clocks = <&cpg CPG_MOD 603>;
2646			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2647			resets = <&cpg 603>;
2648			iommus = <&ipmmu_vi0 8>;
2649		};
2650
2651		fcpvd1: fcp@fea2f000 {
2652			compatible = "renesas,fcpv";
2653			reg = <0 0xfea2f000 0 0x200>;
2654			clocks = <&cpg CPG_MOD 602>;
2655			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2656			resets = <&cpg 602>;
2657			iommus = <&ipmmu_vi0 9>;
2658		};
2659
2660		fcpvd2: fcp@fea37000 {
2661			compatible = "renesas,fcpv";
2662			reg = <0 0xfea37000 0 0x200>;
2663			clocks = <&cpg CPG_MOD 601>;
2664			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2665			resets = <&cpg 601>;
2666			iommus = <&ipmmu_vi0 10>;
2667		};
2668
2669		vspb: vsp@fe960000 {
2670			compatible = "renesas,vsp2";
2671			reg = <0 0xfe960000 0 0x8000>;
2672			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2673			clocks = <&cpg CPG_MOD 626>;
2674			power-domains = <&sysc R8A7796_PD_A3VC>;
2675			resets = <&cpg 626>;
2676
2677			renesas,fcp = <&fcpvb0>;
2678		};
2679
2680		vspd0: vsp@fea20000 {
2681			compatible = "renesas,vsp2";
2682			reg = <0 0xfea20000 0 0x5000>;
2683			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2684			clocks = <&cpg CPG_MOD 623>;
2685			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2686			resets = <&cpg 623>;
2687
2688			renesas,fcp = <&fcpvd0>;
2689		};
2690
2691		vspd1: vsp@fea28000 {
2692			compatible = "renesas,vsp2";
2693			reg = <0 0xfea28000 0 0x5000>;
2694			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2695			clocks = <&cpg CPG_MOD 622>;
2696			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2697			resets = <&cpg 622>;
2698
2699			renesas,fcp = <&fcpvd1>;
2700		};
2701
2702		vspd2: vsp@fea30000 {
2703			compatible = "renesas,vsp2";
2704			reg = <0 0xfea30000 0 0x5000>;
2705			interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2706			clocks = <&cpg CPG_MOD 621>;
2707			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2708			resets = <&cpg 621>;
2709
2710			renesas,fcp = <&fcpvd2>;
2711		};
2712
2713		vspi0: vsp@fe9a0000 {
2714			compatible = "renesas,vsp2";
2715			reg = <0 0xfe9a0000 0 0x8000>;
2716			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2717			clocks = <&cpg CPG_MOD 631>;
2718			power-domains = <&sysc R8A7796_PD_A3VC>;
2719			resets = <&cpg 631>;
2720
2721			renesas,fcp = <&fcpvi0>;
2722		};
2723
2724		cmm0: cmm@fea40000 {
2725			compatible = "renesas,r8a7796-cmm",
2726				     "renesas,rcar-gen3-cmm";
2727			reg = <0 0xfea40000 0 0x1000>;
2728			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2729			clocks = <&cpg CPG_MOD 711>;
2730			resets = <&cpg 711>;
2731		};
2732
2733		cmm1: cmm@fea50000 {
2734			compatible = "renesas,r8a7796-cmm",
2735				     "renesas,rcar-gen3-cmm";
2736			reg = <0 0xfea50000 0 0x1000>;
2737			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2738			clocks = <&cpg CPG_MOD 710>;
2739			resets = <&cpg 710>;
2740		};
2741
2742		cmm2: cmm@fea60000 {
2743			compatible = "renesas,r8a7796-cmm",
2744				     "renesas,rcar-gen3-cmm";
2745			reg = <0 0xfea60000 0 0x1000>;
2746			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2747			clocks = <&cpg CPG_MOD 709>;
2748			resets = <&cpg 709>;
2749		};
2750
2751		csi20: csi2@fea80000 {
2752			compatible = "renesas,r8a7796-csi2";
2753			reg = <0 0xfea80000 0 0x10000>;
2754			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2755			clocks = <&cpg CPG_MOD 714>;
2756			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2757			resets = <&cpg 714>;
2758			status = "disabled";
2759
2760			ports {
2761				#address-cells = <1>;
2762				#size-cells = <0>;
2763
2764				port@1 {
2765					#address-cells = <1>;
2766					#size-cells = <0>;
2767
2768					reg = <1>;
2769
2770					csi20vin0: endpoint@0 {
2771						reg = <0>;
2772						remote-endpoint = <&vin0csi20>;
2773					};
2774					csi20vin1: endpoint@1 {
2775						reg = <1>;
2776						remote-endpoint = <&vin1csi20>;
2777					};
2778					csi20vin2: endpoint@2 {
2779						reg = <2>;
2780						remote-endpoint = <&vin2csi20>;
2781					};
2782					csi20vin3: endpoint@3 {
2783						reg = <3>;
2784						remote-endpoint = <&vin3csi20>;
2785					};
2786					csi20vin4: endpoint@4 {
2787						reg = <4>;
2788						remote-endpoint = <&vin4csi20>;
2789					};
2790					csi20vin5: endpoint@5 {
2791						reg = <5>;
2792						remote-endpoint = <&vin5csi20>;
2793					};
2794					csi20vin6: endpoint@6 {
2795						reg = <6>;
2796						remote-endpoint = <&vin6csi20>;
2797					};
2798					csi20vin7: endpoint@7 {
2799						reg = <7>;
2800						remote-endpoint = <&vin7csi20>;
2801					};
2802				};
2803			};
2804		};
2805
2806		csi40: csi2@feaa0000 {
2807			compatible = "renesas,r8a7796-csi2";
2808			reg = <0 0xfeaa0000 0 0x10000>;
2809			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2810			clocks = <&cpg CPG_MOD 716>;
2811			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2812			resets = <&cpg 716>;
2813			status = "disabled";
2814
2815			ports {
2816				#address-cells = <1>;
2817				#size-cells = <0>;
2818
2819				port@1 {
2820					#address-cells = <1>;
2821					#size-cells = <0>;
2822
2823					reg = <1>;
2824
2825					csi40vin0: endpoint@0 {
2826						reg = <0>;
2827						remote-endpoint = <&vin0csi40>;
2828					};
2829					csi40vin1: endpoint@1 {
2830						reg = <1>;
2831						remote-endpoint = <&vin1csi40>;
2832					};
2833					csi40vin2: endpoint@2 {
2834						reg = <2>;
2835						remote-endpoint = <&vin2csi40>;
2836					};
2837					csi40vin3: endpoint@3 {
2838						reg = <3>;
2839						remote-endpoint = <&vin3csi40>;
2840					};
2841					csi40vin4: endpoint@4 {
2842						reg = <4>;
2843						remote-endpoint = <&vin4csi40>;
2844					};
2845					csi40vin5: endpoint@5 {
2846						reg = <5>;
2847						remote-endpoint = <&vin5csi40>;
2848					};
2849					csi40vin6: endpoint@6 {
2850						reg = <6>;
2851						remote-endpoint = <&vin6csi40>;
2852					};
2853					csi40vin7: endpoint@7 {
2854						reg = <7>;
2855						remote-endpoint = <&vin7csi40>;
2856					};
2857				};
2858
2859			};
2860		};
2861
2862		hdmi0: hdmi@fead0000 {
2863			compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
2864			reg = <0 0xfead0000 0 0x10000>;
2865			interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2866			clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
2867			clock-names = "iahb", "isfr";
2868			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2869			resets = <&cpg 729>;
2870			status = "disabled";
2871
2872			ports {
2873				#address-cells = <1>;
2874				#size-cells = <0>;
2875				port@0 {
2876					reg = <0>;
2877					dw_hdmi0_in: endpoint {
2878						remote-endpoint = <&du_out_hdmi0>;
2879					};
2880				};
2881				port@1 {
2882					reg = <1>;
2883				};
2884				port@2 {
2885					/* HDMI sound */
2886					reg = <2>;
2887				};
2888			};
2889		};
2890
2891		du: display@feb00000 {
2892			compatible = "renesas,du-r8a7796";
2893			reg = <0 0xfeb00000 0 0x70000>;
2894			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2895				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2896				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2897			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2898				 <&cpg CPG_MOD 722>;
2899			clock-names = "du.0", "du.1", "du.2";
2900			resets = <&cpg 724>, <&cpg 722>;
2901			reset-names = "du.0", "du.2";
2902
2903			renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
2904			renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2905
2906			status = "disabled";
2907
2908			ports {
2909				#address-cells = <1>;
2910				#size-cells = <0>;
2911
2912				port@0 {
2913					reg = <0>;
2914					du_out_rgb: endpoint {
2915					};
2916				};
2917				port@1 {
2918					reg = <1>;
2919					du_out_hdmi0: endpoint {
2920						remote-endpoint = <&dw_hdmi0_in>;
2921					};
2922				};
2923				port@2 {
2924					reg = <2>;
2925					du_out_lvds0: endpoint {
2926						remote-endpoint = <&lvds0_in>;
2927					};
2928				};
2929			};
2930		};
2931
2932		lvds0: lvds@feb90000 {
2933			compatible = "renesas,r8a7796-lvds";
2934			reg = <0 0xfeb90000 0 0x14>;
2935			clocks = <&cpg CPG_MOD 727>;
2936			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2937			resets = <&cpg 727>;
2938			status = "disabled";
2939
2940			ports {
2941				#address-cells = <1>;
2942				#size-cells = <0>;
2943
2944				port@0 {
2945					reg = <0>;
2946					lvds0_in: endpoint {
2947						remote-endpoint = <&du_out_lvds0>;
2948					};
2949				};
2950				port@1 {
2951					reg = <1>;
2952					lvds0_out: endpoint {
2953					};
2954				};
2955			};
2956		};
2957
2958		prr: chipid@fff00044 {
2959			compatible = "renesas,prr";
2960			reg = <0 0xfff00044 0 4>;
2961		};
2962	};
2963
2964	thermal-zones {
2965		sensor_thermal1: sensor-thermal1 {
2966			polling-delay-passive = <250>;
2967			polling-delay = <1000>;
2968			thermal-sensors = <&tsc 0>;
2969			sustainable-power = <3874>;
2970
2971			trips {
2972				sensor1_crit: sensor1-crit {
2973					temperature = <120000>;
2974					hysteresis = <1000>;
2975					type = "critical";
2976				};
2977			};
2978		};
2979
2980		sensor_thermal2: sensor-thermal2 {
2981			polling-delay-passive = <250>;
2982			polling-delay = <1000>;
2983			thermal-sensors = <&tsc 1>;
2984			sustainable-power = <3874>;
2985
2986			trips {
2987				sensor2_crit: sensor2-crit {
2988					temperature = <120000>;
2989					hysteresis = <1000>;
2990					type = "critical";
2991				};
2992			};
2993		};
2994
2995		sensor_thermal3: sensor-thermal3 {
2996			polling-delay-passive = <250>;
2997			polling-delay = <1000>;
2998			thermal-sensors = <&tsc 2>;
2999			sustainable-power = <3874>;
3000
3001			cooling-maps {
3002				map0 {
3003					trip = <&target>;
3004					cooling-device = <&a57_0 2 4>;
3005					contribution = <1024>;
3006				};
3007				map1 {
3008					trip = <&target>;
3009					cooling-device = <&a53_0 0 2>;
3010					contribution = <1024>;
3011				};
3012			};
3013			trips {
3014				target: trip-point1 {
3015					temperature = <100000>;
3016					hysteresis = <1000>;
3017					type = "passive";
3018				};
3019
3020				sensor3_crit: sensor3-crit {
3021					temperature = <120000>;
3022					hysteresis = <1000>;
3023					type = "critical";
3024				};
3025			};
3026		};
3027	};
3028
3029	timer {
3030		compatible = "arm,armv8-timer";
3031		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3032				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3033				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3034				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
3035	};
3036
3037	/* External USB clocks - can be overridden by the board */
3038	usb3s0_clk: usb3s0 {
3039		compatible = "fixed-clock";
3040		#clock-cells = <0>;
3041		clock-frequency = <0>;
3042	};
3043
3044	usb_extal_clk: usb_extal {
3045		compatible = "fixed-clock";
3046		#clock-cells = <0>;
3047		clock-frequency = <0>;
3048	};
3049};
3050