1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2017 Glider bvba
7 */
8
9#include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10#include <dt-bindings/interrupt-controller/arm-gic.h>
11#include <dt-bindings/power/r8a77995-sysc.h>
12
13/ {
14	compatible = "renesas,r8a77995";
15	#address-cells = <2>;
16	#size-cells = <2>;
17
18	/*
19	 * The external audio clocks are configured as 0 Hz fixed frequency
20	 * clocks by default.
21	 * Boards that provide audio clocks should override them.
22	 */
23	audio_clk_a: audio_clk_a {
24		compatible = "fixed-clock";
25		#clock-cells = <0>;
26		clock-frequency = <0>;
27	};
28
29	audio_clk_b: audio_clk_b {
30		compatible = "fixed-clock";
31		#clock-cells = <0>;
32		clock-frequency = <0>;
33	};
34
35	/* External CAN clock - to be overridden by boards that provide it */
36	can_clk: can {
37		compatible = "fixed-clock";
38		#clock-cells = <0>;
39		clock-frequency = <0>;
40	};
41
42	cpus {
43		#address-cells = <1>;
44		#size-cells = <0>;
45
46		a53_0: cpu@0 {
47			compatible = "arm,cortex-a53";
48			reg = <0x0>;
49			device_type = "cpu";
50			power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
51			next-level-cache = <&L2_CA53>;
52			enable-method = "psci";
53		};
54
55		L2_CA53: cache-controller-1 {
56			compatible = "cache";
57			power-domains = <&sysc R8A77995_PD_CA53_SCU>;
58			cache-unified;
59			cache-level = <2>;
60		};
61	};
62
63	extal_clk: extal {
64		compatible = "fixed-clock";
65		#clock-cells = <0>;
66		/* This value must be overridden by the board */
67		clock-frequency = <0>;
68	};
69
70	pmu_a53 {
71		compatible = "arm,cortex-a53-pmu";
72		interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
73	};
74
75	psci {
76		compatible = "arm,psci-1.0", "arm,psci-0.2";
77		method = "smc";
78	};
79
80	scif_clk: scif {
81		compatible = "fixed-clock";
82		#clock-cells = <0>;
83		clock-frequency = <0>;
84	};
85
86	soc {
87		compatible = "simple-bus";
88		interrupt-parent = <&gic>;
89		#address-cells = <2>;
90		#size-cells = <2>;
91		ranges;
92
93		rwdt: watchdog@e6020000 {
94			compatible = "renesas,r8a77995-wdt",
95				     "renesas,rcar-gen3-wdt";
96			reg = <0 0xe6020000 0 0x0c>;
97			interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
98			clocks = <&cpg CPG_MOD 402>;
99			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
100			resets = <&cpg 402>;
101			status = "disabled";
102		};
103
104		gpio0: gpio@e6050000 {
105			compatible = "renesas,gpio-r8a77995",
106				     "renesas,rcar-gen3-gpio";
107			reg = <0 0xe6050000 0 0x50>;
108			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
109			#gpio-cells = <2>;
110			gpio-controller;
111			gpio-ranges = <&pfc 0 0 9>;
112			#interrupt-cells = <2>;
113			interrupt-controller;
114			clocks = <&cpg CPG_MOD 912>;
115			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
116			resets = <&cpg 912>;
117		};
118
119		gpio1: gpio@e6051000 {
120			compatible = "renesas,gpio-r8a77995",
121				     "renesas,rcar-gen3-gpio";
122			reg = <0 0xe6051000 0 0x50>;
123			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
124			#gpio-cells = <2>;
125			gpio-controller;
126			gpio-ranges = <&pfc 0 32 32>;
127			#interrupt-cells = <2>;
128			interrupt-controller;
129			clocks = <&cpg CPG_MOD 911>;
130			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
131			resets = <&cpg 911>;
132		};
133
134		gpio2: gpio@e6052000 {
135			compatible = "renesas,gpio-r8a77995",
136				     "renesas,rcar-gen3-gpio";
137			reg = <0 0xe6052000 0 0x50>;
138			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
139			#gpio-cells = <2>;
140			gpio-controller;
141			gpio-ranges = <&pfc 0 64 32>;
142			#interrupt-cells = <2>;
143			interrupt-controller;
144			clocks = <&cpg CPG_MOD 910>;
145			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
146			resets = <&cpg 910>;
147		};
148
149		gpio3: gpio@e6053000 {
150			compatible = "renesas,gpio-r8a77995",
151				     "renesas,rcar-gen3-gpio";
152			reg = <0 0xe6053000 0 0x50>;
153			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
154			#gpio-cells = <2>;
155			gpio-controller;
156			gpio-ranges = <&pfc 0 96 10>;
157			#interrupt-cells = <2>;
158			interrupt-controller;
159			clocks = <&cpg CPG_MOD 909>;
160			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
161			resets = <&cpg 909>;
162		};
163
164		gpio4: gpio@e6054000 {
165			compatible = "renesas,gpio-r8a77995",
166				     "renesas,rcar-gen3-gpio";
167			reg = <0 0xe6054000 0 0x50>;
168			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
169			#gpio-cells = <2>;
170			gpio-controller;
171			gpio-ranges = <&pfc 0 128 32>;
172			#interrupt-cells = <2>;
173			interrupt-controller;
174			clocks = <&cpg CPG_MOD 908>;
175			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
176			resets = <&cpg 908>;
177		};
178
179		gpio5: gpio@e6055000 {
180			compatible = "renesas,gpio-r8a77995",
181				     "renesas,rcar-gen3-gpio";
182			reg = <0 0xe6055000 0 0x50>;
183			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
184			#gpio-cells = <2>;
185			gpio-controller;
186			gpio-ranges = <&pfc 0 160 21>;
187			#interrupt-cells = <2>;
188			interrupt-controller;
189			clocks = <&cpg CPG_MOD 907>;
190			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
191			resets = <&cpg 907>;
192		};
193
194		gpio6: gpio@e6055400 {
195			compatible = "renesas,gpio-r8a77995",
196				     "renesas,rcar-gen3-gpio";
197			reg = <0 0xe6055400 0 0x50>;
198			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
199			#gpio-cells = <2>;
200			gpio-controller;
201			gpio-ranges = <&pfc 0 192 14>;
202			#interrupt-cells = <2>;
203			interrupt-controller;
204			clocks = <&cpg CPG_MOD 906>;
205			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
206			resets = <&cpg 906>;
207		};
208
209		pfc: pinctrl@e6060000 {
210			compatible = "renesas,pfc-r8a77995";
211			reg = <0 0xe6060000 0 0x508>;
212		};
213
214		cmt0: timer@e60f0000 {
215			compatible = "renesas,r8a77995-cmt0",
216				     "renesas,rcar-gen3-cmt0";
217			reg = <0 0xe60f0000 0 0x1004>;
218			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
219				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
220			clocks = <&cpg CPG_MOD 303>;
221			clock-names = "fck";
222			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
223			resets = <&cpg 303>;
224			status = "disabled";
225		};
226
227		cmt1: timer@e6130000 {
228			compatible = "renesas,r8a77995-cmt1",
229				     "renesas,rcar-gen3-cmt1";
230			reg = <0 0xe6130000 0 0x1004>;
231			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
232				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
233				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
234				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
235				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
236				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
237				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
238				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
239			clocks = <&cpg CPG_MOD 302>;
240			clock-names = "fck";
241			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
242			resets = <&cpg 302>;
243			status = "disabled";
244		};
245
246		cmt2: timer@e6140000 {
247			compatible = "renesas,r8a77995-cmt1",
248				     "renesas,rcar-gen3-cmt1";
249			reg = <0 0xe6140000 0 0x1004>;
250			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
251				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
252				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
253				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
254				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
255				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
256				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
257				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
258			clocks = <&cpg CPG_MOD 301>;
259			clock-names = "fck";
260			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
261			resets = <&cpg 301>;
262			status = "disabled";
263		};
264
265		cmt3: timer@e6148000 {
266			compatible = "renesas,r8a77995-cmt1",
267				     "renesas,rcar-gen3-cmt1";
268			reg = <0 0xe6148000 0 0x1004>;
269			interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
270				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
271				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
272				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
273				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
274				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
275				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
276				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
277			clocks = <&cpg CPG_MOD 300>;
278			clock-names = "fck";
279			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
280			resets = <&cpg 300>;
281			status = "disabled";
282		};
283
284		cpg: clock-controller@e6150000 {
285			compatible = "renesas,r8a77995-cpg-mssr";
286			reg = <0 0xe6150000 0 0x1000>;
287			clocks = <&extal_clk>;
288			clock-names = "extal";
289			#clock-cells = <2>;
290			#power-domain-cells = <0>;
291			#reset-cells = <1>;
292		};
293
294		rst: reset-controller@e6160000 {
295			compatible = "renesas,r8a77995-rst";
296			reg = <0 0xe6160000 0 0x0200>;
297		};
298
299		sysc: system-controller@e6180000 {
300			compatible = "renesas,r8a77995-sysc";
301			reg = <0 0xe6180000 0 0x0400>;
302			#power-domain-cells = <1>;
303		};
304
305		thermal: thermal@e6190000 {
306			compatible = "renesas,thermal-r8a77995";
307			reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
308			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
309				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
310				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
311			clocks = <&cpg CPG_MOD 522>;
312			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
313			resets = <&cpg 522>;
314			#thermal-sensor-cells = <0>;
315		};
316
317		intc_ex: interrupt-controller@e61c0000 {
318			compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
319			#interrupt-cells = <2>;
320			interrupt-controller;
321			reg = <0 0xe61c0000 0 0x200>;
322			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
323				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
324				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
325				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
326				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
327				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
328			clocks = <&cpg CPG_MOD 407>;
329			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
330			resets = <&cpg 407>;
331		};
332
333		tmu0: timer@e61e0000 {
334			compatible = "renesas,tmu-r8a77995", "renesas,tmu";
335			reg = <0 0xe61e0000 0 0x30>;
336			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
337				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
338				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
339			clocks = <&cpg CPG_MOD 125>;
340			clock-names = "fck";
341			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
342			resets = <&cpg 125>;
343			status = "disabled";
344		};
345
346		tmu1: timer@e6fc0000 {
347			compatible = "renesas,tmu-r8a77995", "renesas,tmu";
348			reg = <0 0xe6fc0000 0 0x30>;
349			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
350				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
351				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
352			clocks = <&cpg CPG_MOD 124>;
353			clock-names = "fck";
354			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
355			resets = <&cpg 124>;
356			status = "disabled";
357		};
358
359		tmu2: timer@e6fd0000 {
360			compatible = "renesas,tmu-r8a77995", "renesas,tmu";
361			reg = <0 0xe6fd0000 0 0x30>;
362			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
363				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
364				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
365			clocks = <&cpg CPG_MOD 123>;
366			clock-names = "fck";
367			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
368			resets = <&cpg 123>;
369			status = "disabled";
370		};
371
372		tmu3: timer@e6fe0000 {
373			compatible = "renesas,tmu-r8a77995", "renesas,tmu";
374			reg = <0 0xe6fe0000 0 0x30>;
375			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
376				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
377				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
378			clocks = <&cpg CPG_MOD 122>;
379			clock-names = "fck";
380			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
381			resets = <&cpg 122>;
382			status = "disabled";
383		};
384
385		tmu4: timer@ffc00000 {
386			compatible = "renesas,tmu-r8a77995", "renesas,tmu";
387			reg = <0 0xffc00000 0 0x30>;
388			interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
389				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
390				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
391			clocks = <&cpg CPG_MOD 121>;
392			clock-names = "fck";
393			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
394			resets = <&cpg 121>;
395			status = "disabled";
396		};
397
398		i2c0: i2c@e6500000 {
399			#address-cells = <1>;
400			#size-cells = <0>;
401			compatible = "renesas,i2c-r8a77995",
402				     "renesas,rcar-gen3-i2c";
403			reg = <0 0xe6500000 0 0x40>;
404			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
405			clocks = <&cpg CPG_MOD 931>;
406			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
407			resets = <&cpg 931>;
408			dmas = <&dmac1 0x91>, <&dmac1 0x90>,
409			       <&dmac2 0x91>, <&dmac2 0x90>;
410			dma-names = "tx", "rx", "tx", "rx";
411			i2c-scl-internal-delay-ns = <6>;
412			status = "disabled";
413		};
414
415		i2c1: i2c@e6508000 {
416			#address-cells = <1>;
417			#size-cells = <0>;
418			compatible = "renesas,i2c-r8a77995",
419				     "renesas,rcar-gen3-i2c";
420			reg = <0 0xe6508000 0 0x40>;
421			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
422			clocks = <&cpg CPG_MOD 930>;
423			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
424			resets = <&cpg 930>;
425			dmas = <&dmac1 0x93>, <&dmac1 0x92>,
426			       <&dmac2 0x93>, <&dmac2 0x92>;
427			dma-names = "tx", "rx", "tx", "rx";
428			i2c-scl-internal-delay-ns = <6>;
429			status = "disabled";
430		};
431
432		i2c2: i2c@e6510000 {
433			#address-cells = <1>;
434			#size-cells = <0>;
435			compatible = "renesas,i2c-r8a77995",
436				     "renesas,rcar-gen3-i2c";
437			reg = <0 0xe6510000 0 0x40>;
438			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
439			clocks = <&cpg CPG_MOD 929>;
440			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
441			resets = <&cpg 929>;
442			dmas = <&dmac1 0x95>, <&dmac1 0x94>,
443			       <&dmac2 0x95>, <&dmac2 0x94>;
444			dma-names = "tx", "rx", "tx", "rx";
445			i2c-scl-internal-delay-ns = <6>;
446			status = "disabled";
447		};
448
449		i2c3: i2c@e66d0000 {
450			#address-cells = <1>;
451			#size-cells = <0>;
452			compatible = "renesas,i2c-r8a77995",
453				     "renesas,rcar-gen3-i2c";
454			reg = <0 0xe66d0000 0 0x40>;
455			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
456			clocks = <&cpg CPG_MOD 928>;
457			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
458			resets = <&cpg 928>;
459			dmas = <&dmac0 0x97>, <&dmac0 0x96>;
460			dma-names = "tx", "rx";
461			i2c-scl-internal-delay-ns = <6>;
462			status = "disabled";
463		};
464
465		hscif0: serial@e6540000 {
466			compatible = "renesas,hscif-r8a77995",
467				     "renesas,rcar-gen3-hscif",
468				     "renesas,hscif";
469			reg = <0 0xe6540000 0 0x60>;
470			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
471			clocks = <&cpg CPG_MOD 520>,
472				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
473				 <&scif_clk>;
474			clock-names = "fck", "brg_int", "scif_clk";
475			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
476			       <&dmac2 0x31>, <&dmac2 0x30>;
477			dma-names = "tx", "rx", "tx", "rx";
478			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
479			resets = <&cpg 520>;
480			status = "disabled";
481		};
482
483		hscif3: serial@e66a0000 {
484			compatible = "renesas,hscif-r8a77995",
485				     "renesas,rcar-gen3-hscif",
486				     "renesas,hscif";
487			reg = <0 0xe66a0000 0 0x60>;
488			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
489			clocks = <&cpg CPG_MOD 517>,
490				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
491				 <&scif_clk>;
492			clock-names = "fck", "brg_int", "scif_clk";
493			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
494			dma-names = "tx", "rx";
495			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
496			resets = <&cpg 517>;
497			status = "disabled";
498		};
499
500		hsusb: usb@e6590000 {
501			compatible = "renesas,usbhs-r8a77995",
502				     "renesas,rcar-gen3-usbhs";
503			reg = <0 0xe6590000 0 0x200>;
504			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
505			clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
506			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
507			       <&usb_dmac1 0>, <&usb_dmac1 1>;
508			dma-names = "ch0", "ch1", "ch2", "ch3";
509			renesas,buswait = <11>;
510			phys = <&usb2_phy0 3>;
511			phy-names = "usb";
512			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
513			resets = <&cpg 704>, <&cpg 703>;
514			status = "disabled";
515		};
516
517		usb_dmac0: dma-controller@e65a0000 {
518			compatible = "renesas,r8a77995-usb-dmac",
519				     "renesas,usb-dmac";
520			reg = <0 0xe65a0000 0 0x100>;
521			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
522				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
523			interrupt-names = "ch0", "ch1";
524			clocks = <&cpg CPG_MOD 330>;
525			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
526			resets = <&cpg 330>;
527			#dma-cells = <1>;
528			dma-channels = <2>;
529		};
530
531		usb_dmac1: dma-controller@e65b0000 {
532			compatible = "renesas,r8a77995-usb-dmac",
533				     "renesas,usb-dmac";
534			reg = <0 0xe65b0000 0 0x100>;
535			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
536				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
537			interrupt-names = "ch0", "ch1";
538			clocks = <&cpg CPG_MOD 331>;
539			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
540			resets = <&cpg 331>;
541			#dma-cells = <1>;
542			dma-channels = <2>;
543		};
544
545		arm_cc630p: crypto@e6601000 {
546			compatible = "arm,cryptocell-630p-ree";
547			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
548			reg = <0x0 0xe6601000 0 0x1000>;
549			clocks = <&cpg CPG_MOD 229>;
550			resets = <&cpg 229>;
551			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
552		};
553
554		canfd: can@e66c0000 {
555			compatible = "renesas,r8a77995-canfd",
556				     "renesas,rcar-gen3-canfd";
557			reg = <0 0xe66c0000 0 0x8000>;
558			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
559				   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
560			interrupt-names = "ch_int", "g_int";
561			clocks = <&cpg CPG_MOD 914>,
562			       <&cpg CPG_CORE R8A77995_CLK_CANFD>,
563			       <&can_clk>;
564			clock-names = "fck", "canfd", "can_clk";
565			assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
566			assigned-clock-rates = <40000000>;
567			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
568			resets = <&cpg 914>;
569			status = "disabled";
570
571			channel0 {
572				status = "disabled";
573			};
574
575			channel1 {
576				status = "disabled";
577			};
578		};
579
580		dmac0: dma-controller@e6700000 {
581			compatible = "renesas,dmac-r8a77995",
582				     "renesas,rcar-dmac";
583			reg = <0 0xe6700000 0 0x10000>;
584			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
585				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
586				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
587				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
588				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
589				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
590				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
591				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
592				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
593			interrupt-names = "error",
594					"ch0", "ch1", "ch2", "ch3",
595					"ch4", "ch5", "ch6", "ch7";
596			clocks = <&cpg CPG_MOD 219>;
597			clock-names = "fck";
598			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
599			resets = <&cpg 219>;
600			#dma-cells = <1>;
601			dma-channels = <8>;
602			iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
603			       <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
604			       <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
605			       <&ipmmu_ds0 6>, <&ipmmu_ds0 7>;
606		};
607
608		dmac1: dma-controller@e7300000 {
609			compatible = "renesas,dmac-r8a77995",
610				     "renesas,rcar-dmac";
611			reg = <0 0xe7300000 0 0x10000>;
612			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
613				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
614				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
615				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
616				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
617				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
618				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
619				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
620				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
621			interrupt-names = "error",
622					"ch0", "ch1", "ch2", "ch3",
623					"ch4", "ch5", "ch6", "ch7";
624			clocks = <&cpg CPG_MOD 218>;
625			clock-names = "fck";
626			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
627			resets = <&cpg 218>;
628			#dma-cells = <1>;
629			dma-channels = <8>;
630			iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
631			       <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
632			       <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
633			       <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
634		};
635
636		dmac2: dma-controller@e7310000 {
637			compatible = "renesas,dmac-r8a77995",
638				     "renesas,rcar-dmac";
639			reg = <0 0xe7310000 0 0x10000>;
640			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
641				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
642				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
643				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
644				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
645				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
646				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
647				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
648				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
649			interrupt-names = "error",
650					"ch0", "ch1", "ch2", "ch3",
651					"ch4", "ch5", "ch6", "ch7";
652			clocks = <&cpg CPG_MOD 217>;
653			clock-names = "fck";
654			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
655			resets = <&cpg 217>;
656			#dma-cells = <1>;
657			dma-channels = <8>;
658			iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
659			       <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
660			       <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
661			       <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
662		};
663
664		ipmmu_ds0: iommu@e6740000 {
665			compatible = "renesas,ipmmu-r8a77995";
666			reg = <0 0xe6740000 0 0x1000>;
667			renesas,ipmmu-main = <&ipmmu_mm 0>;
668			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
669			#iommu-cells = <1>;
670		};
671
672		ipmmu_ds1: iommu@e7740000 {
673			compatible = "renesas,ipmmu-r8a77995";
674			reg = <0 0xe7740000 0 0x1000>;
675			renesas,ipmmu-main = <&ipmmu_mm 1>;
676			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
677			#iommu-cells = <1>;
678		};
679
680		ipmmu_hc: iommu@e6570000 {
681			compatible = "renesas,ipmmu-r8a77995";
682			reg = <0 0xe6570000 0 0x1000>;
683			renesas,ipmmu-main = <&ipmmu_mm 2>;
684			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
685			#iommu-cells = <1>;
686		};
687
688		ipmmu_mm: iommu@e67b0000 {
689			compatible = "renesas,ipmmu-r8a77995";
690			reg = <0 0xe67b0000 0 0x1000>;
691			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
692				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
693			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
694			#iommu-cells = <1>;
695		};
696
697		ipmmu_mp: iommu@ec670000 {
698			compatible = "renesas,ipmmu-r8a77995";
699			reg = <0 0xec670000 0 0x1000>;
700			renesas,ipmmu-main = <&ipmmu_mm 4>;
701			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
702			#iommu-cells = <1>;
703		};
704
705		ipmmu_pv0: iommu@fd800000 {
706			compatible = "renesas,ipmmu-r8a77995";
707			reg = <0 0xfd800000 0 0x1000>;
708			renesas,ipmmu-main = <&ipmmu_mm 6>;
709			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
710			#iommu-cells = <1>;
711		};
712
713		ipmmu_rt: iommu@ffc80000 {
714			compatible = "renesas,ipmmu-r8a77995";
715			reg = <0 0xffc80000 0 0x1000>;
716			renesas,ipmmu-main = <&ipmmu_mm 10>;
717			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
718			#iommu-cells = <1>;
719		};
720
721		ipmmu_vc0: iommu@fe6b0000 {
722			compatible = "renesas,ipmmu-r8a77995";
723			reg = <0 0xfe6b0000 0 0x1000>;
724			renesas,ipmmu-main = <&ipmmu_mm 12>;
725			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
726			#iommu-cells = <1>;
727		};
728
729		ipmmu_vi0: iommu@febd0000 {
730			compatible = "renesas,ipmmu-r8a77995";
731			reg = <0 0xfebd0000 0 0x1000>;
732			renesas,ipmmu-main = <&ipmmu_mm 14>;
733			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
734			#iommu-cells = <1>;
735		};
736
737		ipmmu_vp0: iommu@fe990000 {
738			compatible = "renesas,ipmmu-r8a77995";
739			reg = <0 0xfe990000 0 0x1000>;
740			renesas,ipmmu-main = <&ipmmu_mm 16>;
741			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
742			#iommu-cells = <1>;
743		};
744
745		avb: ethernet@e6800000 {
746			compatible = "renesas,etheravb-r8a77995",
747				     "renesas,etheravb-rcar-gen3";
748			reg = <0 0xe6800000 0 0x800>;
749			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
750				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
751				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
752				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
753				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
754				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
755				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
756				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
757				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
758				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
759				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
760				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
761				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
762				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
763				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
764				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
765				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
766				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
767				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
768				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
769				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
770				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
771				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
772				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
773				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
774			interrupt-names = "ch0", "ch1", "ch2", "ch3",
775					  "ch4", "ch5", "ch6", "ch7",
776					  "ch8", "ch9", "ch10", "ch11",
777					  "ch12", "ch13", "ch14", "ch15",
778					  "ch16", "ch17", "ch18", "ch19",
779					  "ch20", "ch21", "ch22", "ch23",
780					  "ch24";
781			clocks = <&cpg CPG_MOD 812>;
782			clock-names = "fck";
783			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
784			resets = <&cpg 812>;
785			phy-mode = "rgmii";
786			rx-internal-delay-ps = <1800>;
787			iommus = <&ipmmu_ds0 16>;
788			#address-cells = <1>;
789			#size-cells = <0>;
790			status = "disabled";
791		};
792
793		can0: can@e6c30000 {
794			compatible = "renesas,can-r8a77995",
795				     "renesas,rcar-gen3-can";
796			reg = <0 0xe6c30000 0 0x1000>;
797			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
798			clocks = <&cpg CPG_MOD 916>,
799			       <&cpg CPG_CORE R8A77995_CLK_CANFD>,
800			       <&can_clk>;
801			clock-names = "clkp1", "clkp2", "can_clk";
802			assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
803			assigned-clock-rates = <40000000>;
804			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
805			resets = <&cpg 916>;
806			status = "disabled";
807		};
808
809		can1: can@e6c38000 {
810			compatible = "renesas,can-r8a77995",
811				     "renesas,rcar-gen3-can";
812			reg = <0 0xe6c38000 0 0x1000>;
813			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
814			clocks = <&cpg CPG_MOD 915>,
815			       <&cpg CPG_CORE R8A77995_CLK_CANFD>,
816			       <&can_clk>;
817			clock-names = "clkp1", "clkp2", "can_clk";
818			assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
819			assigned-clock-rates = <40000000>;
820			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
821			resets = <&cpg 915>;
822			status = "disabled";
823		};
824
825		pwm0: pwm@e6e30000 {
826			compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
827			reg = <0 0xe6e30000 0 0x8>;
828			#pwm-cells = <2>;
829			clocks = <&cpg CPG_MOD 523>;
830			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
831			resets = <&cpg 523>;
832			status = "disabled";
833		};
834
835		pwm1: pwm@e6e31000 {
836			compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
837			reg = <0 0xe6e31000 0 0x8>;
838			#pwm-cells = <2>;
839			clocks = <&cpg CPG_MOD 523>;
840			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
841			resets = <&cpg 523>;
842			status = "disabled";
843		};
844
845		pwm2: pwm@e6e32000 {
846			compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
847			reg = <0 0xe6e32000 0 0x8>;
848			#pwm-cells = <2>;
849			clocks = <&cpg CPG_MOD 523>;
850			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
851			resets = <&cpg 523>;
852			status = "disabled";
853		};
854
855		pwm3: pwm@e6e33000 {
856			compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
857			reg = <0 0xe6e33000 0 0x8>;
858			#pwm-cells = <2>;
859			clocks = <&cpg CPG_MOD 523>;
860			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
861			resets = <&cpg 523>;
862			status = "disabled";
863		};
864
865		scif0: serial@e6e60000 {
866			compatible = "renesas,scif-r8a77995",
867				     "renesas,rcar-gen3-scif", "renesas,scif";
868			reg = <0 0xe6e60000 0 64>;
869			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
870			clocks = <&cpg CPG_MOD 207>,
871				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
872				 <&scif_clk>;
873			clock-names = "fck", "brg_int", "scif_clk";
874			dmas = <&dmac1 0x51>, <&dmac1 0x50>,
875			       <&dmac2 0x51>, <&dmac2 0x50>;
876			dma-names = "tx", "rx", "tx", "rx";
877			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
878			resets = <&cpg 207>;
879			status = "disabled";
880		};
881
882		scif1: serial@e6e68000 {
883			compatible = "renesas,scif-r8a77995",
884				     "renesas,rcar-gen3-scif", "renesas,scif";
885			reg = <0 0xe6e68000 0 64>;
886			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
887			clocks = <&cpg CPG_MOD 206>,
888				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
889				 <&scif_clk>;
890			clock-names = "fck", "brg_int", "scif_clk";
891			dmas = <&dmac1 0x53>, <&dmac1 0x52>,
892			       <&dmac2 0x53>, <&dmac2 0x52>;
893			dma-names = "tx", "rx", "tx", "rx";
894			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
895			resets = <&cpg 206>;
896			status = "disabled";
897		};
898
899		scif2: serial@e6e88000 {
900			compatible = "renesas,scif-r8a77995",
901				     "renesas,rcar-gen3-scif", "renesas,scif";
902			reg = <0 0xe6e88000 0 64>;
903			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
904			clocks = <&cpg CPG_MOD 310>,
905				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
906				 <&scif_clk>;
907			clock-names = "fck", "brg_int", "scif_clk";
908			dmas = <&dmac1 0x13>, <&dmac1 0x12>,
909			       <&dmac2 0x13>, <&dmac2 0x12>;
910			dma-names = "tx", "rx", "tx", "rx";
911			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
912			resets = <&cpg 310>;
913			status = "disabled";
914		};
915
916		scif3: serial@e6c50000 {
917			compatible = "renesas,scif-r8a77995",
918				     "renesas,rcar-gen3-scif", "renesas,scif";
919			reg = <0 0xe6c50000 0 64>;
920			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
921			clocks = <&cpg CPG_MOD 204>,
922				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
923				 <&scif_clk>;
924			clock-names = "fck", "brg_int", "scif_clk";
925			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
926			dma-names = "tx", "rx";
927			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
928			resets = <&cpg 204>;
929			status = "disabled";
930		};
931
932		scif4: serial@e6c40000 {
933			compatible = "renesas,scif-r8a77995",
934				     "renesas,rcar-gen3-scif", "renesas,scif";
935			reg = <0 0xe6c40000 0 64>;
936			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
937			clocks = <&cpg CPG_MOD 203>,
938				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
939				 <&scif_clk>;
940			clock-names = "fck", "brg_int", "scif_clk";
941			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
942			dma-names = "tx", "rx";
943			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
944			resets = <&cpg 203>;
945			status = "disabled";
946		};
947
948		scif5: serial@e6f30000 {
949			compatible = "renesas,scif-r8a77995",
950				     "renesas,rcar-gen3-scif", "renesas,scif";
951			reg = <0 0xe6f30000 0 64>;
952			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
953			clocks = <&cpg CPG_MOD 202>,
954				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
955				 <&scif_clk>;
956			clock-names = "fck", "brg_int", "scif_clk";
957			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
958			       <&dmac2 0x5b>, <&dmac2 0x5a>;
959			dma-names = "tx", "rx", "tx", "rx";
960			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
961			resets = <&cpg 202>;
962			status = "disabled";
963		};
964
965		msiof0: spi@e6e90000 {
966			compatible = "renesas,msiof-r8a77995",
967				     "renesas,rcar-gen3-msiof";
968			reg = <0 0xe6e90000 0 0x64>;
969			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
970			clocks = <&cpg CPG_MOD 211>;
971			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
972			       <&dmac2 0x41>, <&dmac2 0x40>;
973			dma-names = "tx", "rx", "tx", "rx";
974			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
975			resets = <&cpg 211>;
976			#address-cells = <1>;
977			#size-cells = <0>;
978			status = "disabled";
979		};
980
981		msiof1: spi@e6ea0000 {
982			compatible = "renesas,msiof-r8a77995",
983				     "renesas,rcar-gen3-msiof";
984			reg = <0 0xe6ea0000 0 0x64>;
985			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
986			clocks = <&cpg CPG_MOD 210>;
987			dmas = <&dmac1 0x43>, <&dmac1 0x42>,
988			       <&dmac2 0x43>, <&dmac2 0x42>;
989			dma-names = "tx", "rx", "tx", "rx";
990			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
991			resets = <&cpg 210>;
992			#address-cells = <1>;
993			#size-cells = <0>;
994			status = "disabled";
995		};
996
997		msiof2: spi@e6c00000 {
998			compatible = "renesas,msiof-r8a77995",
999				     "renesas,rcar-gen3-msiof";
1000			reg = <0 0xe6c00000 0 0x64>;
1001			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1002			clocks = <&cpg CPG_MOD 209>;
1003			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1004			dma-names = "tx", "rx";
1005			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1006			resets = <&cpg 209>;
1007			#address-cells = <1>;
1008			#size-cells = <0>;
1009			status = "disabled";
1010		};
1011
1012		msiof3: spi@e6c10000 {
1013			compatible = "renesas,msiof-r8a77995",
1014				     "renesas,rcar-gen3-msiof";
1015			reg = <0 0xe6c10000 0 0x64>;
1016			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1017			clocks = <&cpg CPG_MOD 208>;
1018			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1019			dma-names = "tx", "rx";
1020			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1021			resets = <&cpg 208>;
1022			#address-cells = <1>;
1023			#size-cells = <0>;
1024			status = "disabled";
1025		};
1026
1027		vin4: video@e6ef4000 {
1028			compatible = "renesas,vin-r8a77995";
1029			reg = <0 0xe6ef4000 0 0x1000>;
1030			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1031			clocks = <&cpg CPG_MOD 807>;
1032			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1033			resets = <&cpg 807>;
1034			renesas,id = <4>;
1035			status = "disabled";
1036		};
1037
1038		rcar_sound: sound@ec500000 {
1039			/*
1040			 * #sound-dai-cells is required if simple-card
1041			 *
1042			 * Single DAI : #sound-dai-cells = <0>;	<&rcar_sound>;
1043			 * Multi  DAI : #sound-dai-cells = <1>;	<&rcar_sound N>;
1044			 */
1045			/*
1046			 * #clock-cells is required for audio_clkout0/1/2/3
1047			 *
1048			 * clkout	: #clock-cells = <0>;	<&rcar_sound>;
1049			 * clkout0/1/2/3: #clock-cells = <1>;	<&rcar_sound N>;
1050			 */
1051			compatible = "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3";
1052			reg = <0 0xec500000 0 0x1000>, /* SCU */
1053			      <0 0xec5a0000 0 0x100>,  /* ADG */
1054			      <0 0xec540000 0 0x1000>, /* SSIU */
1055			      <0 0xec541000 0 0x280>,  /* SSI */
1056			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1057			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1058
1059			clocks = <&cpg CPG_MOD 1005>,
1060				 <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
1061				 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1062				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1063				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1064				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1065				 <&audio_clk_a>, <&audio_clk_b>,
1066				 <&cpg CPG_CORE R8A77995_CLK_ZA2>;
1067			clock-names = "ssi-all",
1068				      "ssi.4", "ssi.3",
1069				      "src.6", "src.5",
1070				      "mix.1", "mix.0",
1071				      "ctu.1", "ctu.0",
1072				      "dvc.0", "dvc.1",
1073				      "clk_a", "clk_b", "clk_i";
1074			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1075			resets = <&cpg 1005>,
1076				 <&cpg 1011>, <&cpg 1012>;
1077			reset-names = "ssi-all",
1078				      "ssi.4", "ssi.3";
1079			status = "disabled";
1080
1081			rcar_sound,ctu {
1082				ctu00: ctu-0 { };
1083				ctu01: ctu-1 { };
1084				ctu02: ctu-2 { };
1085				ctu03: ctu-3 { };
1086				ctu10: ctu-4 { };
1087				ctu11: ctu-5 { };
1088				ctu12: ctu-6 { };
1089				ctu13: ctu-7 { };
1090			};
1091
1092			rcar_sound,dvc {
1093				dvc0: dvc-0 {
1094					dmas = <&audma0 0xbc>;
1095					dma-names = "tx";
1096				};
1097				dvc1: dvc-1 {
1098					dmas = <&audma0 0xbe>;
1099					dma-names = "tx";
1100				};
1101			};
1102
1103			rcar_sound,mix {
1104				mix0: mix-0 { };
1105				mix1: mix-1 { };
1106			};
1107
1108			rcar_sound,src {
1109				src5: src-5 {
1110					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1111					dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1112					dma-names = "rx", "tx";
1113				};
1114				src6: src-6 {
1115					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1116					dmas = <&audma0 0x91>, <&audma0 0xb4>;
1117					dma-names = "rx", "tx";
1118				};
1119			};
1120
1121			rcar_sound,ssi {
1122				ssi3: ssi-3 {
1123					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1124					dmas = <&audma0 0x07>, <&audma0 0x08>,
1125					       <&audma0 0x6f>, <&audma0 0x70>;
1126					dma-names = "rx", "tx", "rxu", "txu";
1127				};
1128				ssi4: ssi-4 {
1129					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1130					dmas = <&audma0 0x09>, <&audma0 0x0a>,
1131					       <&audma0 0x71>, <&audma0 0x72>;
1132					dma-names = "rx", "tx", "rxu", "txu";
1133				};
1134			};
1135		};
1136
1137		mlp: mlp@ec520000 {
1138			compatible = "renesas,r8a77995-mlp",
1139				     "renesas,rcar-gen3-mlp";
1140			reg = <0 0xec520000 0 0x800>;
1141			interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
1142				<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
1143			clocks = <&cpg CPG_MOD 802>;
1144			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1145			resets = <&cpg 802>;
1146			status = "disabled";
1147		};
1148
1149		audma0: dma-controller@ec700000 {
1150			compatible = "renesas,dmac-r8a77995",
1151				     "renesas,rcar-dmac";
1152			reg = <0 0xec700000 0 0x10000>;
1153			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1154				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1155				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1156				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1157				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1158				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1159				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1160				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1161				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1162				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1163				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1164				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1165				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1166				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1167				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1168				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1169				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1170			interrupt-names = "error",
1171					"ch0", "ch1", "ch2", "ch3",
1172					"ch4", "ch5", "ch6", "ch7",
1173					"ch8", "ch9", "ch10", "ch11",
1174					"ch12", "ch13", "ch14", "ch15";
1175			clocks = <&cpg CPG_MOD 502>;
1176			clock-names = "fck";
1177			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1178			resets = <&cpg 502>;
1179			#dma-cells = <1>;
1180			dma-channels = <16>;
1181			iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1182				 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1183				 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1184				 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1185				 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1186				 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1187				 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1188				 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1189		};
1190
1191		ohci0: usb@ee080000 {
1192			compatible = "generic-ohci";
1193			reg = <0 0xee080000 0 0x100>;
1194			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1195			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1196			phys = <&usb2_phy0 1>;
1197			phy-names = "usb";
1198			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1199			resets = <&cpg 703>, <&cpg 704>;
1200			status = "disabled";
1201		};
1202
1203		ehci0: usb@ee080100 {
1204			compatible = "generic-ehci";
1205			reg = <0 0xee080100 0 0x100>;
1206			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1207			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1208			phys = <&usb2_phy0 2>;
1209			phy-names = "usb";
1210			companion = <&ohci0>;
1211			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1212			resets = <&cpg 703>, <&cpg 704>;
1213			status = "disabled";
1214		};
1215
1216		usb2_phy0: usb-phy@ee080200 {
1217			compatible = "renesas,usb2-phy-r8a77995",
1218				     "renesas,rcar-gen3-usb2-phy";
1219			reg = <0 0xee080200 0 0x700>;
1220			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1221			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1222			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1223			resets = <&cpg 703>, <&cpg 704>;
1224			#phy-cells = <1>;
1225			status = "disabled";
1226		};
1227
1228		sdhi2: mmc@ee140000 {
1229			compatible = "renesas,sdhi-r8a77995",
1230				     "renesas,rcar-gen3-sdhi";
1231			reg = <0 0xee140000 0 0x2000>;
1232			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1233			clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77995_CLK_SD0H>;
1234			clock-names = "core", "clkh";
1235			max-frequency = <200000000>;
1236			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1237			resets = <&cpg 312>;
1238			iommus = <&ipmmu_ds1 34>;
1239			status = "disabled";
1240		};
1241
1242		rpc: spi@ee200000 {
1243			compatible = "renesas,r8a77995-rpc-if",
1244				     "renesas,rcar-gen3-rpc-if";
1245			reg = <0 0xee200000 0 0x200>,
1246			      <0 0x08000000 0 0x04000000>,
1247			      <0 0xee208000 0 0x100>;
1248			reg-names = "regs", "dirmap", "wbuf";
1249			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1250			clocks = <&cpg CPG_MOD 917>;
1251			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1252			resets = <&cpg 917>;
1253			#address-cells = <1>;
1254			#size-cells = <0>;
1255			status = "disabled";
1256		};
1257
1258		gic: interrupt-controller@f1010000 {
1259			compatible = "arm,gic-400";
1260			#interrupt-cells = <3>;
1261			#address-cells = <0>;
1262			interrupt-controller;
1263			reg = <0x0 0xf1010000 0 0x1000>,
1264			      <0x0 0xf1020000 0 0x20000>,
1265			      <0x0 0xf1040000 0 0x20000>,
1266			      <0x0 0xf1060000 0 0x20000>;
1267			interrupts = <GIC_PPI 9
1268					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
1269			clocks = <&cpg CPG_MOD 408>;
1270			clock-names = "clk";
1271			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1272			resets = <&cpg 408>;
1273		};
1274
1275		vspbs: vsp@fe960000 {
1276			compatible = "renesas,vsp2";
1277			reg = <0 0xfe960000 0 0x8000>;
1278			interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1279			clocks = <&cpg CPG_MOD 627>;
1280			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1281			resets = <&cpg 627>;
1282			renesas,fcp = <&fcpvb0>;
1283		};
1284
1285		vspd0: vsp@fea20000 {
1286			compatible = "renesas,vsp2";
1287			reg = <0 0xfea20000 0 0x5000>;
1288			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1289			clocks = <&cpg CPG_MOD 623>;
1290			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1291			resets = <&cpg 623>;
1292			renesas,fcp = <&fcpvd0>;
1293		};
1294
1295		vspd1: vsp@fea28000 {
1296			compatible = "renesas,vsp2";
1297			reg = <0 0xfea28000 0 0x5000>;
1298			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1299			clocks = <&cpg CPG_MOD 622>;
1300			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1301			resets = <&cpg 622>;
1302			renesas,fcp = <&fcpvd1>;
1303		};
1304
1305		fcpvb0: fcp@fe96f000 {
1306			compatible = "renesas,fcpv";
1307			reg = <0 0xfe96f000 0 0x200>;
1308			clocks = <&cpg CPG_MOD 607>;
1309			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1310			resets = <&cpg 607>;
1311			iommus = <&ipmmu_vp0 5>;
1312		};
1313
1314		fcpvd0: fcp@fea27000 {
1315			compatible = "renesas,fcpv";
1316			reg = <0 0xfea27000 0 0x200>;
1317			clocks = <&cpg CPG_MOD 603>;
1318			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1319			resets = <&cpg 603>;
1320			iommus = <&ipmmu_vi0 8>;
1321		};
1322
1323		fcpvd1: fcp@fea2f000 {
1324			compatible = "renesas,fcpv";
1325			reg = <0 0xfea2f000 0 0x200>;
1326			clocks = <&cpg CPG_MOD 602>;
1327			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1328			resets = <&cpg 602>;
1329			iommus = <&ipmmu_vi0 9>;
1330		};
1331
1332		cmm0: cmm@fea40000 {
1333			compatible = "renesas,r8a77995-cmm",
1334				     "renesas,rcar-gen3-cmm";
1335			reg = <0 0xfea40000 0 0x1000>;
1336			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1337			clocks = <&cpg CPG_MOD 711>;
1338			resets = <&cpg 711>;
1339		};
1340
1341		cmm1: cmm@fea50000 {
1342			compatible = "renesas,r8a77995-cmm",
1343				     "renesas,rcar-gen3-cmm";
1344			reg = <0 0xfea50000 0 0x1000>;
1345			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1346			clocks = <&cpg CPG_MOD 710>;
1347			resets = <&cpg 710>;
1348		};
1349
1350		du: display@feb00000 {
1351			compatible = "renesas,du-r8a77995";
1352			reg = <0 0xfeb00000 0 0x40000>;
1353			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1354				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1355			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1356			clock-names = "du.0", "du.1";
1357			resets = <&cpg 724>;
1358			reset-names = "du.0";
1359
1360			renesas,cmms = <&cmm0>, <&cmm1>;
1361			renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1362
1363			status = "disabled";
1364
1365			ports {
1366				#address-cells = <1>;
1367				#size-cells = <0>;
1368
1369				port@0 {
1370					reg = <0>;
1371				};
1372
1373				port@1 {
1374					reg = <1>;
1375					du_out_lvds0: endpoint {
1376						remote-endpoint = <&lvds0_in>;
1377					};
1378				};
1379
1380				port@2 {
1381					reg = <2>;
1382					du_out_lvds1: endpoint {
1383						remote-endpoint = <&lvds1_in>;
1384					};
1385				};
1386			};
1387		};
1388
1389		lvds0: lvds-encoder@feb90000 {
1390			compatible = "renesas,r8a77995-lvds";
1391			reg = <0 0xfeb90000 0 0x20>;
1392			clocks = <&cpg CPG_MOD 727>;
1393			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1394			resets = <&cpg 727>;
1395			status = "disabled";
1396
1397			renesas,companion = <&lvds1>;
1398
1399			ports {
1400				#address-cells = <1>;
1401				#size-cells = <0>;
1402
1403				port@0 {
1404					reg = <0>;
1405					lvds0_in: endpoint {
1406						remote-endpoint = <&du_out_lvds0>;
1407					};
1408				};
1409
1410				port@1 {
1411					reg = <1>;
1412				};
1413			};
1414		};
1415
1416		lvds1: lvds-encoder@feb90100 {
1417			compatible = "renesas,r8a77995-lvds";
1418			reg = <0 0xfeb90100 0 0x20>;
1419			clocks = <&cpg CPG_MOD 727>;
1420			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1421			resets = <&cpg 726>;
1422			status = "disabled";
1423
1424			ports {
1425				#address-cells = <1>;
1426				#size-cells = <0>;
1427
1428				port@0 {
1429					reg = <0>;
1430					lvds1_in: endpoint {
1431						remote-endpoint = <&du_out_lvds1>;
1432					};
1433				};
1434
1435				port@1 {
1436					reg = <1>;
1437				};
1438			};
1439		};
1440
1441		prr: chipid@fff00044 {
1442			compatible = "renesas,prr";
1443			reg = <0 0xfff00044 0 4>;
1444		};
1445	};
1446
1447	thermal-zones {
1448		cpu_thermal: cpu-thermal {
1449			polling-delay-passive = <250>;
1450			polling-delay = <1000>;
1451			thermal-sensors = <&thermal>;
1452
1453			cooling-maps {
1454			};
1455
1456			trips {
1457				cpu-crit {
1458					temperature = <120000>;
1459					hysteresis = <2000>;
1460					type = "critical";
1461				};
1462			};
1463		};
1464	};
1465
1466	timer {
1467		compatible = "arm,armv8-timer";
1468		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1469				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1470				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1471				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
1472	};
1473};
1474