1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Hardkernel Co., Ltd
4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/pinctrl/rockchip.h>
11#include "rk3326.dtsi"
12
13/ {
14	model = "ODROID-GO Advance";
15	compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326";
16
17	aliases {
18		mmc0 = &sdmmc;
19	};
20
21	chosen {
22		stdout-path = "serial2:115200n8";
23	};
24
25	adc-joystick {
26		compatible = "adc-joystick";
27		io-channels = <&saradc 1>,
28			      <&saradc 2>;
29		#address-cells = <1>;
30		#size-cells = <0>;
31
32		axis@0 {
33			reg = <0>;
34			abs-flat = <10>;
35			abs-fuzz = <10>;
36			abs-range = <172 772>;
37			linux,code = <ABS_X>;
38		};
39
40		axis@1 {
41			reg = <1>;
42			abs-flat = <10>;
43			abs-fuzz = <10>;
44			abs-range = <278 815>;
45			linux,code = <ABS_Y>;
46		};
47	};
48
49	backlight: backlight {
50		compatible = "pwm-backlight";
51		power-supply = <&vcc_bl>;
52		pwms = <&pwm1 0 25000 0>;
53	};
54
55	gpio-keys {
56		compatible = "gpio-keys";
57		pinctrl-names = "default";
58		pinctrl-0 = <&btn_pins>;
59
60		/*
61		 *      *** ODROIDGO2-Advance Switch layout ***
62		 * |------------------------------------------------|
63		 * | sw15                                      sw16 |
64		 * |------------------------------------------------|
65		 * |     sw1      |-------------------|      sw8    |
66		 * |  sw3   sw4   |                   |   sw7   sw5 |
67		 * |     sw2      |    LCD Display    |      sw6    |
68		 * |              |                   |             |
69		 * |              |-------------------|             |
70		 * |         sw9 sw10   sw11 sw12   sw13 sw14       |
71		 * |------------------------------------------------|
72		 */
73
74		sw1 {
75			gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
76			label = "DPAD-UP";
77			linux,code = <BTN_DPAD_UP>;
78		};
79		sw2 {
80			gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
81			label = "DPAD-DOWN";
82			linux,code = <BTN_DPAD_DOWN>;
83		};
84		sw3 {
85			gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
86			label = "DPAD-LEFT";
87			linux,code = <BTN_DPAD_LEFT>;
88		};
89		sw4 {
90			gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
91			label = "DPAD-RIGHT";
92			linux,code = <BTN_DPAD_RIGHT>;
93		};
94		sw5 {
95			gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
96			label = "BTN-A";
97			linux,code = <BTN_EAST>;
98		};
99		sw6 {
100			gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
101			label = "BTN-B";
102			linux,code = <BTN_SOUTH>;
103		};
104		sw7 {
105			gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
106			label = "BTN-Y";
107			linux,code = <BTN_WEST>;
108		};
109		sw8 {
110			gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
111			label = "BTN-X";
112			linux,code = <BTN_NORTH>;
113		};
114		sw9 {
115			gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
116			label = "F1";
117			linux,code = <BTN_TRIGGER_HAPPY1>;
118		};
119		sw10 {
120			gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
121			label = "F2";
122			linux,code = <BTN_TRIGGER_HAPPY2>;
123		};
124		sw11 {
125			gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
126			label = "F3";
127			linux,code = <BTN_TRIGGER_HAPPY3>;
128		};
129		sw12 {
130			gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
131			label = "F4";
132			linux,code = <BTN_TRIGGER_HAPPY4>;
133		};
134		sw13 {
135			gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
136			label = "F5";
137			linux,code = <BTN_TRIGGER_HAPPY5>;
138		};
139		sw14 {
140			gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
141			label = "F6";
142			linux,code = <BTN_TRIGGER_HAPPY6>;
143		};
144		sw15 {
145			gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
146			label = "TOP-LEFT";
147			linux,code = <BTN_TL>;
148		};
149		sw16 {
150			gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
151			label = "TOP-RIGHT";
152			linux,code = <BTN_TR>;
153		};
154	};
155
156	leds: gpio-leds {
157		compatible = "gpio-leds";
158		pinctrl-names = "default";
159		pinctrl-0 = <&blue_led_pin>;
160
161		blue_led: led-0 {
162			label = "blue:heartbeat";
163			gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
164			linux,default-trigger = "heartbeat";
165		};
166	};
167
168	vccsys: vccsys {
169		compatible = "regulator-fixed";
170		regulator-name = "vcc3v8_sys";
171		regulator-always-on;
172		regulator-min-microvolt = <3800000>;
173		regulator-max-microvolt = <3800000>;
174	};
175
176	vcc_host: vcc_host {
177		compatible = "regulator-fixed";
178		regulator-name = "vcc_host";
179		regulator-min-microvolt = <5000000>;
180		regulator-max-microvolt = <5000000>;
181
182		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
183		enable-active-high;
184		regulator-always-on;
185		vin-supply = <&vccsys>;
186	};
187};
188
189&cpu0 {
190	cpu-supply = <&vdd_arm>;
191};
192
193&cpu1 {
194	cpu-supply = <&vdd_arm>;
195};
196
197&cpu2 {
198	cpu-supply = <&vdd_arm>;
199};
200
201&cpu3 {
202	cpu-supply = <&vdd_arm>;
203};
204
205&cru {
206	assigned-clocks = <&cru PLL_NPLL>,
207		<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
208		<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
209		<&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>,
210		<&cru PLL_CPLL>;
211
212	assigned-clock-rates = <1188000000>,
213		<200000000>, <200000000>,
214		<150000000>, <150000000>,
215		<100000000>, <200000000>,
216		<17000000>;
217};
218
219&display_subsystem {
220	status = "okay";
221};
222
223&dsi {
224	status = "okay";
225
226	ports {
227		mipi_out: port@1 {
228			reg = <1>;
229
230			mipi_out_panel: endpoint {
231				remote-endpoint = <&mipi_in_panel>;
232			};
233		};
234	};
235
236	panel@0 {
237		compatible = "elida,kd35t133";
238		reg = <0>;
239		backlight = <&backlight>;
240		iovcc-supply = <&vcc_lcd>;
241		reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
242		vdd-supply = <&vcc_lcd>;
243
244		port {
245			mipi_in_panel: endpoint {
246				remote-endpoint = <&mipi_out_panel>;
247			};
248		};
249	};
250};
251
252&dsi_dphy {
253	status = "okay";
254};
255
256&gpu {
257	mali-supply = <&vdd_logic>;
258	status = "okay";
259};
260
261&i2c0 {
262	clock-frequency = <400000>;
263	i2c-scl-falling-time-ns = <16>;
264	i2c-scl-rising-time-ns = <280>;
265	status = "okay";
266
267	rk817: pmic@20 {
268		compatible = "rockchip,rk817";
269		reg = <0x20>;
270		interrupt-parent = <&gpio0>;
271		interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
272		pinctrl-names = "default";
273		pinctrl-0 = <&pmic_int>;
274		wakeup-source;
275		#clock-cells = <1>;
276		clock-output-names = "rk808-clkout1", "xin32k";
277
278		vcc1-supply = <&vccsys>;
279		vcc2-supply = <&vccsys>;
280		vcc3-supply = <&vccsys>;
281		vcc4-supply = <&vccsys>;
282		vcc5-supply = <&vccsys>;
283		vcc6-supply = <&vccsys>;
284		vcc7-supply = <&vccsys>;
285
286		regulators {
287			vdd_logic: DCDC_REG1 {
288				regulator-name = "vdd_logic";
289				regulator-min-microvolt = <950000>;
290				regulator-max-microvolt = <1150000>;
291				regulator-ramp-delay = <6001>;
292				regulator-always-on;
293				regulator-boot-on;
294
295				regulator-state-mem {
296					regulator-on-in-suspend;
297					regulator-suspend-microvolt = <950000>;
298				};
299			};
300
301			vdd_arm: DCDC_REG2 {
302				regulator-name = "vdd_arm";
303				regulator-min-microvolt = <950000>;
304				regulator-max-microvolt = <1350000>;
305				regulator-ramp-delay = <6001>;
306				regulator-always-on;
307				regulator-boot-on;
308
309				regulator-state-mem {
310					regulator-off-in-suspend;
311					regulator-suspend-microvolt = <950000>;
312				};
313			};
314
315			vcc_ddr: DCDC_REG3 {
316				regulator-name = "vcc_ddr";
317				regulator-always-on;
318				regulator-boot-on;
319
320				regulator-state-mem {
321					regulator-on-in-suspend;
322				};
323			};
324
325			vcc_3v3: DCDC_REG4 {
326				regulator-name = "vcc_3v3";
327				regulator-min-microvolt = <3300000>;
328				regulator-max-microvolt = <3300000>;
329				regulator-always-on;
330				regulator-boot-on;
331
332				regulator-state-mem {
333					regulator-off-in-suspend;
334					regulator-suspend-microvolt = <3300000>;
335				};
336			};
337
338			vcc_1v8: LDO_REG2 {
339				regulator-name = "vcc_1v8";
340				regulator-min-microvolt = <1800000>;
341				regulator-max-microvolt = <1800000>;
342				regulator-always-on;
343				regulator-boot-on;
344
345				regulator-state-mem {
346					regulator-on-in-suspend;
347					regulator-suspend-microvolt = <1800000>;
348				};
349			};
350
351			vdd_1v0: LDO_REG3 {
352				regulator-name = "vdd_1v0";
353				regulator-min-microvolt = <1000000>;
354				regulator-max-microvolt = <1000000>;
355				regulator-always-on;
356				regulator-boot-on;
357
358				regulator-state-mem {
359					regulator-on-in-suspend;
360					regulator-suspend-microvolt = <1000000>;
361				};
362			};
363
364			vcc3v3_pmu: LDO_REG4 {
365				regulator-name = "vcc3v3_pmu";
366				regulator-min-microvolt = <3300000>;
367				regulator-max-microvolt = <3300000>;
368				regulator-always-on;
369				regulator-boot-on;
370
371				regulator-state-mem {
372					regulator-on-in-suspend;
373					regulator-suspend-microvolt = <3300000>;
374				};
375			};
376
377			vccio_sd: LDO_REG5 {
378				regulator-name = "vccio_sd";
379				regulator-min-microvolt = <1800000>;
380				regulator-max-microvolt = <3300000>;
381				regulator-always-on;
382				regulator-boot-on;
383
384				regulator-state-mem {
385					regulator-on-in-suspend;
386					regulator-suspend-microvolt = <3300000>;
387				};
388			};
389
390			vcc_sd: LDO_REG6 {
391				regulator-name = "vcc_sd";
392				regulator-min-microvolt = <3300000>;
393				regulator-max-microvolt = <3300000>;
394				regulator-boot-on;
395
396				regulator-state-mem {
397					regulator-on-in-suspend;
398					regulator-suspend-microvolt = <3300000>;
399				};
400			};
401
402			vcc_bl: LDO_REG7 {
403				regulator-name = "vcc_bl";
404				regulator-min-microvolt = <3300000>;
405				regulator-max-microvolt = <3300000>;
406
407				regulator-state-mem {
408					regulator-off-in-suspend;
409					regulator-suspend-microvolt = <3300000>;
410				};
411			};
412
413			vcc_lcd: LDO_REG8 {
414				regulator-name = "vcc_lcd";
415				regulator-min-microvolt = <2800000>;
416				regulator-max-microvolt = <2800000>;
417
418				regulator-state-mem {
419					regulator-off-in-suspend;
420					regulator-suspend-microvolt = <2800000>;
421				};
422			};
423
424			vcc_cam: LDO_REG9 {
425				regulator-name = "vcc_cam";
426				regulator-min-microvolt = <3000000>;
427				regulator-max-microvolt = <3000000>;
428
429				regulator-state-mem {
430					regulator-off-in-suspend;
431					regulator-suspend-microvolt = <3000000>;
432				};
433			};
434		};
435	};
436};
437
438/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */
439&i2c1 {
440	clock-frequency = <400000>;
441	status = "okay";
442};
443
444/* I2S 1 Channel Used */
445&i2s1_2ch {
446	status = "okay";
447};
448
449&io_domains {
450	vccio1-supply = <&vcc_3v3>;
451	vccio2-supply = <&vccio_sd>;
452	vccio3-supply = <&vcc_3v3>;
453	vccio4-supply = <&vcc_3v3>;
454	vccio5-supply = <&vcc_3v3>;
455	vccio6-supply = <&vcc_3v3>;
456	status = "okay";
457};
458
459&pmu_io_domains {
460	pmuio1-supply = <&vcc3v3_pmu>;
461	pmuio2-supply = <&vcc3v3_pmu>;
462	status = "okay";
463};
464
465&pwm1 {
466	status = "okay";
467};
468
469&saradc {
470	vref-supply = <&vcc_1v8>;
471	status = "okay";
472};
473
474&sdmmc {
475	cap-sd-highspeed;
476	card-detect-delay = <200>;
477	cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
478	sd-uhs-sdr12;
479	sd-uhs-sdr25;
480	sd-uhs-sdr50;
481	sd-uhs-sdr104;
482	vmmc-supply = <&vcc_sd>;
483	vqmmc-supply = <&vccio_sd>;
484	status = "okay";
485};
486
487&tsadc {
488	status = "okay";
489};
490
491&u2phy {
492	status = "okay";
493
494	u2phy_host: host-port {
495		status = "okay";
496	};
497
498	u2phy_otg: otg-port {
499		status = "disabled";
500	};
501};
502
503&usb20_otg {
504	status = "okay";
505};
506
507/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
508&uart1 {
509	pinctrl-names = "default";
510	pinctrl-0 = <&uart1_xfer &uart1_cts>;
511	status = "okay";
512};
513
514&uart2 {
515	pinctrl-names = "default";
516	pinctrl-0 = <&uart2m1_xfer>;
517	status = "okay";
518};
519
520&vopb {
521	status = "okay";
522};
523
524&vopb_mmu {
525	status = "okay";
526};
527
528&pinctrl {
529	btns {
530		btn_pins: btn-pins {
531			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
532					<1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
533					<1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
534					<1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
535					<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
536					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
537					<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
538					<1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
539					<2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
540					<2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
541					<2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
542					<2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
543					<2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
544					<2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
545					<2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
546					<2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
547		};
548	};
549
550	headphone {
551		hp_det: hp-det {
552			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
553		};
554	};
555
556	leds {
557		blue_led_pin: blue-led-pin {
558			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
559		};
560	};
561
562	pmic {
563		dc_det: dc-det {
564			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
565		};
566
567		pmic_int: pmic-int {
568			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
569		};
570
571		soc_slppin_gpio: soc_slppin_gpio {
572			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
573		};
574
575		soc_slppin_rst: soc_slppin_rst {
576			rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
577		};
578
579		soc_slppin_slp: soc_slppin_slp {
580			rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
581		};
582	};
583};
584