1cb7aa33aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2cb7aa33aSEmmanuel Vadot/* 3cb7aa33aSEmmanuel Vadot * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4cb7aa33aSEmmanuel Vadot */ 5cb7aa33aSEmmanuel Vadot 6cb7aa33aSEmmanuel Vadot#include <dt-bindings/clock/rockchip,rk3588-cru.h> 7cb7aa33aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/arm-gic.h> 8cb7aa33aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 9cb7aa33aSEmmanuel Vadot#include <dt-bindings/power/rk3588-power.h> 10cb7aa33aSEmmanuel Vadot#include <dt-bindings/reset/rockchip,rk3588-cru.h> 11aa1a8ff2SEmmanuel Vadot#include <dt-bindings/phy/phy.h> 12aa1a8ff2SEmmanuel Vadot#include <dt-bindings/ata/ahci.h> 13cb7aa33aSEmmanuel Vadot 14cb7aa33aSEmmanuel Vadot/ { 15cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588"; 16cb7aa33aSEmmanuel Vadot 17cb7aa33aSEmmanuel Vadot interrupt-parent = <&gic>; 18cb7aa33aSEmmanuel Vadot #address-cells = <2>; 19cb7aa33aSEmmanuel Vadot #size-cells = <2>; 20cb7aa33aSEmmanuel Vadot 21*8d13bc63SEmmanuel Vadot aliases { 22*8d13bc63SEmmanuel Vadot gpio0 = &gpio0; 23*8d13bc63SEmmanuel Vadot gpio1 = &gpio1; 24*8d13bc63SEmmanuel Vadot gpio2 = &gpio2; 25*8d13bc63SEmmanuel Vadot gpio3 = &gpio3; 26*8d13bc63SEmmanuel Vadot gpio4 = &gpio4; 27*8d13bc63SEmmanuel Vadot i2c0 = &i2c0; 28*8d13bc63SEmmanuel Vadot i2c1 = &i2c1; 29*8d13bc63SEmmanuel Vadot i2c2 = &i2c2; 30*8d13bc63SEmmanuel Vadot i2c3 = &i2c3; 31*8d13bc63SEmmanuel Vadot i2c4 = &i2c4; 32*8d13bc63SEmmanuel Vadot i2c5 = &i2c5; 33*8d13bc63SEmmanuel Vadot i2c6 = &i2c6; 34*8d13bc63SEmmanuel Vadot i2c7 = &i2c7; 35*8d13bc63SEmmanuel Vadot i2c8 = &i2c8; 36*8d13bc63SEmmanuel Vadot serial0 = &uart0; 37*8d13bc63SEmmanuel Vadot serial1 = &uart1; 38*8d13bc63SEmmanuel Vadot serial2 = &uart2; 39*8d13bc63SEmmanuel Vadot serial3 = &uart3; 40*8d13bc63SEmmanuel Vadot serial4 = &uart4; 41*8d13bc63SEmmanuel Vadot serial5 = &uart5; 42*8d13bc63SEmmanuel Vadot serial6 = &uart6; 43*8d13bc63SEmmanuel Vadot serial7 = &uart7; 44*8d13bc63SEmmanuel Vadot serial8 = &uart8; 45*8d13bc63SEmmanuel Vadot serial9 = &uart9; 46*8d13bc63SEmmanuel Vadot spi0 = &spi0; 47*8d13bc63SEmmanuel Vadot spi1 = &spi1; 48*8d13bc63SEmmanuel Vadot spi2 = &spi2; 49*8d13bc63SEmmanuel Vadot spi3 = &spi3; 50*8d13bc63SEmmanuel Vadot spi4 = &spi4; 51*8d13bc63SEmmanuel Vadot }; 52*8d13bc63SEmmanuel Vadot 53cb7aa33aSEmmanuel Vadot cpus { 54cb7aa33aSEmmanuel Vadot #address-cells = <1>; 55cb7aa33aSEmmanuel Vadot #size-cells = <0>; 56cb7aa33aSEmmanuel Vadot 57cb7aa33aSEmmanuel Vadot cpu-map { 58cb7aa33aSEmmanuel Vadot cluster0 { 59cb7aa33aSEmmanuel Vadot core0 { 60cb7aa33aSEmmanuel Vadot cpu = <&cpu_l0>; 61cb7aa33aSEmmanuel Vadot }; 62cb7aa33aSEmmanuel Vadot core1 { 63cb7aa33aSEmmanuel Vadot cpu = <&cpu_l1>; 64cb7aa33aSEmmanuel Vadot }; 65cb7aa33aSEmmanuel Vadot core2 { 66cb7aa33aSEmmanuel Vadot cpu = <&cpu_l2>; 67cb7aa33aSEmmanuel Vadot }; 68cb7aa33aSEmmanuel Vadot core3 { 69cb7aa33aSEmmanuel Vadot cpu = <&cpu_l3>; 70cb7aa33aSEmmanuel Vadot }; 71cb7aa33aSEmmanuel Vadot }; 72cb7aa33aSEmmanuel Vadot cluster1 { 73cb7aa33aSEmmanuel Vadot core0 { 74cb7aa33aSEmmanuel Vadot cpu = <&cpu_b0>; 75cb7aa33aSEmmanuel Vadot }; 76cb7aa33aSEmmanuel Vadot core1 { 77cb7aa33aSEmmanuel Vadot cpu = <&cpu_b1>; 78cb7aa33aSEmmanuel Vadot }; 79cb7aa33aSEmmanuel Vadot }; 80cb7aa33aSEmmanuel Vadot cluster2 { 81cb7aa33aSEmmanuel Vadot core0 { 82cb7aa33aSEmmanuel Vadot cpu = <&cpu_b2>; 83cb7aa33aSEmmanuel Vadot }; 84cb7aa33aSEmmanuel Vadot core1 { 85cb7aa33aSEmmanuel Vadot cpu = <&cpu_b3>; 86cb7aa33aSEmmanuel Vadot }; 87cb7aa33aSEmmanuel Vadot }; 88cb7aa33aSEmmanuel Vadot }; 89cb7aa33aSEmmanuel Vadot 90cb7aa33aSEmmanuel Vadot cpu_l0: cpu@0 { 91cb7aa33aSEmmanuel Vadot device_type = "cpu"; 92cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a55"; 93cb7aa33aSEmmanuel Vadot reg = <0x0>; 94cb7aa33aSEmmanuel Vadot enable-method = "psci"; 95cb7aa33aSEmmanuel Vadot capacity-dmips-mhz = <530>; 96cb7aa33aSEmmanuel Vadot clocks = <&scmi_clk SCMI_CLK_CPUL>; 97fac71e4eSEmmanuel Vadot assigned-clocks = <&scmi_clk SCMI_CLK_CPUL>; 98fac71e4eSEmmanuel Vadot assigned-clock-rates = <816000000>; 99cb7aa33aSEmmanuel Vadot cpu-idle-states = <&CPU_SLEEP>; 100cb7aa33aSEmmanuel Vadot i-cache-size = <32768>; 101cb7aa33aSEmmanuel Vadot i-cache-line-size = <64>; 102cb7aa33aSEmmanuel Vadot i-cache-sets = <128>; 103cb7aa33aSEmmanuel Vadot d-cache-size = <32768>; 104cb7aa33aSEmmanuel Vadot d-cache-line-size = <64>; 105cb7aa33aSEmmanuel Vadot d-cache-sets = <128>; 106cb7aa33aSEmmanuel Vadot next-level-cache = <&l2_cache_l0>; 107cb7aa33aSEmmanuel Vadot dynamic-power-coefficient = <228>; 108cb7aa33aSEmmanuel Vadot #cooling-cells = <2>; 109cb7aa33aSEmmanuel Vadot }; 110cb7aa33aSEmmanuel Vadot 111cb7aa33aSEmmanuel Vadot cpu_l1: cpu@100 { 112cb7aa33aSEmmanuel Vadot device_type = "cpu"; 113cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a55"; 114cb7aa33aSEmmanuel Vadot reg = <0x100>; 115cb7aa33aSEmmanuel Vadot enable-method = "psci"; 116cb7aa33aSEmmanuel Vadot capacity-dmips-mhz = <530>; 117cb7aa33aSEmmanuel Vadot clocks = <&scmi_clk SCMI_CLK_CPUL>; 118cb7aa33aSEmmanuel Vadot cpu-idle-states = <&CPU_SLEEP>; 119cb7aa33aSEmmanuel Vadot i-cache-size = <32768>; 120cb7aa33aSEmmanuel Vadot i-cache-line-size = <64>; 121cb7aa33aSEmmanuel Vadot i-cache-sets = <128>; 122cb7aa33aSEmmanuel Vadot d-cache-size = <32768>; 123cb7aa33aSEmmanuel Vadot d-cache-line-size = <64>; 124cb7aa33aSEmmanuel Vadot d-cache-sets = <128>; 125cb7aa33aSEmmanuel Vadot next-level-cache = <&l2_cache_l1>; 126cb7aa33aSEmmanuel Vadot dynamic-power-coefficient = <228>; 127cb7aa33aSEmmanuel Vadot #cooling-cells = <2>; 128cb7aa33aSEmmanuel Vadot }; 129cb7aa33aSEmmanuel Vadot 130cb7aa33aSEmmanuel Vadot cpu_l2: cpu@200 { 131cb7aa33aSEmmanuel Vadot device_type = "cpu"; 132cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a55"; 133cb7aa33aSEmmanuel Vadot reg = <0x200>; 134cb7aa33aSEmmanuel Vadot enable-method = "psci"; 135cb7aa33aSEmmanuel Vadot capacity-dmips-mhz = <530>; 136cb7aa33aSEmmanuel Vadot clocks = <&scmi_clk SCMI_CLK_CPUL>; 137cb7aa33aSEmmanuel Vadot cpu-idle-states = <&CPU_SLEEP>; 138cb7aa33aSEmmanuel Vadot i-cache-size = <32768>; 139cb7aa33aSEmmanuel Vadot i-cache-line-size = <64>; 140cb7aa33aSEmmanuel Vadot i-cache-sets = <128>; 141cb7aa33aSEmmanuel Vadot d-cache-size = <32768>; 142cb7aa33aSEmmanuel Vadot d-cache-line-size = <64>; 143cb7aa33aSEmmanuel Vadot d-cache-sets = <128>; 144cb7aa33aSEmmanuel Vadot next-level-cache = <&l2_cache_l2>; 145cb7aa33aSEmmanuel Vadot dynamic-power-coefficient = <228>; 146cb7aa33aSEmmanuel Vadot #cooling-cells = <2>; 147cb7aa33aSEmmanuel Vadot }; 148cb7aa33aSEmmanuel Vadot 149cb7aa33aSEmmanuel Vadot cpu_l3: cpu@300 { 150cb7aa33aSEmmanuel Vadot device_type = "cpu"; 151cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a55"; 152cb7aa33aSEmmanuel Vadot reg = <0x300>; 153cb7aa33aSEmmanuel Vadot enable-method = "psci"; 154cb7aa33aSEmmanuel Vadot capacity-dmips-mhz = <530>; 155cb7aa33aSEmmanuel Vadot clocks = <&scmi_clk SCMI_CLK_CPUL>; 156cb7aa33aSEmmanuel Vadot cpu-idle-states = <&CPU_SLEEP>; 157cb7aa33aSEmmanuel Vadot i-cache-size = <32768>; 158cb7aa33aSEmmanuel Vadot i-cache-line-size = <64>; 159cb7aa33aSEmmanuel Vadot i-cache-sets = <128>; 160cb7aa33aSEmmanuel Vadot d-cache-size = <32768>; 161cb7aa33aSEmmanuel Vadot d-cache-line-size = <64>; 162cb7aa33aSEmmanuel Vadot d-cache-sets = <128>; 163cb7aa33aSEmmanuel Vadot next-level-cache = <&l2_cache_l3>; 164cb7aa33aSEmmanuel Vadot dynamic-power-coefficient = <228>; 165cb7aa33aSEmmanuel Vadot #cooling-cells = <2>; 166cb7aa33aSEmmanuel Vadot }; 167cb7aa33aSEmmanuel Vadot 168cb7aa33aSEmmanuel Vadot cpu_b0: cpu@400 { 169cb7aa33aSEmmanuel Vadot device_type = "cpu"; 170cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a76"; 171cb7aa33aSEmmanuel Vadot reg = <0x400>; 172cb7aa33aSEmmanuel Vadot enable-method = "psci"; 173cb7aa33aSEmmanuel Vadot capacity-dmips-mhz = <1024>; 174cb7aa33aSEmmanuel Vadot clocks = <&scmi_clk SCMI_CLK_CPUB01>; 175fac71e4eSEmmanuel Vadot assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>; 176fac71e4eSEmmanuel Vadot assigned-clock-rates = <816000000>; 177cb7aa33aSEmmanuel Vadot cpu-idle-states = <&CPU_SLEEP>; 178cb7aa33aSEmmanuel Vadot i-cache-size = <65536>; 179cb7aa33aSEmmanuel Vadot i-cache-line-size = <64>; 180cb7aa33aSEmmanuel Vadot i-cache-sets = <256>; 181cb7aa33aSEmmanuel Vadot d-cache-size = <65536>; 182cb7aa33aSEmmanuel Vadot d-cache-line-size = <64>; 183cb7aa33aSEmmanuel Vadot d-cache-sets = <256>; 184cb7aa33aSEmmanuel Vadot next-level-cache = <&l2_cache_b0>; 185cb7aa33aSEmmanuel Vadot dynamic-power-coefficient = <416>; 186cb7aa33aSEmmanuel Vadot #cooling-cells = <2>; 187cb7aa33aSEmmanuel Vadot }; 188cb7aa33aSEmmanuel Vadot 189cb7aa33aSEmmanuel Vadot cpu_b1: cpu@500 { 190cb7aa33aSEmmanuel Vadot device_type = "cpu"; 191cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a76"; 192cb7aa33aSEmmanuel Vadot reg = <0x500>; 193cb7aa33aSEmmanuel Vadot enable-method = "psci"; 194cb7aa33aSEmmanuel Vadot capacity-dmips-mhz = <1024>; 195cb7aa33aSEmmanuel Vadot clocks = <&scmi_clk SCMI_CLK_CPUB01>; 196cb7aa33aSEmmanuel Vadot cpu-idle-states = <&CPU_SLEEP>; 197cb7aa33aSEmmanuel Vadot i-cache-size = <65536>; 198cb7aa33aSEmmanuel Vadot i-cache-line-size = <64>; 199cb7aa33aSEmmanuel Vadot i-cache-sets = <256>; 200cb7aa33aSEmmanuel Vadot d-cache-size = <65536>; 201cb7aa33aSEmmanuel Vadot d-cache-line-size = <64>; 202cb7aa33aSEmmanuel Vadot d-cache-sets = <256>; 203cb7aa33aSEmmanuel Vadot next-level-cache = <&l2_cache_b1>; 204cb7aa33aSEmmanuel Vadot dynamic-power-coefficient = <416>; 205cb7aa33aSEmmanuel Vadot #cooling-cells = <2>; 206cb7aa33aSEmmanuel Vadot }; 207cb7aa33aSEmmanuel Vadot 208cb7aa33aSEmmanuel Vadot cpu_b2: cpu@600 { 209cb7aa33aSEmmanuel Vadot device_type = "cpu"; 210cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a76"; 211cb7aa33aSEmmanuel Vadot reg = <0x600>; 212cb7aa33aSEmmanuel Vadot enable-method = "psci"; 213cb7aa33aSEmmanuel Vadot capacity-dmips-mhz = <1024>; 214cb7aa33aSEmmanuel Vadot clocks = <&scmi_clk SCMI_CLK_CPUB23>; 215fac71e4eSEmmanuel Vadot assigned-clocks = <&scmi_clk SCMI_CLK_CPUB23>; 216fac71e4eSEmmanuel Vadot assigned-clock-rates = <816000000>; 217cb7aa33aSEmmanuel Vadot cpu-idle-states = <&CPU_SLEEP>; 218cb7aa33aSEmmanuel Vadot i-cache-size = <65536>; 219cb7aa33aSEmmanuel Vadot i-cache-line-size = <64>; 220cb7aa33aSEmmanuel Vadot i-cache-sets = <256>; 221cb7aa33aSEmmanuel Vadot d-cache-size = <65536>; 222cb7aa33aSEmmanuel Vadot d-cache-line-size = <64>; 223cb7aa33aSEmmanuel Vadot d-cache-sets = <256>; 224cb7aa33aSEmmanuel Vadot next-level-cache = <&l2_cache_b2>; 225cb7aa33aSEmmanuel Vadot dynamic-power-coefficient = <416>; 226cb7aa33aSEmmanuel Vadot #cooling-cells = <2>; 227cb7aa33aSEmmanuel Vadot }; 228cb7aa33aSEmmanuel Vadot 229cb7aa33aSEmmanuel Vadot cpu_b3: cpu@700 { 230cb7aa33aSEmmanuel Vadot device_type = "cpu"; 231cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a76"; 232cb7aa33aSEmmanuel Vadot reg = <0x700>; 233cb7aa33aSEmmanuel Vadot enable-method = "psci"; 234cb7aa33aSEmmanuel Vadot capacity-dmips-mhz = <1024>; 235cb7aa33aSEmmanuel Vadot clocks = <&scmi_clk SCMI_CLK_CPUB23>; 236cb7aa33aSEmmanuel Vadot cpu-idle-states = <&CPU_SLEEP>; 237cb7aa33aSEmmanuel Vadot i-cache-size = <65536>; 238cb7aa33aSEmmanuel Vadot i-cache-line-size = <64>; 239cb7aa33aSEmmanuel Vadot i-cache-sets = <256>; 240cb7aa33aSEmmanuel Vadot d-cache-size = <65536>; 241cb7aa33aSEmmanuel Vadot d-cache-line-size = <64>; 242cb7aa33aSEmmanuel Vadot d-cache-sets = <256>; 243cb7aa33aSEmmanuel Vadot next-level-cache = <&l2_cache_b3>; 244cb7aa33aSEmmanuel Vadot dynamic-power-coefficient = <416>; 245cb7aa33aSEmmanuel Vadot #cooling-cells = <2>; 246cb7aa33aSEmmanuel Vadot }; 247cb7aa33aSEmmanuel Vadot 248cb7aa33aSEmmanuel Vadot idle-states { 249cb7aa33aSEmmanuel Vadot entry-method = "psci"; 250cb7aa33aSEmmanuel Vadot CPU_SLEEP: cpu-sleep { 251cb7aa33aSEmmanuel Vadot compatible = "arm,idle-state"; 252cb7aa33aSEmmanuel Vadot local-timer-stop; 253cb7aa33aSEmmanuel Vadot arm,psci-suspend-param = <0x0010000>; 254cb7aa33aSEmmanuel Vadot entry-latency-us = <100>; 255cb7aa33aSEmmanuel Vadot exit-latency-us = <120>; 256cb7aa33aSEmmanuel Vadot min-residency-us = <1000>; 257cb7aa33aSEmmanuel Vadot }; 258cb7aa33aSEmmanuel Vadot }; 259cb7aa33aSEmmanuel Vadot 260cb7aa33aSEmmanuel Vadot l2_cache_l0: l2-cache-l0 { 261cb7aa33aSEmmanuel Vadot compatible = "cache"; 262cb7aa33aSEmmanuel Vadot cache-size = <131072>; 263cb7aa33aSEmmanuel Vadot cache-line-size = <64>; 264cb7aa33aSEmmanuel Vadot cache-sets = <512>; 265cb7aa33aSEmmanuel Vadot cache-level = <2>; 266fac71e4eSEmmanuel Vadot cache-unified; 267cb7aa33aSEmmanuel Vadot next-level-cache = <&l3_cache>; 268cb7aa33aSEmmanuel Vadot }; 269cb7aa33aSEmmanuel Vadot 270cb7aa33aSEmmanuel Vadot l2_cache_l1: l2-cache-l1 { 271cb7aa33aSEmmanuel Vadot compatible = "cache"; 272cb7aa33aSEmmanuel Vadot cache-size = <131072>; 273cb7aa33aSEmmanuel Vadot cache-line-size = <64>; 274cb7aa33aSEmmanuel Vadot cache-sets = <512>; 275cb7aa33aSEmmanuel Vadot cache-level = <2>; 276fac71e4eSEmmanuel Vadot cache-unified; 277cb7aa33aSEmmanuel Vadot next-level-cache = <&l3_cache>; 278cb7aa33aSEmmanuel Vadot }; 279cb7aa33aSEmmanuel Vadot 280cb7aa33aSEmmanuel Vadot l2_cache_l2: l2-cache-l2 { 281cb7aa33aSEmmanuel Vadot compatible = "cache"; 282cb7aa33aSEmmanuel Vadot cache-size = <131072>; 283cb7aa33aSEmmanuel Vadot cache-line-size = <64>; 284cb7aa33aSEmmanuel Vadot cache-sets = <512>; 285cb7aa33aSEmmanuel Vadot cache-level = <2>; 286fac71e4eSEmmanuel Vadot cache-unified; 287cb7aa33aSEmmanuel Vadot next-level-cache = <&l3_cache>; 288cb7aa33aSEmmanuel Vadot }; 289cb7aa33aSEmmanuel Vadot 290cb7aa33aSEmmanuel Vadot l2_cache_l3: l2-cache-l3 { 291cb7aa33aSEmmanuel Vadot compatible = "cache"; 292cb7aa33aSEmmanuel Vadot cache-size = <131072>; 293cb7aa33aSEmmanuel Vadot cache-line-size = <64>; 294cb7aa33aSEmmanuel Vadot cache-sets = <512>; 295cb7aa33aSEmmanuel Vadot cache-level = <2>; 296fac71e4eSEmmanuel Vadot cache-unified; 297cb7aa33aSEmmanuel Vadot next-level-cache = <&l3_cache>; 298cb7aa33aSEmmanuel Vadot }; 299cb7aa33aSEmmanuel Vadot 300cb7aa33aSEmmanuel Vadot l2_cache_b0: l2-cache-b0 { 301cb7aa33aSEmmanuel Vadot compatible = "cache"; 302cb7aa33aSEmmanuel Vadot cache-size = <524288>; 303cb7aa33aSEmmanuel Vadot cache-line-size = <64>; 304cb7aa33aSEmmanuel Vadot cache-sets = <1024>; 305cb7aa33aSEmmanuel Vadot cache-level = <2>; 306fac71e4eSEmmanuel Vadot cache-unified; 307cb7aa33aSEmmanuel Vadot next-level-cache = <&l3_cache>; 308cb7aa33aSEmmanuel Vadot }; 309cb7aa33aSEmmanuel Vadot 310cb7aa33aSEmmanuel Vadot l2_cache_b1: l2-cache-b1 { 311cb7aa33aSEmmanuel Vadot compatible = "cache"; 312cb7aa33aSEmmanuel Vadot cache-size = <524288>; 313cb7aa33aSEmmanuel Vadot cache-line-size = <64>; 314cb7aa33aSEmmanuel Vadot cache-sets = <1024>; 315cb7aa33aSEmmanuel Vadot cache-level = <2>; 316fac71e4eSEmmanuel Vadot cache-unified; 317cb7aa33aSEmmanuel Vadot next-level-cache = <&l3_cache>; 318cb7aa33aSEmmanuel Vadot }; 319cb7aa33aSEmmanuel Vadot 320cb7aa33aSEmmanuel Vadot l2_cache_b2: l2-cache-b2 { 321cb7aa33aSEmmanuel Vadot compatible = "cache"; 322cb7aa33aSEmmanuel Vadot cache-size = <524288>; 323cb7aa33aSEmmanuel Vadot cache-line-size = <64>; 324cb7aa33aSEmmanuel Vadot cache-sets = <1024>; 325cb7aa33aSEmmanuel Vadot cache-level = <2>; 326fac71e4eSEmmanuel Vadot cache-unified; 327cb7aa33aSEmmanuel Vadot next-level-cache = <&l3_cache>; 328cb7aa33aSEmmanuel Vadot }; 329cb7aa33aSEmmanuel Vadot 330cb7aa33aSEmmanuel Vadot l2_cache_b3: l2-cache-b3 { 331cb7aa33aSEmmanuel Vadot compatible = "cache"; 332cb7aa33aSEmmanuel Vadot cache-size = <524288>; 333cb7aa33aSEmmanuel Vadot cache-line-size = <64>; 334cb7aa33aSEmmanuel Vadot cache-sets = <1024>; 335cb7aa33aSEmmanuel Vadot cache-level = <2>; 336fac71e4eSEmmanuel Vadot cache-unified; 337cb7aa33aSEmmanuel Vadot next-level-cache = <&l3_cache>; 338cb7aa33aSEmmanuel Vadot }; 339cb7aa33aSEmmanuel Vadot 340cb7aa33aSEmmanuel Vadot l3_cache: l3-cache { 341cb7aa33aSEmmanuel Vadot compatible = "cache"; 342cb7aa33aSEmmanuel Vadot cache-size = <3145728>; 343cb7aa33aSEmmanuel Vadot cache-line-size = <64>; 344cb7aa33aSEmmanuel Vadot cache-sets = <4096>; 345cb7aa33aSEmmanuel Vadot cache-level = <3>; 346fac71e4eSEmmanuel Vadot cache-unified; 347cb7aa33aSEmmanuel Vadot }; 348cb7aa33aSEmmanuel Vadot }; 349cb7aa33aSEmmanuel Vadot 350cb7aa33aSEmmanuel Vadot firmware { 351cb7aa33aSEmmanuel Vadot optee: optee { 352cb7aa33aSEmmanuel Vadot compatible = "linaro,optee-tz"; 353cb7aa33aSEmmanuel Vadot method = "smc"; 354cb7aa33aSEmmanuel Vadot }; 355cb7aa33aSEmmanuel Vadot 356cb7aa33aSEmmanuel Vadot scmi: scmi { 357cb7aa33aSEmmanuel Vadot compatible = "arm,scmi-smc"; 358cb7aa33aSEmmanuel Vadot arm,smc-id = <0x82000010>; 359cb7aa33aSEmmanuel Vadot shmem = <&scmi_shmem>; 360cb7aa33aSEmmanuel Vadot #address-cells = <1>; 361cb7aa33aSEmmanuel Vadot #size-cells = <0>; 362cb7aa33aSEmmanuel Vadot 363cb7aa33aSEmmanuel Vadot scmi_clk: protocol@14 { 364cb7aa33aSEmmanuel Vadot reg = <0x14>; 365cb7aa33aSEmmanuel Vadot #clock-cells = <1>; 366cb7aa33aSEmmanuel Vadot }; 367cb7aa33aSEmmanuel Vadot 368cb7aa33aSEmmanuel Vadot scmi_reset: protocol@16 { 369cb7aa33aSEmmanuel Vadot reg = <0x16>; 370cb7aa33aSEmmanuel Vadot #reset-cells = <1>; 371cb7aa33aSEmmanuel Vadot }; 372cb7aa33aSEmmanuel Vadot }; 373cb7aa33aSEmmanuel Vadot }; 374cb7aa33aSEmmanuel Vadot 375cb7aa33aSEmmanuel Vadot pmu-a55 { 376cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a55-pmu"; 377cb7aa33aSEmmanuel Vadot interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_partition0>; 378cb7aa33aSEmmanuel Vadot }; 379cb7aa33aSEmmanuel Vadot 380cb7aa33aSEmmanuel Vadot pmu-a76 { 381cb7aa33aSEmmanuel Vadot compatible = "arm,cortex-a76-pmu"; 382cb7aa33aSEmmanuel Vadot interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_partition1>; 383cb7aa33aSEmmanuel Vadot }; 384cb7aa33aSEmmanuel Vadot 385cb7aa33aSEmmanuel Vadot psci { 386cb7aa33aSEmmanuel Vadot compatible = "arm,psci-1.0"; 387cb7aa33aSEmmanuel Vadot method = "smc"; 388cb7aa33aSEmmanuel Vadot }; 389cb7aa33aSEmmanuel Vadot 390cb7aa33aSEmmanuel Vadot spll: clock-0 { 391cb7aa33aSEmmanuel Vadot compatible = "fixed-clock"; 392cb7aa33aSEmmanuel Vadot clock-frequency = <702000000>; 393cb7aa33aSEmmanuel Vadot clock-output-names = "spll"; 394cb7aa33aSEmmanuel Vadot #clock-cells = <0>; 395cb7aa33aSEmmanuel Vadot }; 396cb7aa33aSEmmanuel Vadot 397*8d13bc63SEmmanuel Vadot display_subsystem: display-subsystem { 398*8d13bc63SEmmanuel Vadot compatible = "rockchip,display-subsystem"; 399*8d13bc63SEmmanuel Vadot ports = <&vop_out>; 400*8d13bc63SEmmanuel Vadot }; 401*8d13bc63SEmmanuel Vadot 402cb7aa33aSEmmanuel Vadot timer { 403cb7aa33aSEmmanuel Vadot compatible = "arm,armv8-timer"; 404cb7aa33aSEmmanuel Vadot interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>, 405cb7aa33aSEmmanuel Vadot <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>, 406cb7aa33aSEmmanuel Vadot <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>, 407cb7aa33aSEmmanuel Vadot <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>, 408cb7aa33aSEmmanuel Vadot <GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH 0>; 409cb7aa33aSEmmanuel Vadot interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt"; 410cb7aa33aSEmmanuel Vadot }; 411cb7aa33aSEmmanuel Vadot 412cb7aa33aSEmmanuel Vadot xin24m: clock-1 { 413cb7aa33aSEmmanuel Vadot compatible = "fixed-clock"; 414cb7aa33aSEmmanuel Vadot clock-frequency = <24000000>; 415cb7aa33aSEmmanuel Vadot clock-output-names = "xin24m"; 416cb7aa33aSEmmanuel Vadot #clock-cells = <0>; 417cb7aa33aSEmmanuel Vadot }; 418cb7aa33aSEmmanuel Vadot 419cb7aa33aSEmmanuel Vadot xin32k: clock-2 { 420cb7aa33aSEmmanuel Vadot compatible = "fixed-clock"; 421cb7aa33aSEmmanuel Vadot clock-frequency = <32768>; 422cb7aa33aSEmmanuel Vadot clock-output-names = "xin32k"; 423cb7aa33aSEmmanuel Vadot #clock-cells = <0>; 424cb7aa33aSEmmanuel Vadot }; 425cb7aa33aSEmmanuel Vadot 426cb7aa33aSEmmanuel Vadot pmu_sram: sram@10f000 { 427cb7aa33aSEmmanuel Vadot compatible = "mmio-sram"; 428cb7aa33aSEmmanuel Vadot reg = <0x0 0x0010f000 0x0 0x100>; 429cb7aa33aSEmmanuel Vadot ranges = <0 0x0 0x0010f000 0x100>; 430cb7aa33aSEmmanuel Vadot #address-cells = <1>; 431cb7aa33aSEmmanuel Vadot #size-cells = <1>; 432cb7aa33aSEmmanuel Vadot 433cb7aa33aSEmmanuel Vadot scmi_shmem: sram@0 { 434cb7aa33aSEmmanuel Vadot compatible = "arm,scmi-shmem"; 435cb7aa33aSEmmanuel Vadot reg = <0x0 0x100>; 436cb7aa33aSEmmanuel Vadot }; 437cb7aa33aSEmmanuel Vadot }; 438cb7aa33aSEmmanuel Vadot 439aa1a8ff2SEmmanuel Vadot usb_host0_ehci: usb@fc800000 { 440aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-ehci", "generic-ehci"; 441aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfc800000 0x0 0x40000>; 442aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0>; 443aa1a8ff2SEmmanuel Vadot clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>; 444aa1a8ff2SEmmanuel Vadot phys = <&u2phy2_host>; 445aa1a8ff2SEmmanuel Vadot phy-names = "usb"; 446aa1a8ff2SEmmanuel Vadot power-domains = <&power RK3588_PD_USB>; 447aa1a8ff2SEmmanuel Vadot status = "disabled"; 448aa1a8ff2SEmmanuel Vadot }; 449aa1a8ff2SEmmanuel Vadot 450aa1a8ff2SEmmanuel Vadot usb_host0_ohci: usb@fc840000 { 451aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-ohci", "generic-ohci"; 452aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfc840000 0x0 0x40000>; 453aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 0>; 454aa1a8ff2SEmmanuel Vadot clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>; 455aa1a8ff2SEmmanuel Vadot phys = <&u2phy2_host>; 456aa1a8ff2SEmmanuel Vadot phy-names = "usb"; 457aa1a8ff2SEmmanuel Vadot power-domains = <&power RK3588_PD_USB>; 458aa1a8ff2SEmmanuel Vadot status = "disabled"; 459aa1a8ff2SEmmanuel Vadot }; 460aa1a8ff2SEmmanuel Vadot 461aa1a8ff2SEmmanuel Vadot usb_host1_ehci: usb@fc880000 { 462aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-ehci", "generic-ehci"; 463aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfc880000 0x0 0x40000>; 464aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 0>; 465aa1a8ff2SEmmanuel Vadot clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>; 466aa1a8ff2SEmmanuel Vadot phys = <&u2phy3_host>; 467aa1a8ff2SEmmanuel Vadot phy-names = "usb"; 468aa1a8ff2SEmmanuel Vadot power-domains = <&power RK3588_PD_USB>; 469aa1a8ff2SEmmanuel Vadot status = "disabled"; 470aa1a8ff2SEmmanuel Vadot }; 471aa1a8ff2SEmmanuel Vadot 472aa1a8ff2SEmmanuel Vadot usb_host1_ohci: usb@fc8c0000 { 473aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-ohci", "generic-ohci"; 474aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfc8c0000 0x0 0x40000>; 475aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 0>; 476aa1a8ff2SEmmanuel Vadot clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>; 477aa1a8ff2SEmmanuel Vadot phys = <&u2phy3_host>; 478aa1a8ff2SEmmanuel Vadot phy-names = "usb"; 479aa1a8ff2SEmmanuel Vadot power-domains = <&power RK3588_PD_USB>; 480aa1a8ff2SEmmanuel Vadot status = "disabled"; 481aa1a8ff2SEmmanuel Vadot }; 482aa1a8ff2SEmmanuel Vadot 48384943d6fSEmmanuel Vadot usb_host2_xhci: usb@fcd00000 { 48484943d6fSEmmanuel Vadot compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; 48584943d6fSEmmanuel Vadot reg = <0x0 0xfcd00000 0x0 0x400000>; 48684943d6fSEmmanuel Vadot interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH 0>; 48784943d6fSEmmanuel Vadot clocks = <&cru REF_CLK_USB3OTG2>, <&cru SUSPEND_CLK_USB3OTG2>, 48884943d6fSEmmanuel Vadot <&cru ACLK_USB3OTG2>, <&cru CLK_UTMI_OTG2>, 48984943d6fSEmmanuel Vadot <&cru CLK_PIPEPHY2_PIPE_U3_G>; 49084943d6fSEmmanuel Vadot clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi", "pipe"; 49184943d6fSEmmanuel Vadot dr_mode = "host"; 49284943d6fSEmmanuel Vadot phys = <&combphy2_psu PHY_TYPE_USB3>; 49384943d6fSEmmanuel Vadot phy-names = "usb3-phy"; 49484943d6fSEmmanuel Vadot phy_type = "utmi_wide"; 49584943d6fSEmmanuel Vadot resets = <&cru SRST_A_USB3OTG2>; 49684943d6fSEmmanuel Vadot snps,dis_enblslpm_quirk; 49784943d6fSEmmanuel Vadot snps,dis-u2-freeclk-exists-quirk; 49884943d6fSEmmanuel Vadot snps,dis-del-phy-power-chg-quirk; 49984943d6fSEmmanuel Vadot snps,dis-tx-ipgap-linecheck-quirk; 50084943d6fSEmmanuel Vadot snps,dis_rxdet_inp3_quirk; 50184943d6fSEmmanuel Vadot status = "disabled"; 50284943d6fSEmmanuel Vadot }; 50384943d6fSEmmanuel Vadot 50484943d6fSEmmanuel Vadot pmu1grf: syscon@fd58a000 { 50584943d6fSEmmanuel Vadot compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd"; 50684943d6fSEmmanuel Vadot reg = <0x0 0xfd58a000 0x0 0x10000>; 50784943d6fSEmmanuel Vadot }; 50884943d6fSEmmanuel Vadot 509cb7aa33aSEmmanuel Vadot sys_grf: syscon@fd58c000 { 510cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-sys-grf", "syscon"; 511cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd58c000 0x0 0x1000>; 512cb7aa33aSEmmanuel Vadot }; 513cb7aa33aSEmmanuel Vadot 514*8d13bc63SEmmanuel Vadot vop_grf: syscon@fd5a4000 { 515*8d13bc63SEmmanuel Vadot compatible = "rockchip,rk3588-vop-grf", "syscon"; 516*8d13bc63SEmmanuel Vadot reg = <0x0 0xfd5a4000 0x0 0x2000>; 517*8d13bc63SEmmanuel Vadot }; 518*8d13bc63SEmmanuel Vadot 519*8d13bc63SEmmanuel Vadot vo1_grf: syscon@fd5a8000 { 520*8d13bc63SEmmanuel Vadot compatible = "rockchip,rk3588-vo-grf", "syscon"; 521*8d13bc63SEmmanuel Vadot reg = <0x0 0xfd5a8000 0x0 0x100>; 522*8d13bc63SEmmanuel Vadot }; 523*8d13bc63SEmmanuel Vadot 524cb7aa33aSEmmanuel Vadot php_grf: syscon@fd5b0000 { 525cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-php-grf", "syscon"; 526cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd5b0000 0x0 0x1000>; 527cb7aa33aSEmmanuel Vadot }; 528cb7aa33aSEmmanuel Vadot 529aa1a8ff2SEmmanuel Vadot pipe_phy0_grf: syscon@fd5bc000 { 530aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-pipe-phy-grf", "syscon"; 531aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfd5bc000 0x0 0x100>; 532aa1a8ff2SEmmanuel Vadot }; 533aa1a8ff2SEmmanuel Vadot 534aa1a8ff2SEmmanuel Vadot pipe_phy2_grf: syscon@fd5c4000 { 535aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-pipe-phy-grf", "syscon"; 536aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfd5c4000 0x0 0x100>; 537aa1a8ff2SEmmanuel Vadot }; 538aa1a8ff2SEmmanuel Vadot 539aa1a8ff2SEmmanuel Vadot usb2phy2_grf: syscon@fd5d8000 { 540aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; 541aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfd5d8000 0x0 0x4000>; 542aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 543aa1a8ff2SEmmanuel Vadot #size-cells = <1>; 544aa1a8ff2SEmmanuel Vadot 545aa1a8ff2SEmmanuel Vadot u2phy2: usb2-phy@8000 { 546aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-usb2phy"; 547aa1a8ff2SEmmanuel Vadot reg = <0x8000 0x10>; 548aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0>; 549aa1a8ff2SEmmanuel Vadot resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>; 550aa1a8ff2SEmmanuel Vadot reset-names = "phy", "apb"; 551aa1a8ff2SEmmanuel Vadot clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; 552aa1a8ff2SEmmanuel Vadot clock-names = "phyclk"; 553aa1a8ff2SEmmanuel Vadot clock-output-names = "usb480m_phy2"; 554aa1a8ff2SEmmanuel Vadot #clock-cells = <0>; 555aa1a8ff2SEmmanuel Vadot status = "disabled"; 556aa1a8ff2SEmmanuel Vadot 557aa1a8ff2SEmmanuel Vadot u2phy2_host: host-port { 558aa1a8ff2SEmmanuel Vadot #phy-cells = <0>; 559aa1a8ff2SEmmanuel Vadot status = "disabled"; 560aa1a8ff2SEmmanuel Vadot }; 561aa1a8ff2SEmmanuel Vadot }; 562aa1a8ff2SEmmanuel Vadot }; 563aa1a8ff2SEmmanuel Vadot 564aa1a8ff2SEmmanuel Vadot usb2phy3_grf: syscon@fd5dc000 { 565aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; 566aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfd5dc000 0x0 0x4000>; 567aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 568aa1a8ff2SEmmanuel Vadot #size-cells = <1>; 569aa1a8ff2SEmmanuel Vadot 570aa1a8ff2SEmmanuel Vadot u2phy3: usb2-phy@c000 { 571aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-usb2phy"; 572aa1a8ff2SEmmanuel Vadot reg = <0xc000 0x10>; 573aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0>; 574aa1a8ff2SEmmanuel Vadot resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>; 575aa1a8ff2SEmmanuel Vadot reset-names = "phy", "apb"; 576aa1a8ff2SEmmanuel Vadot clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; 577aa1a8ff2SEmmanuel Vadot clock-names = "phyclk"; 578aa1a8ff2SEmmanuel Vadot clock-output-names = "usb480m_phy3"; 579aa1a8ff2SEmmanuel Vadot #clock-cells = <0>; 580aa1a8ff2SEmmanuel Vadot status = "disabled"; 581aa1a8ff2SEmmanuel Vadot 582aa1a8ff2SEmmanuel Vadot u2phy3_host: host-port { 583aa1a8ff2SEmmanuel Vadot #phy-cells = <0>; 584aa1a8ff2SEmmanuel Vadot status = "disabled"; 585aa1a8ff2SEmmanuel Vadot }; 586aa1a8ff2SEmmanuel Vadot }; 587aa1a8ff2SEmmanuel Vadot }; 588aa1a8ff2SEmmanuel Vadot 589cb7aa33aSEmmanuel Vadot ioc: syscon@fd5f0000 { 590cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-ioc", "syscon"; 591cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd5f0000 0x0 0x10000>; 592cb7aa33aSEmmanuel Vadot }; 593cb7aa33aSEmmanuel Vadot 594cb7aa33aSEmmanuel Vadot system_sram1: sram@fd600000 { 595cb7aa33aSEmmanuel Vadot compatible = "mmio-sram"; 596cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd600000 0x0 0x100000>; 597cb7aa33aSEmmanuel Vadot ranges = <0x0 0x0 0xfd600000 0x100000>; 598cb7aa33aSEmmanuel Vadot #address-cells = <1>; 599cb7aa33aSEmmanuel Vadot #size-cells = <1>; 600cb7aa33aSEmmanuel Vadot }; 601cb7aa33aSEmmanuel Vadot 602cb7aa33aSEmmanuel Vadot cru: clock-controller@fd7c0000 { 603cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-cru"; 604cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd7c0000 0x0 0x5c000>; 605cb7aa33aSEmmanuel Vadot assigned-clocks = 606cb7aa33aSEmmanuel Vadot <&cru PLL_PPLL>, <&cru PLL_AUPLL>, 607cb7aa33aSEmmanuel Vadot <&cru PLL_NPLL>, <&cru PLL_GPLL>, 608cb7aa33aSEmmanuel Vadot <&cru ACLK_CENTER_ROOT>, 609cb7aa33aSEmmanuel Vadot <&cru HCLK_CENTER_ROOT>, <&cru ACLK_CENTER_LOW_ROOT>, 610cb7aa33aSEmmanuel Vadot <&cru ACLK_TOP_ROOT>, <&cru PCLK_TOP_ROOT>, 611cb7aa33aSEmmanuel Vadot <&cru ACLK_LOW_TOP_ROOT>, <&cru PCLK_PMU0_ROOT>, 612cb7aa33aSEmmanuel Vadot <&cru HCLK_PMU_CM0_ROOT>, <&cru ACLK_VOP>, 613cb7aa33aSEmmanuel Vadot <&cru ACLK_BUS_ROOT>, <&cru CLK_150M_SRC>, 614cb7aa33aSEmmanuel Vadot <&cru CLK_GPU>; 615cb7aa33aSEmmanuel Vadot assigned-clock-rates = 616fac71e4eSEmmanuel Vadot <1100000000>, <786432000>, 617cb7aa33aSEmmanuel Vadot <850000000>, <1188000000>, 618cb7aa33aSEmmanuel Vadot <702000000>, 619cb7aa33aSEmmanuel Vadot <400000000>, <500000000>, 620cb7aa33aSEmmanuel Vadot <800000000>, <100000000>, 621cb7aa33aSEmmanuel Vadot <400000000>, <100000000>, 622cb7aa33aSEmmanuel Vadot <200000000>, <500000000>, 623cb7aa33aSEmmanuel Vadot <375000000>, <150000000>, 624cb7aa33aSEmmanuel Vadot <200000000>; 625cb7aa33aSEmmanuel Vadot rockchip,grf = <&php_grf>; 626cb7aa33aSEmmanuel Vadot #clock-cells = <1>; 627cb7aa33aSEmmanuel Vadot #reset-cells = <1>; 628cb7aa33aSEmmanuel Vadot }; 629cb7aa33aSEmmanuel Vadot 630cb7aa33aSEmmanuel Vadot i2c0: i2c@fd880000 { 631cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; 632cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd880000 0x0 0x1000>; 633cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 0>; 634cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>; 635cb7aa33aSEmmanuel Vadot clock-names = "i2c", "pclk"; 636cb7aa33aSEmmanuel Vadot pinctrl-0 = <&i2c0m0_xfer>; 637cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 638cb7aa33aSEmmanuel Vadot #address-cells = <1>; 639cb7aa33aSEmmanuel Vadot #size-cells = <0>; 640cb7aa33aSEmmanuel Vadot status = "disabled"; 641cb7aa33aSEmmanuel Vadot }; 642cb7aa33aSEmmanuel Vadot 643*8d13bc63SEmmanuel Vadot vop: vop@fdd90000 { 644*8d13bc63SEmmanuel Vadot compatible = "rockchip,rk3588-vop"; 645*8d13bc63SEmmanuel Vadot reg = <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>; 646*8d13bc63SEmmanuel Vadot reg-names = "vop", "gamma-lut"; 647*8d13bc63SEmmanuel Vadot interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>; 648*8d13bc63SEmmanuel Vadot clocks = <&cru ACLK_VOP>, 649*8d13bc63SEmmanuel Vadot <&cru HCLK_VOP>, 650*8d13bc63SEmmanuel Vadot <&cru DCLK_VOP0>, 651*8d13bc63SEmmanuel Vadot <&cru DCLK_VOP1>, 652*8d13bc63SEmmanuel Vadot <&cru DCLK_VOP2>, 653*8d13bc63SEmmanuel Vadot <&cru DCLK_VOP3>, 654*8d13bc63SEmmanuel Vadot <&cru PCLK_VOP_ROOT>; 655*8d13bc63SEmmanuel Vadot clock-names = "aclk", 656*8d13bc63SEmmanuel Vadot "hclk", 657*8d13bc63SEmmanuel Vadot "dclk_vp0", 658*8d13bc63SEmmanuel Vadot "dclk_vp1", 659*8d13bc63SEmmanuel Vadot "dclk_vp2", 660*8d13bc63SEmmanuel Vadot "dclk_vp3", 661*8d13bc63SEmmanuel Vadot "pclk_vop"; 662*8d13bc63SEmmanuel Vadot iommus = <&vop_mmu>; 663*8d13bc63SEmmanuel Vadot power-domains = <&power RK3588_PD_VOP>; 664*8d13bc63SEmmanuel Vadot rockchip,grf = <&sys_grf>; 665*8d13bc63SEmmanuel Vadot rockchip,vop-grf = <&vop_grf>; 666*8d13bc63SEmmanuel Vadot rockchip,vo1-grf = <&vo1_grf>; 667*8d13bc63SEmmanuel Vadot rockchip,pmu = <&pmu>; 668*8d13bc63SEmmanuel Vadot status = "disabled"; 669*8d13bc63SEmmanuel Vadot 670*8d13bc63SEmmanuel Vadot vop_out: ports { 671*8d13bc63SEmmanuel Vadot #address-cells = <1>; 672*8d13bc63SEmmanuel Vadot #size-cells = <0>; 673*8d13bc63SEmmanuel Vadot 674*8d13bc63SEmmanuel Vadot vp0: port@0 { 675*8d13bc63SEmmanuel Vadot #address-cells = <1>; 676*8d13bc63SEmmanuel Vadot #size-cells = <0>; 677*8d13bc63SEmmanuel Vadot reg = <0>; 678*8d13bc63SEmmanuel Vadot }; 679*8d13bc63SEmmanuel Vadot 680*8d13bc63SEmmanuel Vadot vp1: port@1 { 681*8d13bc63SEmmanuel Vadot #address-cells = <1>; 682*8d13bc63SEmmanuel Vadot #size-cells = <0>; 683*8d13bc63SEmmanuel Vadot reg = <1>; 684*8d13bc63SEmmanuel Vadot }; 685*8d13bc63SEmmanuel Vadot 686*8d13bc63SEmmanuel Vadot vp2: port@2 { 687*8d13bc63SEmmanuel Vadot #address-cells = <1>; 688*8d13bc63SEmmanuel Vadot #size-cells = <0>; 689*8d13bc63SEmmanuel Vadot reg = <2>; 690*8d13bc63SEmmanuel Vadot }; 691*8d13bc63SEmmanuel Vadot 692*8d13bc63SEmmanuel Vadot vp3: port@3 { 693*8d13bc63SEmmanuel Vadot #address-cells = <1>; 694*8d13bc63SEmmanuel Vadot #size-cells = <0>; 695*8d13bc63SEmmanuel Vadot reg = <3>; 696*8d13bc63SEmmanuel Vadot }; 697*8d13bc63SEmmanuel Vadot }; 698*8d13bc63SEmmanuel Vadot }; 699*8d13bc63SEmmanuel Vadot 700*8d13bc63SEmmanuel Vadot vop_mmu: iommu@fdd97e00 { 701*8d13bc63SEmmanuel Vadot compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; 702*8d13bc63SEmmanuel Vadot reg = <0x0 0xfdd97e00 0x0 0x100>, <0x0 0xfdd97f00 0x0 0x100>; 703*8d13bc63SEmmanuel Vadot interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>; 704*8d13bc63SEmmanuel Vadot clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; 705*8d13bc63SEmmanuel Vadot clock-names = "aclk", "iface"; 706*8d13bc63SEmmanuel Vadot #iommu-cells = <0>; 707*8d13bc63SEmmanuel Vadot power-domains = <&power RK3588_PD_VOP>; 708*8d13bc63SEmmanuel Vadot status = "disabled"; 709*8d13bc63SEmmanuel Vadot }; 710*8d13bc63SEmmanuel Vadot 711cb7aa33aSEmmanuel Vadot uart0: serial@fd890000 { 712cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 713cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd890000 0x0 0x100>; 714cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 0>; 715cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; 716cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 717cb7aa33aSEmmanuel Vadot dmas = <&dmac0 6>, <&dmac0 7>; 718cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 719cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart0m1_xfer>; 720cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 721cb7aa33aSEmmanuel Vadot reg-shift = <2>; 722cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 723cb7aa33aSEmmanuel Vadot status = "disabled"; 724cb7aa33aSEmmanuel Vadot }; 725cb7aa33aSEmmanuel Vadot 726cb7aa33aSEmmanuel Vadot pwm0: pwm@fd8b0000 { 727cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 728cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd8b0000 0x0 0x10>; 729cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>; 730cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 731cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm0m0_pins>; 732cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 733cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 734cb7aa33aSEmmanuel Vadot status = "disabled"; 735cb7aa33aSEmmanuel Vadot }; 736cb7aa33aSEmmanuel Vadot 737cb7aa33aSEmmanuel Vadot pwm1: pwm@fd8b0010 { 738cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 739cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd8b0010 0x0 0x10>; 740cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>; 741cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 742cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm1m0_pins>; 743cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 744cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 745cb7aa33aSEmmanuel Vadot status = "disabled"; 746cb7aa33aSEmmanuel Vadot }; 747cb7aa33aSEmmanuel Vadot 748cb7aa33aSEmmanuel Vadot pwm2: pwm@fd8b0020 { 749cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 750cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd8b0020 0x0 0x10>; 751cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>; 752cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 753cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm2m0_pins>; 754cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 755cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 756cb7aa33aSEmmanuel Vadot status = "disabled"; 757cb7aa33aSEmmanuel Vadot }; 758cb7aa33aSEmmanuel Vadot 759cb7aa33aSEmmanuel Vadot pwm3: pwm@fd8b0030 { 760cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 761cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd8b0030 0x0 0x10>; 762cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>; 763cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 764cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm3m0_pins>; 765cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 766cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 767cb7aa33aSEmmanuel Vadot status = "disabled"; 768cb7aa33aSEmmanuel Vadot }; 769cb7aa33aSEmmanuel Vadot 770cb7aa33aSEmmanuel Vadot pmu: power-management@fd8d8000 { 771cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pmu", "syscon", "simple-mfd"; 772cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd8d8000 0x0 0x400>; 773cb7aa33aSEmmanuel Vadot 774cb7aa33aSEmmanuel Vadot power: power-controller { 775cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-power-controller"; 776cb7aa33aSEmmanuel Vadot #address-cells = <1>; 777cb7aa33aSEmmanuel Vadot #power-domain-cells = <1>; 778cb7aa33aSEmmanuel Vadot #size-cells = <0>; 779cb7aa33aSEmmanuel Vadot status = "okay"; 780cb7aa33aSEmmanuel Vadot 781cb7aa33aSEmmanuel Vadot /* These power domains are grouped by VD_NPU */ 782cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_NPU { 783cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_NPU>; 784cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 785cb7aa33aSEmmanuel Vadot #address-cells = <1>; 786cb7aa33aSEmmanuel Vadot #size-cells = <0>; 787cb7aa33aSEmmanuel Vadot 788cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_NPUTOP { 789cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_NPUTOP>; 790cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_NPU_ROOT>, 791cb7aa33aSEmmanuel Vadot <&cru PCLK_NPU_ROOT>, 792cb7aa33aSEmmanuel Vadot <&cru CLK_NPU_DSU0>, 793cb7aa33aSEmmanuel Vadot <&cru HCLK_NPU_CM0_ROOT>; 794cb7aa33aSEmmanuel Vadot pm_qos = <&qos_npu0_mwr>, 795cb7aa33aSEmmanuel Vadot <&qos_npu0_mro>, 796cb7aa33aSEmmanuel Vadot <&qos_mcu_npu>; 797cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 798cb7aa33aSEmmanuel Vadot #address-cells = <1>; 799cb7aa33aSEmmanuel Vadot #size-cells = <0>; 800cb7aa33aSEmmanuel Vadot 801cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_NPU1 { 802cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_NPU1>; 803cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_NPU_ROOT>, 804cb7aa33aSEmmanuel Vadot <&cru PCLK_NPU_ROOT>, 805cb7aa33aSEmmanuel Vadot <&cru CLK_NPU_DSU0>; 806cb7aa33aSEmmanuel Vadot pm_qos = <&qos_npu1>; 807cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 808cb7aa33aSEmmanuel Vadot }; 809cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_NPU2 { 810cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_NPU2>; 811cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_NPU_ROOT>, 812cb7aa33aSEmmanuel Vadot <&cru PCLK_NPU_ROOT>, 813cb7aa33aSEmmanuel Vadot <&cru CLK_NPU_DSU0>; 814cb7aa33aSEmmanuel Vadot pm_qos = <&qos_npu2>; 815cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 816cb7aa33aSEmmanuel Vadot }; 817cb7aa33aSEmmanuel Vadot }; 818cb7aa33aSEmmanuel Vadot }; 819cb7aa33aSEmmanuel Vadot /* These power domains are grouped by VD_GPU */ 820cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_GPU { 821cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_GPU>; 822cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_GPU>, 823cb7aa33aSEmmanuel Vadot <&cru CLK_GPU_COREGROUP>, 824cb7aa33aSEmmanuel Vadot <&cru CLK_GPU_STACKS>; 825cb7aa33aSEmmanuel Vadot pm_qos = <&qos_gpu_m0>, 826cb7aa33aSEmmanuel Vadot <&qos_gpu_m1>, 827cb7aa33aSEmmanuel Vadot <&qos_gpu_m2>, 828cb7aa33aSEmmanuel Vadot <&qos_gpu_m3>; 829cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 830cb7aa33aSEmmanuel Vadot }; 831cb7aa33aSEmmanuel Vadot /* These power domains are grouped by VD_VCODEC */ 832cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_VCODEC { 833cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_VCODEC>; 834cb7aa33aSEmmanuel Vadot #address-cells = <1>; 835cb7aa33aSEmmanuel Vadot #size-cells = <0>; 836cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 837cb7aa33aSEmmanuel Vadot 838cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_RKVDEC0 { 839cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_RKVDEC0>; 840cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_RKVDEC0>, 841cb7aa33aSEmmanuel Vadot <&cru HCLK_VDPU_ROOT>, 842cb7aa33aSEmmanuel Vadot <&cru ACLK_VDPU_ROOT>, 843cb7aa33aSEmmanuel Vadot <&cru ACLK_RKVDEC0>, 844cb7aa33aSEmmanuel Vadot <&cru ACLK_RKVDEC_CCU>; 845cb7aa33aSEmmanuel Vadot pm_qos = <&qos_rkvdec0>; 846cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 847cb7aa33aSEmmanuel Vadot }; 848cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_RKVDEC1 { 849cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_RKVDEC1>; 850cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_RKVDEC1>, 851cb7aa33aSEmmanuel Vadot <&cru HCLK_VDPU_ROOT>, 852cb7aa33aSEmmanuel Vadot <&cru ACLK_VDPU_ROOT>, 853cb7aa33aSEmmanuel Vadot <&cru ACLK_RKVDEC1>; 854cb7aa33aSEmmanuel Vadot pm_qos = <&qos_rkvdec1>; 855cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 856cb7aa33aSEmmanuel Vadot }; 857cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_VENC0 { 858cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_VENC0>; 859cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_RKVENC0>, 860cb7aa33aSEmmanuel Vadot <&cru ACLK_RKVENC0>; 861cb7aa33aSEmmanuel Vadot pm_qos = <&qos_rkvenc0_m0ro>, 862cb7aa33aSEmmanuel Vadot <&qos_rkvenc0_m1ro>, 863cb7aa33aSEmmanuel Vadot <&qos_rkvenc0_m2wo>; 864cb7aa33aSEmmanuel Vadot #address-cells = <1>; 865cb7aa33aSEmmanuel Vadot #size-cells = <0>; 866cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 867cb7aa33aSEmmanuel Vadot 868cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_VENC1 { 869cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_VENC1>; 870cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_RKVENC1>, 871cb7aa33aSEmmanuel Vadot <&cru HCLK_RKVENC0>, 872cb7aa33aSEmmanuel Vadot <&cru ACLK_RKVENC0>, 873cb7aa33aSEmmanuel Vadot <&cru ACLK_RKVENC1>; 874cb7aa33aSEmmanuel Vadot pm_qos = <&qos_rkvenc1_m0ro>, 875cb7aa33aSEmmanuel Vadot <&qos_rkvenc1_m1ro>, 876cb7aa33aSEmmanuel Vadot <&qos_rkvenc1_m2wo>; 877cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 878cb7aa33aSEmmanuel Vadot }; 879cb7aa33aSEmmanuel Vadot }; 880cb7aa33aSEmmanuel Vadot }; 881cb7aa33aSEmmanuel Vadot /* These power domains are grouped by VD_LOGIC */ 882cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_VDPU { 883cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_VDPU>; 884cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_VDPU_ROOT>, 885cb7aa33aSEmmanuel Vadot <&cru ACLK_VDPU_LOW_ROOT>, 886cb7aa33aSEmmanuel Vadot <&cru ACLK_VDPU_ROOT>, 887cb7aa33aSEmmanuel Vadot <&cru ACLK_JPEG_DECODER_ROOT>, 888cb7aa33aSEmmanuel Vadot <&cru ACLK_IEP2P0>, 889cb7aa33aSEmmanuel Vadot <&cru HCLK_IEP2P0>, 890cb7aa33aSEmmanuel Vadot <&cru ACLK_JPEG_ENCODER0>, 891cb7aa33aSEmmanuel Vadot <&cru HCLK_JPEG_ENCODER0>, 892cb7aa33aSEmmanuel Vadot <&cru ACLK_JPEG_ENCODER1>, 893cb7aa33aSEmmanuel Vadot <&cru HCLK_JPEG_ENCODER1>, 894cb7aa33aSEmmanuel Vadot <&cru ACLK_JPEG_ENCODER2>, 895cb7aa33aSEmmanuel Vadot <&cru HCLK_JPEG_ENCODER2>, 896cb7aa33aSEmmanuel Vadot <&cru ACLK_JPEG_ENCODER3>, 897cb7aa33aSEmmanuel Vadot <&cru HCLK_JPEG_ENCODER3>, 898cb7aa33aSEmmanuel Vadot <&cru ACLK_JPEG_DECODER>, 899cb7aa33aSEmmanuel Vadot <&cru HCLK_JPEG_DECODER>, 900cb7aa33aSEmmanuel Vadot <&cru ACLK_RGA2>, 901cb7aa33aSEmmanuel Vadot <&cru HCLK_RGA2>; 902cb7aa33aSEmmanuel Vadot pm_qos = <&qos_iep>, 903cb7aa33aSEmmanuel Vadot <&qos_jpeg_dec>, 904cb7aa33aSEmmanuel Vadot <&qos_jpeg_enc0>, 905cb7aa33aSEmmanuel Vadot <&qos_jpeg_enc1>, 906cb7aa33aSEmmanuel Vadot <&qos_jpeg_enc2>, 907cb7aa33aSEmmanuel Vadot <&qos_jpeg_enc3>, 908cb7aa33aSEmmanuel Vadot <&qos_rga2_mro>, 909cb7aa33aSEmmanuel Vadot <&qos_rga2_mwo>; 910cb7aa33aSEmmanuel Vadot #address-cells = <1>; 911cb7aa33aSEmmanuel Vadot #size-cells = <0>; 912cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 913cb7aa33aSEmmanuel Vadot 914cb7aa33aSEmmanuel Vadot 915cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_AV1 { 916cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_AV1>; 917cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_AV1>, 918cb7aa33aSEmmanuel Vadot <&cru ACLK_AV1>, 919cb7aa33aSEmmanuel Vadot <&cru HCLK_VDPU_ROOT>; 920cb7aa33aSEmmanuel Vadot pm_qos = <&qos_av1>; 921cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 922cb7aa33aSEmmanuel Vadot }; 923cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_RKVDEC0 { 924cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_RKVDEC0>; 925cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_RKVDEC0>, 926cb7aa33aSEmmanuel Vadot <&cru HCLK_VDPU_ROOT>, 927cb7aa33aSEmmanuel Vadot <&cru ACLK_VDPU_ROOT>, 928cb7aa33aSEmmanuel Vadot <&cru ACLK_RKVDEC0>; 929cb7aa33aSEmmanuel Vadot pm_qos = <&qos_rkvdec0>; 930cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 931cb7aa33aSEmmanuel Vadot }; 932cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_RKVDEC1 { 933cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_RKVDEC1>; 934cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_RKVDEC1>, 935cb7aa33aSEmmanuel Vadot <&cru HCLK_VDPU_ROOT>, 936cb7aa33aSEmmanuel Vadot <&cru ACLK_VDPU_ROOT>; 937cb7aa33aSEmmanuel Vadot pm_qos = <&qos_rkvdec1>; 938cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 939cb7aa33aSEmmanuel Vadot }; 940cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_RGA30 { 941cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_RGA30>; 942cb7aa33aSEmmanuel Vadot clocks = <&cru ACLK_RGA3_0>, 943cb7aa33aSEmmanuel Vadot <&cru HCLK_RGA3_0>; 944cb7aa33aSEmmanuel Vadot pm_qos = <&qos_rga3_0>; 945cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 946cb7aa33aSEmmanuel Vadot }; 947cb7aa33aSEmmanuel Vadot }; 948cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_VOP { 949cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_VOP>; 950cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_VOP_ROOT>, 951cb7aa33aSEmmanuel Vadot <&cru HCLK_VOP_ROOT>, 952cb7aa33aSEmmanuel Vadot <&cru ACLK_VOP>; 953cb7aa33aSEmmanuel Vadot pm_qos = <&qos_vop_m0>, 954cb7aa33aSEmmanuel Vadot <&qos_vop_m1>; 955cb7aa33aSEmmanuel Vadot #address-cells = <1>; 956cb7aa33aSEmmanuel Vadot #size-cells = <0>; 957cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 958cb7aa33aSEmmanuel Vadot 959cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_VO0 { 960cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_VO0>; 961cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_VO0_ROOT>, 962cb7aa33aSEmmanuel Vadot <&cru PCLK_VO0_S_ROOT>, 963cb7aa33aSEmmanuel Vadot <&cru HCLK_VO0_S_ROOT>, 964cb7aa33aSEmmanuel Vadot <&cru ACLK_VO0_ROOT>, 965cb7aa33aSEmmanuel Vadot <&cru HCLK_HDCP0>, 966cb7aa33aSEmmanuel Vadot <&cru ACLK_HDCP0>, 967cb7aa33aSEmmanuel Vadot <&cru HCLK_VOP_ROOT>; 968cb7aa33aSEmmanuel Vadot pm_qos = <&qos_hdcp0>; 969cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 970cb7aa33aSEmmanuel Vadot }; 971cb7aa33aSEmmanuel Vadot }; 972cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_VO1 { 973cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_VO1>; 974cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_VO1_ROOT>, 975cb7aa33aSEmmanuel Vadot <&cru PCLK_VO1_S_ROOT>, 976cb7aa33aSEmmanuel Vadot <&cru HCLK_VO1_S_ROOT>, 977cb7aa33aSEmmanuel Vadot <&cru HCLK_HDCP1>, 978cb7aa33aSEmmanuel Vadot <&cru ACLK_HDCP1>, 979cb7aa33aSEmmanuel Vadot <&cru ACLK_HDMIRX_ROOT>, 980cb7aa33aSEmmanuel Vadot <&cru HCLK_VO1USB_TOP_ROOT>; 981cb7aa33aSEmmanuel Vadot pm_qos = <&qos_hdcp1>, 982cb7aa33aSEmmanuel Vadot <&qos_hdmirx>; 983cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 984cb7aa33aSEmmanuel Vadot }; 985cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_VI { 986cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_VI>; 987cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_VI_ROOT>, 988cb7aa33aSEmmanuel Vadot <&cru PCLK_VI_ROOT>, 989cb7aa33aSEmmanuel Vadot <&cru HCLK_ISP0>, 990cb7aa33aSEmmanuel Vadot <&cru ACLK_ISP0>, 991cb7aa33aSEmmanuel Vadot <&cru HCLK_VICAP>, 992cb7aa33aSEmmanuel Vadot <&cru ACLK_VICAP>; 993cb7aa33aSEmmanuel Vadot pm_qos = <&qos_isp0_mro>, 994cb7aa33aSEmmanuel Vadot <&qos_isp0_mwo>, 995cb7aa33aSEmmanuel Vadot <&qos_vicap_m0>, 996cb7aa33aSEmmanuel Vadot <&qos_vicap_m1>; 997cb7aa33aSEmmanuel Vadot #address-cells = <1>; 998cb7aa33aSEmmanuel Vadot #size-cells = <0>; 999cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1000cb7aa33aSEmmanuel Vadot 1001cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_ISP1 { 1002cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_ISP1>; 1003cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_ISP1>, 1004cb7aa33aSEmmanuel Vadot <&cru ACLK_ISP1>, 1005cb7aa33aSEmmanuel Vadot <&cru HCLK_VI_ROOT>, 1006cb7aa33aSEmmanuel Vadot <&cru PCLK_VI_ROOT>; 1007cb7aa33aSEmmanuel Vadot pm_qos = <&qos_isp1_mwo>, 1008cb7aa33aSEmmanuel Vadot <&qos_isp1_mro>; 1009cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1010cb7aa33aSEmmanuel Vadot }; 1011cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_FEC { 1012cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_FEC>; 1013cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_FISHEYE0>, 1014cb7aa33aSEmmanuel Vadot <&cru ACLK_FISHEYE0>, 1015cb7aa33aSEmmanuel Vadot <&cru HCLK_FISHEYE1>, 1016cb7aa33aSEmmanuel Vadot <&cru ACLK_FISHEYE1>, 1017cb7aa33aSEmmanuel Vadot <&cru PCLK_VI_ROOT>; 1018cb7aa33aSEmmanuel Vadot pm_qos = <&qos_fisheye0>, 1019cb7aa33aSEmmanuel Vadot <&qos_fisheye1>; 1020cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1021cb7aa33aSEmmanuel Vadot }; 1022cb7aa33aSEmmanuel Vadot }; 1023cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_RGA31 { 1024cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_RGA31>; 1025cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_RGA3_1>, 1026cb7aa33aSEmmanuel Vadot <&cru ACLK_RGA3_1>; 1027cb7aa33aSEmmanuel Vadot pm_qos = <&qos_rga3_1>; 1028cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1029cb7aa33aSEmmanuel Vadot }; 1030cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_USB { 1031cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_USB>; 1032cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_PHP_ROOT>, 1033cb7aa33aSEmmanuel Vadot <&cru ACLK_USB_ROOT>, 1034*8d13bc63SEmmanuel Vadot <&cru ACLK_USB>, 1035cb7aa33aSEmmanuel Vadot <&cru HCLK_USB_ROOT>, 1036cb7aa33aSEmmanuel Vadot <&cru HCLK_HOST0>, 1037cb7aa33aSEmmanuel Vadot <&cru HCLK_HOST_ARB0>, 1038cb7aa33aSEmmanuel Vadot <&cru HCLK_HOST1>, 1039cb7aa33aSEmmanuel Vadot <&cru HCLK_HOST_ARB1>; 1040cb7aa33aSEmmanuel Vadot pm_qos = <&qos_usb3_0>, 1041cb7aa33aSEmmanuel Vadot <&qos_usb3_1>, 1042cb7aa33aSEmmanuel Vadot <&qos_usb2host_0>, 1043cb7aa33aSEmmanuel Vadot <&qos_usb2host_1>; 1044cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1045cb7aa33aSEmmanuel Vadot }; 1046cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_GMAC { 1047cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_GMAC>; 1048cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_PHP_ROOT>, 1049cb7aa33aSEmmanuel Vadot <&cru ACLK_PCIE_ROOT>, 1050cb7aa33aSEmmanuel Vadot <&cru ACLK_PHP_ROOT>; 1051cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1052cb7aa33aSEmmanuel Vadot }; 1053cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_PCIE { 1054cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_PCIE>; 1055cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_PHP_ROOT>, 1056cb7aa33aSEmmanuel Vadot <&cru ACLK_PCIE_ROOT>, 1057cb7aa33aSEmmanuel Vadot <&cru ACLK_PHP_ROOT>; 1058cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1059cb7aa33aSEmmanuel Vadot }; 1060cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_SDIO { 1061cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_SDIO>; 1062cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_SDIO>, 1063cb7aa33aSEmmanuel Vadot <&cru HCLK_NVM_ROOT>; 1064cb7aa33aSEmmanuel Vadot pm_qos = <&qos_sdio>; 1065cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1066cb7aa33aSEmmanuel Vadot }; 1067cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_AUDIO { 1068cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_AUDIO>; 1069cb7aa33aSEmmanuel Vadot clocks = <&cru HCLK_AUDIO_ROOT>, 1070cb7aa33aSEmmanuel Vadot <&cru PCLK_AUDIO_ROOT>; 1071cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1072cb7aa33aSEmmanuel Vadot }; 1073cb7aa33aSEmmanuel Vadot power-domain@RK3588_PD_SDMMC { 1074cb7aa33aSEmmanuel Vadot reg = <RK3588_PD_SDMMC>; 1075cb7aa33aSEmmanuel Vadot pm_qos = <&qos_sdmmc>; 1076cb7aa33aSEmmanuel Vadot #power-domain-cells = <0>; 1077cb7aa33aSEmmanuel Vadot }; 1078cb7aa33aSEmmanuel Vadot }; 1079cb7aa33aSEmmanuel Vadot }; 1080cb7aa33aSEmmanuel Vadot 1081fac71e4eSEmmanuel Vadot i2s4_8ch: i2s@fddc0000 { 1082fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-i2s-tdm"; 1083fac71e4eSEmmanuel Vadot reg = <0x0 0xfddc0000 0x0 0x1000>; 1084fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH 0>; 1085fac71e4eSEmmanuel Vadot clocks = <&cru MCLK_I2S4_8CH_TX>, <&cru MCLK_I2S4_8CH_TX>, <&cru HCLK_I2S4_8CH>; 1086fac71e4eSEmmanuel Vadot clock-names = "mclk_tx", "mclk_rx", "hclk"; 1087fac71e4eSEmmanuel Vadot assigned-clocks = <&cru CLK_I2S4_8CH_TX_SRC>; 1088fac71e4eSEmmanuel Vadot assigned-clock-parents = <&cru PLL_AUPLL>; 1089fac71e4eSEmmanuel Vadot dmas = <&dmac2 0>; 1090fac71e4eSEmmanuel Vadot dma-names = "tx"; 1091fac71e4eSEmmanuel Vadot power-domains = <&power RK3588_PD_VO0>; 1092fac71e4eSEmmanuel Vadot resets = <&cru SRST_M_I2S4_8CH_TX>; 1093fac71e4eSEmmanuel Vadot reset-names = "tx-m"; 1094fac71e4eSEmmanuel Vadot #sound-dai-cells = <0>; 1095fac71e4eSEmmanuel Vadot status = "disabled"; 1096fac71e4eSEmmanuel Vadot }; 1097fac71e4eSEmmanuel Vadot 1098fac71e4eSEmmanuel Vadot i2s5_8ch: i2s@fddf0000 { 1099fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-i2s-tdm"; 1100fac71e4eSEmmanuel Vadot reg = <0x0 0xfddf0000 0x0 0x1000>; 1101fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH 0>; 1102fac71e4eSEmmanuel Vadot clocks = <&cru MCLK_I2S5_8CH_TX>, <&cru MCLK_I2S5_8CH_TX>, <&cru HCLK_I2S5_8CH>; 1103fac71e4eSEmmanuel Vadot clock-names = "mclk_tx", "mclk_rx", "hclk"; 1104fac71e4eSEmmanuel Vadot assigned-clocks = <&cru CLK_I2S5_8CH_TX_SRC>; 1105fac71e4eSEmmanuel Vadot assigned-clock-parents = <&cru PLL_AUPLL>; 1106fac71e4eSEmmanuel Vadot dmas = <&dmac2 2>; 1107fac71e4eSEmmanuel Vadot dma-names = "tx"; 1108fac71e4eSEmmanuel Vadot power-domains = <&power RK3588_PD_VO1>; 1109fac71e4eSEmmanuel Vadot resets = <&cru SRST_M_I2S5_8CH_TX>; 1110fac71e4eSEmmanuel Vadot reset-names = "tx-m"; 1111fac71e4eSEmmanuel Vadot #sound-dai-cells = <0>; 1112fac71e4eSEmmanuel Vadot status = "disabled"; 1113fac71e4eSEmmanuel Vadot }; 1114fac71e4eSEmmanuel Vadot 1115fac71e4eSEmmanuel Vadot i2s9_8ch: i2s@fddfc000 { 1116fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-i2s-tdm"; 1117fac71e4eSEmmanuel Vadot reg = <0x0 0xfddfc000 0x0 0x1000>; 1118fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH 0>; 1119fac71e4eSEmmanuel Vadot clocks = <&cru MCLK_I2S9_8CH_RX>, <&cru MCLK_I2S9_8CH_RX>, <&cru HCLK_I2S9_8CH>; 1120fac71e4eSEmmanuel Vadot clock-names = "mclk_tx", "mclk_rx", "hclk"; 1121fac71e4eSEmmanuel Vadot assigned-clocks = <&cru CLK_I2S9_8CH_RX_SRC>; 1122fac71e4eSEmmanuel Vadot assigned-clock-parents = <&cru PLL_AUPLL>; 1123fac71e4eSEmmanuel Vadot dmas = <&dmac2 23>; 1124fac71e4eSEmmanuel Vadot dma-names = "rx"; 1125fac71e4eSEmmanuel Vadot power-domains = <&power RK3588_PD_VO1>; 1126fac71e4eSEmmanuel Vadot resets = <&cru SRST_M_I2S9_8CH_RX>; 1127fac71e4eSEmmanuel Vadot reset-names = "rx-m"; 1128fac71e4eSEmmanuel Vadot #sound-dai-cells = <0>; 1129fac71e4eSEmmanuel Vadot status = "disabled"; 1130fac71e4eSEmmanuel Vadot }; 1131fac71e4eSEmmanuel Vadot 1132cb7aa33aSEmmanuel Vadot qos_gpu_m0: qos@fdf35000 { 1133cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1134cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf35000 0x0 0x20>; 1135cb7aa33aSEmmanuel Vadot }; 1136cb7aa33aSEmmanuel Vadot 1137cb7aa33aSEmmanuel Vadot qos_gpu_m1: qos@fdf35200 { 1138cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1139cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf35200 0x0 0x20>; 1140cb7aa33aSEmmanuel Vadot }; 1141cb7aa33aSEmmanuel Vadot 1142cb7aa33aSEmmanuel Vadot qos_gpu_m2: qos@fdf35400 { 1143cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1144cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf35400 0x0 0x20>; 1145cb7aa33aSEmmanuel Vadot }; 1146cb7aa33aSEmmanuel Vadot 1147cb7aa33aSEmmanuel Vadot qos_gpu_m3: qos@fdf35600 { 1148cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1149cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf35600 0x0 0x20>; 1150cb7aa33aSEmmanuel Vadot }; 1151cb7aa33aSEmmanuel Vadot 1152cb7aa33aSEmmanuel Vadot qos_rga3_1: qos@fdf36000 { 1153cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1154cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf36000 0x0 0x20>; 1155cb7aa33aSEmmanuel Vadot }; 1156cb7aa33aSEmmanuel Vadot 1157cb7aa33aSEmmanuel Vadot qos_sdio: qos@fdf39000 { 1158cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1159cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf39000 0x0 0x20>; 1160cb7aa33aSEmmanuel Vadot }; 1161cb7aa33aSEmmanuel Vadot 1162cb7aa33aSEmmanuel Vadot qos_sdmmc: qos@fdf3d800 { 1163cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1164cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf3d800 0x0 0x20>; 1165cb7aa33aSEmmanuel Vadot }; 1166cb7aa33aSEmmanuel Vadot 1167cb7aa33aSEmmanuel Vadot qos_usb3_1: qos@fdf3e000 { 1168cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1169cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf3e000 0x0 0x20>; 1170cb7aa33aSEmmanuel Vadot }; 1171cb7aa33aSEmmanuel Vadot 1172cb7aa33aSEmmanuel Vadot qos_usb3_0: qos@fdf3e200 { 1173cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1174cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf3e200 0x0 0x20>; 1175cb7aa33aSEmmanuel Vadot }; 1176cb7aa33aSEmmanuel Vadot 1177cb7aa33aSEmmanuel Vadot qos_usb2host_0: qos@fdf3e400 { 1178cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1179cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf3e400 0x0 0x20>; 1180cb7aa33aSEmmanuel Vadot }; 1181cb7aa33aSEmmanuel Vadot 1182cb7aa33aSEmmanuel Vadot qos_usb2host_1: qos@fdf3e600 { 1183cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1184cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf3e600 0x0 0x20>; 1185cb7aa33aSEmmanuel Vadot }; 1186cb7aa33aSEmmanuel Vadot 1187cb7aa33aSEmmanuel Vadot qos_fisheye0: qos@fdf40000 { 1188cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1189cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf40000 0x0 0x20>; 1190cb7aa33aSEmmanuel Vadot }; 1191cb7aa33aSEmmanuel Vadot 1192cb7aa33aSEmmanuel Vadot qos_fisheye1: qos@fdf40200 { 1193cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1194cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf40200 0x0 0x20>; 1195cb7aa33aSEmmanuel Vadot }; 1196cb7aa33aSEmmanuel Vadot 1197cb7aa33aSEmmanuel Vadot qos_isp0_mro: qos@fdf40400 { 1198cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1199cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf40400 0x0 0x20>; 1200cb7aa33aSEmmanuel Vadot }; 1201cb7aa33aSEmmanuel Vadot 1202cb7aa33aSEmmanuel Vadot qos_isp0_mwo: qos@fdf40500 { 1203cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1204cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf40500 0x0 0x20>; 1205cb7aa33aSEmmanuel Vadot }; 1206cb7aa33aSEmmanuel Vadot 1207cb7aa33aSEmmanuel Vadot qos_vicap_m0: qos@fdf40600 { 1208cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1209cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf40600 0x0 0x20>; 1210cb7aa33aSEmmanuel Vadot }; 1211cb7aa33aSEmmanuel Vadot 1212cb7aa33aSEmmanuel Vadot qos_vicap_m1: qos@fdf40800 { 1213cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1214cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf40800 0x0 0x20>; 1215cb7aa33aSEmmanuel Vadot }; 1216cb7aa33aSEmmanuel Vadot 1217cb7aa33aSEmmanuel Vadot qos_isp1_mwo: qos@fdf41000 { 1218cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1219cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf41000 0x0 0x20>; 1220cb7aa33aSEmmanuel Vadot }; 1221cb7aa33aSEmmanuel Vadot 1222cb7aa33aSEmmanuel Vadot qos_isp1_mro: qos@fdf41100 { 1223cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1224cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf41100 0x0 0x20>; 1225cb7aa33aSEmmanuel Vadot }; 1226cb7aa33aSEmmanuel Vadot 1227cb7aa33aSEmmanuel Vadot qos_rkvenc0_m0ro: qos@fdf60000 { 1228cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1229cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf60000 0x0 0x20>; 1230cb7aa33aSEmmanuel Vadot }; 1231cb7aa33aSEmmanuel Vadot 1232cb7aa33aSEmmanuel Vadot qos_rkvenc0_m1ro: qos@fdf60200 { 1233cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1234cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf60200 0x0 0x20>; 1235cb7aa33aSEmmanuel Vadot }; 1236cb7aa33aSEmmanuel Vadot 1237cb7aa33aSEmmanuel Vadot qos_rkvenc0_m2wo: qos@fdf60400 { 1238cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1239cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf60400 0x0 0x20>; 1240cb7aa33aSEmmanuel Vadot }; 1241cb7aa33aSEmmanuel Vadot 1242cb7aa33aSEmmanuel Vadot qos_rkvenc1_m0ro: qos@fdf61000 { 1243cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1244cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf61000 0x0 0x20>; 1245cb7aa33aSEmmanuel Vadot }; 1246cb7aa33aSEmmanuel Vadot 1247cb7aa33aSEmmanuel Vadot qos_rkvenc1_m1ro: qos@fdf61200 { 1248cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1249cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf61200 0x0 0x20>; 1250cb7aa33aSEmmanuel Vadot }; 1251cb7aa33aSEmmanuel Vadot 1252cb7aa33aSEmmanuel Vadot qos_rkvenc1_m2wo: qos@fdf61400 { 1253cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1254cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf61400 0x0 0x20>; 1255cb7aa33aSEmmanuel Vadot }; 1256cb7aa33aSEmmanuel Vadot 1257cb7aa33aSEmmanuel Vadot qos_rkvdec0: qos@fdf62000 { 1258cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1259cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf62000 0x0 0x20>; 1260cb7aa33aSEmmanuel Vadot }; 1261cb7aa33aSEmmanuel Vadot 1262cb7aa33aSEmmanuel Vadot qos_rkvdec1: qos@fdf63000 { 1263cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1264cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf63000 0x0 0x20>; 1265cb7aa33aSEmmanuel Vadot }; 1266cb7aa33aSEmmanuel Vadot 1267cb7aa33aSEmmanuel Vadot qos_av1: qos@fdf64000 { 1268cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1269cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf64000 0x0 0x20>; 1270cb7aa33aSEmmanuel Vadot }; 1271cb7aa33aSEmmanuel Vadot 1272cb7aa33aSEmmanuel Vadot qos_iep: qos@fdf66000 { 1273cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1274cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf66000 0x0 0x20>; 1275cb7aa33aSEmmanuel Vadot }; 1276cb7aa33aSEmmanuel Vadot 1277cb7aa33aSEmmanuel Vadot qos_jpeg_dec: qos@fdf66200 { 1278cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1279cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf66200 0x0 0x20>; 1280cb7aa33aSEmmanuel Vadot }; 1281cb7aa33aSEmmanuel Vadot 1282cb7aa33aSEmmanuel Vadot qos_jpeg_enc0: qos@fdf66400 { 1283cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1284cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf66400 0x0 0x20>; 1285cb7aa33aSEmmanuel Vadot }; 1286cb7aa33aSEmmanuel Vadot 1287cb7aa33aSEmmanuel Vadot qos_jpeg_enc1: qos@fdf66600 { 1288cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1289cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf66600 0x0 0x20>; 1290cb7aa33aSEmmanuel Vadot }; 1291cb7aa33aSEmmanuel Vadot 1292cb7aa33aSEmmanuel Vadot qos_jpeg_enc2: qos@fdf66800 { 1293cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1294cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf66800 0x0 0x20>; 1295cb7aa33aSEmmanuel Vadot }; 1296cb7aa33aSEmmanuel Vadot 1297cb7aa33aSEmmanuel Vadot qos_jpeg_enc3: qos@fdf66a00 { 1298cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1299cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf66a00 0x0 0x20>; 1300cb7aa33aSEmmanuel Vadot }; 1301cb7aa33aSEmmanuel Vadot 1302cb7aa33aSEmmanuel Vadot qos_rga2_mro: qos@fdf66c00 { 1303cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1304cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf66c00 0x0 0x20>; 1305cb7aa33aSEmmanuel Vadot }; 1306cb7aa33aSEmmanuel Vadot 1307cb7aa33aSEmmanuel Vadot qos_rga2_mwo: qos@fdf66e00 { 1308cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1309cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf66e00 0x0 0x20>; 1310cb7aa33aSEmmanuel Vadot }; 1311cb7aa33aSEmmanuel Vadot 1312cb7aa33aSEmmanuel Vadot qos_rga3_0: qos@fdf67000 { 1313cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1314cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf67000 0x0 0x20>; 1315cb7aa33aSEmmanuel Vadot }; 1316cb7aa33aSEmmanuel Vadot 1317cb7aa33aSEmmanuel Vadot qos_vdpu: qos@fdf67200 { 1318cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1319cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf67200 0x0 0x20>; 1320cb7aa33aSEmmanuel Vadot }; 1321cb7aa33aSEmmanuel Vadot 1322cb7aa33aSEmmanuel Vadot qos_npu1: qos@fdf70000 { 1323cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1324cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf70000 0x0 0x20>; 1325cb7aa33aSEmmanuel Vadot }; 1326cb7aa33aSEmmanuel Vadot 1327cb7aa33aSEmmanuel Vadot qos_npu2: qos@fdf71000 { 1328cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1329cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf71000 0x0 0x20>; 1330cb7aa33aSEmmanuel Vadot }; 1331cb7aa33aSEmmanuel Vadot 1332cb7aa33aSEmmanuel Vadot qos_npu0_mwr: qos@fdf72000 { 1333cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1334cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf72000 0x0 0x20>; 1335cb7aa33aSEmmanuel Vadot }; 1336cb7aa33aSEmmanuel Vadot 1337cb7aa33aSEmmanuel Vadot qos_npu0_mro: qos@fdf72200 { 1338cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1339cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf72200 0x0 0x20>; 1340cb7aa33aSEmmanuel Vadot }; 1341cb7aa33aSEmmanuel Vadot 1342cb7aa33aSEmmanuel Vadot qos_mcu_npu: qos@fdf72400 { 1343cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1344cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf72400 0x0 0x20>; 1345cb7aa33aSEmmanuel Vadot }; 1346cb7aa33aSEmmanuel Vadot 1347cb7aa33aSEmmanuel Vadot qos_hdcp0: qos@fdf80000 { 1348cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1349cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf80000 0x0 0x20>; 1350cb7aa33aSEmmanuel Vadot }; 1351cb7aa33aSEmmanuel Vadot 1352cb7aa33aSEmmanuel Vadot qos_hdcp1: qos@fdf81000 { 1353cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1354cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf81000 0x0 0x20>; 1355cb7aa33aSEmmanuel Vadot }; 1356cb7aa33aSEmmanuel Vadot 1357cb7aa33aSEmmanuel Vadot qos_hdmirx: qos@fdf81200 { 1358cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1359cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf81200 0x0 0x20>; 1360cb7aa33aSEmmanuel Vadot }; 1361cb7aa33aSEmmanuel Vadot 1362cb7aa33aSEmmanuel Vadot qos_vop_m0: qos@fdf82000 { 1363cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1364cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf82000 0x0 0x20>; 1365cb7aa33aSEmmanuel Vadot }; 1366cb7aa33aSEmmanuel Vadot 1367cb7aa33aSEmmanuel Vadot qos_vop_m1: qos@fdf82200 { 1368cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-qos", "syscon"; 1369cb7aa33aSEmmanuel Vadot reg = <0x0 0xfdf82200 0x0 0x20>; 1370cb7aa33aSEmmanuel Vadot }; 1371cb7aa33aSEmmanuel Vadot 1372aa1a8ff2SEmmanuel Vadot pcie2x1l1: pcie@fe180000 { 1373aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; 1374aa1a8ff2SEmmanuel Vadot bus-range = <0x30 0x3f>; 1375aa1a8ff2SEmmanuel Vadot clocks = <&cru ACLK_PCIE_1L1_MSTR>, <&cru ACLK_PCIE_1L1_SLV>, 1376aa1a8ff2SEmmanuel Vadot <&cru ACLK_PCIE_1L1_DBI>, <&cru PCLK_PCIE_1L1>, 1377aa1a8ff2SEmmanuel Vadot <&cru CLK_PCIE_AUX3>, <&cru CLK_PCIE1L1_PIPE>; 1378aa1a8ff2SEmmanuel Vadot clock-names = "aclk_mst", "aclk_slv", 1379aa1a8ff2SEmmanuel Vadot "aclk_dbi", "pclk", 1380aa1a8ff2SEmmanuel Vadot "aux", "pipe"; 1381aa1a8ff2SEmmanuel Vadot device_type = "pci"; 1382aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH 0>, 1383aa1a8ff2SEmmanuel Vadot <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH 0>, 1384aa1a8ff2SEmmanuel Vadot <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH 0>, 1385aa1a8ff2SEmmanuel Vadot <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>, 1386aa1a8ff2SEmmanuel Vadot <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH 0>; 1387aa1a8ff2SEmmanuel Vadot interrupt-names = "sys", "pmc", "msg", "legacy", "err"; 1388aa1a8ff2SEmmanuel Vadot #interrupt-cells = <1>; 1389aa1a8ff2SEmmanuel Vadot interrupt-map-mask = <0 0 0 7>; 1390aa1a8ff2SEmmanuel Vadot interrupt-map = <0 0 0 1 &pcie2x1l1_intc 0>, 1391aa1a8ff2SEmmanuel Vadot <0 0 0 2 &pcie2x1l1_intc 1>, 1392aa1a8ff2SEmmanuel Vadot <0 0 0 3 &pcie2x1l1_intc 2>, 1393aa1a8ff2SEmmanuel Vadot <0 0 0 4 &pcie2x1l1_intc 3>; 1394aa1a8ff2SEmmanuel Vadot linux,pci-domain = <3>; 1395aa1a8ff2SEmmanuel Vadot max-link-speed = <2>; 1396aa1a8ff2SEmmanuel Vadot msi-map = <0x3000 &its0 0x3000 0x1000>; 1397aa1a8ff2SEmmanuel Vadot num-lanes = <1>; 1398aa1a8ff2SEmmanuel Vadot phys = <&combphy2_psu PHY_TYPE_PCIE>; 1399aa1a8ff2SEmmanuel Vadot phy-names = "pcie-phy"; 1400aa1a8ff2SEmmanuel Vadot power-domains = <&power RK3588_PD_PCIE>; 1401aa1a8ff2SEmmanuel Vadot ranges = <0x01000000 0x0 0xf3100000 0x0 0xf3100000 0x0 0x00100000>, 1402aa1a8ff2SEmmanuel Vadot <0x02000000 0x0 0xf3200000 0x0 0xf3200000 0x0 0x00e00000>, 1403aa1a8ff2SEmmanuel Vadot <0x03000000 0x0 0x40000000 0x9 0xc0000000 0x0 0x40000000>; 1404aa1a8ff2SEmmanuel Vadot reg = <0xa 0x40c00000 0x0 0x00400000>, 1405aa1a8ff2SEmmanuel Vadot <0x0 0xfe180000 0x0 0x00010000>, 1406aa1a8ff2SEmmanuel Vadot <0x0 0xf3000000 0x0 0x00100000>; 1407aa1a8ff2SEmmanuel Vadot reg-names = "dbi", "apb", "config"; 1408aa1a8ff2SEmmanuel Vadot resets = <&cru SRST_PCIE3_POWER_UP>, <&cru SRST_P_PCIE3>; 1409aa1a8ff2SEmmanuel Vadot reset-names = "pwr", "pipe"; 1410aa1a8ff2SEmmanuel Vadot #address-cells = <3>; 1411aa1a8ff2SEmmanuel Vadot #size-cells = <2>; 1412aa1a8ff2SEmmanuel Vadot status = "disabled"; 1413aa1a8ff2SEmmanuel Vadot 1414aa1a8ff2SEmmanuel Vadot pcie2x1l1_intc: legacy-interrupt-controller { 1415aa1a8ff2SEmmanuel Vadot interrupt-controller; 1416aa1a8ff2SEmmanuel Vadot #address-cells = <0>; 1417aa1a8ff2SEmmanuel Vadot #interrupt-cells = <1>; 1418aa1a8ff2SEmmanuel Vadot interrupt-parent = <&gic>; 1419aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 245 IRQ_TYPE_EDGE_RISING 0>; 1420aa1a8ff2SEmmanuel Vadot }; 1421aa1a8ff2SEmmanuel Vadot }; 1422aa1a8ff2SEmmanuel Vadot 1423aa1a8ff2SEmmanuel Vadot pcie2x1l2: pcie@fe190000 { 1424aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; 1425aa1a8ff2SEmmanuel Vadot bus-range = <0x40 0x4f>; 1426aa1a8ff2SEmmanuel Vadot clocks = <&cru ACLK_PCIE_1L2_MSTR>, <&cru ACLK_PCIE_1L2_SLV>, 1427aa1a8ff2SEmmanuel Vadot <&cru ACLK_PCIE_1L2_DBI>, <&cru PCLK_PCIE_1L2>, 1428aa1a8ff2SEmmanuel Vadot <&cru CLK_PCIE_AUX4>, <&cru CLK_PCIE1L2_PIPE>; 1429aa1a8ff2SEmmanuel Vadot clock-names = "aclk_mst", "aclk_slv", 1430aa1a8ff2SEmmanuel Vadot "aclk_dbi", "pclk", 1431aa1a8ff2SEmmanuel Vadot "aux", "pipe"; 1432aa1a8ff2SEmmanuel Vadot device_type = "pci"; 1433aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH 0>, 1434aa1a8ff2SEmmanuel Vadot <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>, 1435aa1a8ff2SEmmanuel Vadot <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH 0>, 1436aa1a8ff2SEmmanuel Vadot <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH 0>, 1437aa1a8ff2SEmmanuel Vadot <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH 0>; 1438aa1a8ff2SEmmanuel Vadot interrupt-names = "sys", "pmc", "msg", "legacy", "err"; 1439aa1a8ff2SEmmanuel Vadot #interrupt-cells = <1>; 1440aa1a8ff2SEmmanuel Vadot interrupt-map-mask = <0 0 0 7>; 1441aa1a8ff2SEmmanuel Vadot interrupt-map = <0 0 0 1 &pcie2x1l2_intc 0>, 1442aa1a8ff2SEmmanuel Vadot <0 0 0 2 &pcie2x1l2_intc 1>, 1443aa1a8ff2SEmmanuel Vadot <0 0 0 3 &pcie2x1l2_intc 2>, 1444aa1a8ff2SEmmanuel Vadot <0 0 0 4 &pcie2x1l2_intc 3>; 1445aa1a8ff2SEmmanuel Vadot linux,pci-domain = <4>; 1446aa1a8ff2SEmmanuel Vadot max-link-speed = <2>; 1447aa1a8ff2SEmmanuel Vadot msi-map = <0x4000 &its0 0x4000 0x1000>; 1448aa1a8ff2SEmmanuel Vadot num-lanes = <1>; 1449aa1a8ff2SEmmanuel Vadot phys = <&combphy0_ps PHY_TYPE_PCIE>; 1450aa1a8ff2SEmmanuel Vadot phy-names = "pcie-phy"; 1451aa1a8ff2SEmmanuel Vadot power-domains = <&power RK3588_PD_PCIE>; 1452aa1a8ff2SEmmanuel Vadot ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>, 1453aa1a8ff2SEmmanuel Vadot <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x00e00000>, 1454aa1a8ff2SEmmanuel Vadot <0x03000000 0x0 0x40000000 0xa 0x00000000 0x0 0x40000000>; 1455aa1a8ff2SEmmanuel Vadot reg = <0xa 0x41000000 0x0 0x00400000>, 1456aa1a8ff2SEmmanuel Vadot <0x0 0xfe190000 0x0 0x00010000>, 1457aa1a8ff2SEmmanuel Vadot <0x0 0xf4000000 0x0 0x00100000>; 1458aa1a8ff2SEmmanuel Vadot reg-names = "dbi", "apb", "config"; 1459aa1a8ff2SEmmanuel Vadot resets = <&cru SRST_PCIE4_POWER_UP>, <&cru SRST_P_PCIE4>; 1460aa1a8ff2SEmmanuel Vadot reset-names = "pwr", "pipe"; 1461aa1a8ff2SEmmanuel Vadot #address-cells = <3>; 1462aa1a8ff2SEmmanuel Vadot #size-cells = <2>; 1463aa1a8ff2SEmmanuel Vadot status = "disabled"; 1464aa1a8ff2SEmmanuel Vadot 1465aa1a8ff2SEmmanuel Vadot pcie2x1l2_intc: legacy-interrupt-controller { 1466aa1a8ff2SEmmanuel Vadot interrupt-controller; 1467aa1a8ff2SEmmanuel Vadot #address-cells = <0>; 1468aa1a8ff2SEmmanuel Vadot #interrupt-cells = <1>; 1469aa1a8ff2SEmmanuel Vadot interrupt-parent = <&gic>; 1470aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 250 IRQ_TYPE_EDGE_RISING 0>; 1471aa1a8ff2SEmmanuel Vadot }; 1472aa1a8ff2SEmmanuel Vadot }; 1473aa1a8ff2SEmmanuel Vadot 147484943d6fSEmmanuel Vadot dfi: dfi@fe060000 { 147584943d6fSEmmanuel Vadot reg = <0x00 0xfe060000 0x00 0x10000>; 147684943d6fSEmmanuel Vadot compatible = "rockchip,rk3588-dfi"; 147784943d6fSEmmanuel Vadot interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>, 147884943d6fSEmmanuel Vadot <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>, 147984943d6fSEmmanuel Vadot <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH 0>, 148084943d6fSEmmanuel Vadot <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>; 148184943d6fSEmmanuel Vadot rockchip,pmu = <&pmu1grf>; 148284943d6fSEmmanuel Vadot }; 148384943d6fSEmmanuel Vadot 1484cb7aa33aSEmmanuel Vadot gmac1: ethernet@fe1c0000 { 1485cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; 1486cb7aa33aSEmmanuel Vadot reg = <0x0 0xfe1c0000 0x0 0x10000>; 1487cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH 0>, 1488cb7aa33aSEmmanuel Vadot <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH 0>; 1489cb7aa33aSEmmanuel Vadot interrupt-names = "macirq", "eth_wake_irq"; 1490cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_GMAC_125M>, <&cru CLK_GMAC_50M>, 1491cb7aa33aSEmmanuel Vadot <&cru PCLK_GMAC1>, <&cru ACLK_GMAC1>, 1492cb7aa33aSEmmanuel Vadot <&cru CLK_GMAC1_PTP_REF>; 1493cb7aa33aSEmmanuel Vadot clock-names = "stmmaceth", "clk_mac_ref", 1494cb7aa33aSEmmanuel Vadot "pclk_mac", "aclk_mac", 1495cb7aa33aSEmmanuel Vadot "ptp_ref"; 1496cb7aa33aSEmmanuel Vadot power-domains = <&power RK3588_PD_GMAC>; 1497cb7aa33aSEmmanuel Vadot resets = <&cru SRST_A_GMAC1>; 1498cb7aa33aSEmmanuel Vadot reset-names = "stmmaceth"; 1499cb7aa33aSEmmanuel Vadot rockchip,grf = <&sys_grf>; 1500cb7aa33aSEmmanuel Vadot rockchip,php-grf = <&php_grf>; 1501cb7aa33aSEmmanuel Vadot snps,axi-config = <&gmac1_stmmac_axi_setup>; 1502cb7aa33aSEmmanuel Vadot snps,mixed-burst; 1503cb7aa33aSEmmanuel Vadot snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; 1504cb7aa33aSEmmanuel Vadot snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; 1505cb7aa33aSEmmanuel Vadot snps,tso; 1506cb7aa33aSEmmanuel Vadot status = "disabled"; 1507cb7aa33aSEmmanuel Vadot 1508cb7aa33aSEmmanuel Vadot mdio1: mdio { 1509cb7aa33aSEmmanuel Vadot compatible = "snps,dwmac-mdio"; 1510cb7aa33aSEmmanuel Vadot #address-cells = <0x1>; 1511cb7aa33aSEmmanuel Vadot #size-cells = <0x0>; 1512cb7aa33aSEmmanuel Vadot }; 1513cb7aa33aSEmmanuel Vadot 1514cb7aa33aSEmmanuel Vadot gmac1_stmmac_axi_setup: stmmac-axi-config { 1515cb7aa33aSEmmanuel Vadot snps,blen = <0 0 0 0 16 8 4>; 1516cb7aa33aSEmmanuel Vadot snps,wr_osr_lmt = <4>; 1517cb7aa33aSEmmanuel Vadot snps,rd_osr_lmt = <8>; 1518cb7aa33aSEmmanuel Vadot }; 1519cb7aa33aSEmmanuel Vadot 1520cb7aa33aSEmmanuel Vadot gmac1_mtl_rx_setup: rx-queues-config { 1521cb7aa33aSEmmanuel Vadot snps,rx-queues-to-use = <2>; 1522cb7aa33aSEmmanuel Vadot queue0 {}; 1523cb7aa33aSEmmanuel Vadot queue1 {}; 1524cb7aa33aSEmmanuel Vadot }; 1525cb7aa33aSEmmanuel Vadot 1526cb7aa33aSEmmanuel Vadot gmac1_mtl_tx_setup: tx-queues-config { 1527cb7aa33aSEmmanuel Vadot snps,tx-queues-to-use = <2>; 1528cb7aa33aSEmmanuel Vadot queue0 {}; 1529cb7aa33aSEmmanuel Vadot queue1 {}; 1530cb7aa33aSEmmanuel Vadot }; 1531cb7aa33aSEmmanuel Vadot }; 1532cb7aa33aSEmmanuel Vadot 1533aa1a8ff2SEmmanuel Vadot sata0: sata@fe210000 { 1534aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci"; 1535aa1a8ff2SEmmanuel Vadot reg = <0 0xfe210000 0 0x1000>; 1536aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH 0>; 1537aa1a8ff2SEmmanuel Vadot clocks = <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>, 1538aa1a8ff2SEmmanuel Vadot <&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>, 1539aa1a8ff2SEmmanuel Vadot <&cru CLK_PIPEPHY0_PIPE_ASIC_G>; 1540aa1a8ff2SEmmanuel Vadot clock-names = "sata", "pmalive", "rxoob", "ref", "asic"; 1541aa1a8ff2SEmmanuel Vadot ports-implemented = <0x1>; 1542aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 1543aa1a8ff2SEmmanuel Vadot #size-cells = <0>; 1544aa1a8ff2SEmmanuel Vadot status = "disabled"; 1545aa1a8ff2SEmmanuel Vadot 1546aa1a8ff2SEmmanuel Vadot sata-port@0 { 1547aa1a8ff2SEmmanuel Vadot reg = <0>; 1548aa1a8ff2SEmmanuel Vadot hba-port-cap = <HBA_PORT_FBSCP>; 1549aa1a8ff2SEmmanuel Vadot phys = <&combphy0_ps PHY_TYPE_SATA>; 1550aa1a8ff2SEmmanuel Vadot phy-names = "sata-phy"; 1551aa1a8ff2SEmmanuel Vadot snps,rx-ts-max = <32>; 1552aa1a8ff2SEmmanuel Vadot snps,tx-ts-max = <32>; 1553aa1a8ff2SEmmanuel Vadot }; 1554aa1a8ff2SEmmanuel Vadot }; 1555aa1a8ff2SEmmanuel Vadot 1556aa1a8ff2SEmmanuel Vadot sata2: sata@fe230000 { 1557aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci"; 1558aa1a8ff2SEmmanuel Vadot reg = <0 0xfe230000 0 0x1000>; 1559aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH 0>; 1560aa1a8ff2SEmmanuel Vadot clocks = <&cru ACLK_SATA2>, <&cru CLK_PMALIVE2>, 1561aa1a8ff2SEmmanuel Vadot <&cru CLK_RXOOB2>, <&cru CLK_PIPEPHY2_REF>, 1562aa1a8ff2SEmmanuel Vadot <&cru CLK_PIPEPHY2_PIPE_ASIC_G>; 1563aa1a8ff2SEmmanuel Vadot clock-names = "sata", "pmalive", "rxoob", "ref", "asic"; 1564aa1a8ff2SEmmanuel Vadot ports-implemented = <0x1>; 1565aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 1566aa1a8ff2SEmmanuel Vadot #size-cells = <0>; 1567aa1a8ff2SEmmanuel Vadot status = "disabled"; 1568aa1a8ff2SEmmanuel Vadot 1569aa1a8ff2SEmmanuel Vadot sata-port@0 { 1570aa1a8ff2SEmmanuel Vadot reg = <0>; 1571aa1a8ff2SEmmanuel Vadot hba-port-cap = <HBA_PORT_FBSCP>; 1572aa1a8ff2SEmmanuel Vadot phys = <&combphy2_psu PHY_TYPE_SATA>; 1573aa1a8ff2SEmmanuel Vadot phy-names = "sata-phy"; 1574aa1a8ff2SEmmanuel Vadot snps,rx-ts-max = <32>; 1575aa1a8ff2SEmmanuel Vadot snps,tx-ts-max = <32>; 1576aa1a8ff2SEmmanuel Vadot }; 1577aa1a8ff2SEmmanuel Vadot }; 1578aa1a8ff2SEmmanuel Vadot 157984943d6fSEmmanuel Vadot sfc: spi@fe2b0000 { 158084943d6fSEmmanuel Vadot compatible = "rockchip,sfc"; 158184943d6fSEmmanuel Vadot reg = <0x0 0xfe2b0000 0x0 0x4000>; 158284943d6fSEmmanuel Vadot interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 0>; 158384943d6fSEmmanuel Vadot clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; 158484943d6fSEmmanuel Vadot clock-names = "clk_sfc", "hclk_sfc"; 158584943d6fSEmmanuel Vadot #address-cells = <1>; 158684943d6fSEmmanuel Vadot #size-cells = <0>; 158784943d6fSEmmanuel Vadot status = "disabled"; 158884943d6fSEmmanuel Vadot }; 158984943d6fSEmmanuel Vadot 1590fac71e4eSEmmanuel Vadot sdmmc: mmc@fe2c0000 { 1591fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; 1592fac71e4eSEmmanuel Vadot reg = <0x0 0xfe2c0000 0x0 0x4000>; 1593fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>; 1594fac71e4eSEmmanuel Vadot clocks = <&scmi_clk SCMI_HCLK_SD>, <&scmi_clk SCMI_CCLK_SD>, 1595fac71e4eSEmmanuel Vadot <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; 1596fac71e4eSEmmanuel Vadot clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; 1597fac71e4eSEmmanuel Vadot fifo-depth = <0x100>; 1598fac71e4eSEmmanuel Vadot max-frequency = <200000000>; 1599fac71e4eSEmmanuel Vadot pinctrl-names = "default"; 1600fac71e4eSEmmanuel Vadot pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; 1601fac71e4eSEmmanuel Vadot power-domains = <&power RK3588_PD_SDMMC>; 1602fac71e4eSEmmanuel Vadot status = "disabled"; 1603fac71e4eSEmmanuel Vadot }; 1604fac71e4eSEmmanuel Vadot 1605f126890aSEmmanuel Vadot sdio: mmc@fe2d0000 { 1606f126890aSEmmanuel Vadot compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; 1607f126890aSEmmanuel Vadot reg = <0x00 0xfe2d0000 0x00 0x4000>; 1608f126890aSEmmanuel Vadot interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 0>; 1609f126890aSEmmanuel Vadot clocks = <&cru HCLK_SDIO>, <&cru CCLK_SRC_SDIO>, 1610f126890aSEmmanuel Vadot <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; 1611f126890aSEmmanuel Vadot clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; 1612f126890aSEmmanuel Vadot fifo-depth = <0x100>; 1613f126890aSEmmanuel Vadot max-frequency = <200000000>; 1614f126890aSEmmanuel Vadot pinctrl-names = "default"; 1615f126890aSEmmanuel Vadot pinctrl-0 = <&sdiom1_pins>; 1616f126890aSEmmanuel Vadot power-domains = <&power RK3588_PD_SDIO>; 1617f126890aSEmmanuel Vadot status = "disabled"; 1618f126890aSEmmanuel Vadot }; 1619f126890aSEmmanuel Vadot 1620cb7aa33aSEmmanuel Vadot sdhci: mmc@fe2e0000 { 1621cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-dwcmshc"; 1622cb7aa33aSEmmanuel Vadot reg = <0x0 0xfe2e0000 0x0 0x10000>; 1623cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 0>; 1624cb7aa33aSEmmanuel Vadot assigned-clocks = <&cru BCLK_EMMC>, <&cru TMCLK_EMMC>, <&cru CCLK_EMMC>; 1625cb7aa33aSEmmanuel Vadot assigned-clock-rates = <200000000>, <24000000>, <200000000>; 1626cb7aa33aSEmmanuel Vadot clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>, 1627cb7aa33aSEmmanuel Vadot <&cru ACLK_EMMC>, <&cru BCLK_EMMC>, 1628cb7aa33aSEmmanuel Vadot <&cru TMCLK_EMMC>; 1629cb7aa33aSEmmanuel Vadot clock-names = "core", "bus", "axi", "block", "timer"; 1630cb7aa33aSEmmanuel Vadot max-frequency = <200000000>; 1631f126890aSEmmanuel Vadot pinctrl-0 = <&emmc_rstnout>, <&emmc_bus8>, <&emmc_clk>, 1632f126890aSEmmanuel Vadot <&emmc_cmd>, <&emmc_data_strobe>; 1633f126890aSEmmanuel Vadot pinctrl-names = "default"; 1634cb7aa33aSEmmanuel Vadot resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>, 1635cb7aa33aSEmmanuel Vadot <&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>, 1636cb7aa33aSEmmanuel Vadot <&cru SRST_T_EMMC>; 1637cb7aa33aSEmmanuel Vadot reset-names = "core", "bus", "axi", "block", "timer"; 1638cb7aa33aSEmmanuel Vadot status = "disabled"; 1639cb7aa33aSEmmanuel Vadot }; 1640cb7aa33aSEmmanuel Vadot 1641fac71e4eSEmmanuel Vadot i2s0_8ch: i2s@fe470000 { 1642fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-i2s-tdm"; 1643fac71e4eSEmmanuel Vadot reg = <0x0 0xfe470000 0x0 0x1000>; 1644fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0>; 1645fac71e4eSEmmanuel Vadot clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>; 1646fac71e4eSEmmanuel Vadot clock-names = "mclk_tx", "mclk_rx", "hclk"; 1647fac71e4eSEmmanuel Vadot assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>; 1648fac71e4eSEmmanuel Vadot assigned-clock-parents = <&cru PLL_AUPLL>, <&cru PLL_AUPLL>; 1649fac71e4eSEmmanuel Vadot dmas = <&dmac0 0>, <&dmac0 1>; 1650fac71e4eSEmmanuel Vadot dma-names = "tx", "rx"; 1651fac71e4eSEmmanuel Vadot power-domains = <&power RK3588_PD_AUDIO>; 1652fac71e4eSEmmanuel Vadot resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>; 1653fac71e4eSEmmanuel Vadot reset-names = "tx-m", "rx-m"; 1654fac71e4eSEmmanuel Vadot rockchip,trcm-sync-tx-only; 1655fac71e4eSEmmanuel Vadot pinctrl-names = "default"; 1656fac71e4eSEmmanuel Vadot pinctrl-0 = <&i2s0_lrck 1657fac71e4eSEmmanuel Vadot &i2s0_sclk 1658fac71e4eSEmmanuel Vadot &i2s0_sdi0 1659fac71e4eSEmmanuel Vadot &i2s0_sdi1 1660fac71e4eSEmmanuel Vadot &i2s0_sdi2 1661fac71e4eSEmmanuel Vadot &i2s0_sdi3 1662fac71e4eSEmmanuel Vadot &i2s0_sdo0 1663fac71e4eSEmmanuel Vadot &i2s0_sdo1 1664fac71e4eSEmmanuel Vadot &i2s0_sdo2 1665fac71e4eSEmmanuel Vadot &i2s0_sdo3>; 1666fac71e4eSEmmanuel Vadot #sound-dai-cells = <0>; 1667fac71e4eSEmmanuel Vadot status = "disabled"; 1668fac71e4eSEmmanuel Vadot }; 1669fac71e4eSEmmanuel Vadot 1670fac71e4eSEmmanuel Vadot i2s1_8ch: i2s@fe480000 { 1671fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-i2s-tdm"; 1672fac71e4eSEmmanuel Vadot reg = <0x0 0xfe480000 0x0 0x1000>; 1673fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0>; 1674fac71e4eSEmmanuel Vadot clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>; 1675fac71e4eSEmmanuel Vadot clock-names = "mclk_tx", "mclk_rx", "hclk"; 1676fac71e4eSEmmanuel Vadot dmas = <&dmac0 2>, <&dmac0 3>; 1677fac71e4eSEmmanuel Vadot dma-names = "tx", "rx"; 1678fac71e4eSEmmanuel Vadot resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>; 1679fac71e4eSEmmanuel Vadot reset-names = "tx-m", "rx-m"; 1680fac71e4eSEmmanuel Vadot rockchip,trcm-sync-tx-only; 1681fac71e4eSEmmanuel Vadot pinctrl-names = "default"; 1682fac71e4eSEmmanuel Vadot pinctrl-0 = <&i2s1m0_lrck 1683fac71e4eSEmmanuel Vadot &i2s1m0_sclk 1684fac71e4eSEmmanuel Vadot &i2s1m0_sdi0 1685fac71e4eSEmmanuel Vadot &i2s1m0_sdi1 1686fac71e4eSEmmanuel Vadot &i2s1m0_sdi2 1687fac71e4eSEmmanuel Vadot &i2s1m0_sdi3 1688fac71e4eSEmmanuel Vadot &i2s1m0_sdo0 1689fac71e4eSEmmanuel Vadot &i2s1m0_sdo1 1690fac71e4eSEmmanuel Vadot &i2s1m0_sdo2 1691fac71e4eSEmmanuel Vadot &i2s1m0_sdo3>; 1692fac71e4eSEmmanuel Vadot #sound-dai-cells = <0>; 1693fac71e4eSEmmanuel Vadot status = "disabled"; 1694fac71e4eSEmmanuel Vadot }; 1695fac71e4eSEmmanuel Vadot 1696fac71e4eSEmmanuel Vadot i2s2_2ch: i2s@fe490000 { 1697fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s"; 1698fac71e4eSEmmanuel Vadot reg = <0x0 0xfe490000 0x0 0x1000>; 1699fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH 0>; 1700fac71e4eSEmmanuel Vadot clocks = <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>; 1701fac71e4eSEmmanuel Vadot clock-names = "i2s_clk", "i2s_hclk"; 1702fac71e4eSEmmanuel Vadot assigned-clocks = <&cru CLK_I2S2_2CH_SRC>; 1703fac71e4eSEmmanuel Vadot assigned-clock-parents = <&cru PLL_AUPLL>; 1704fac71e4eSEmmanuel Vadot dmas = <&dmac1 0>, <&dmac1 1>; 1705fac71e4eSEmmanuel Vadot dma-names = "tx", "rx"; 1706fac71e4eSEmmanuel Vadot power-domains = <&power RK3588_PD_AUDIO>; 1707fac71e4eSEmmanuel Vadot rockchip,trcm-sync-tx-only; 1708fac71e4eSEmmanuel Vadot pinctrl-names = "default"; 1709fac71e4eSEmmanuel Vadot pinctrl-0 = <&i2s2m1_lrck 1710fac71e4eSEmmanuel Vadot &i2s2m1_sclk 1711fac71e4eSEmmanuel Vadot &i2s2m1_sdi 1712fac71e4eSEmmanuel Vadot &i2s2m1_sdo>; 1713fac71e4eSEmmanuel Vadot #sound-dai-cells = <0>; 1714fac71e4eSEmmanuel Vadot status = "disabled"; 1715fac71e4eSEmmanuel Vadot }; 1716fac71e4eSEmmanuel Vadot 1717fac71e4eSEmmanuel Vadot i2s3_2ch: i2s@fe4a0000 { 1718fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s"; 1719fac71e4eSEmmanuel Vadot reg = <0x0 0xfe4a0000 0x0 0x1000>; 1720fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH 0>; 1721fac71e4eSEmmanuel Vadot clocks = <&cru MCLK_I2S3_2CH>, <&cru HCLK_I2S3_2CH>; 1722fac71e4eSEmmanuel Vadot clock-names = "i2s_clk", "i2s_hclk"; 1723fac71e4eSEmmanuel Vadot assigned-clocks = <&cru CLK_I2S3_2CH_SRC>; 1724fac71e4eSEmmanuel Vadot assigned-clock-parents = <&cru PLL_AUPLL>; 1725fac71e4eSEmmanuel Vadot dmas = <&dmac1 2>, <&dmac1 3>; 1726fac71e4eSEmmanuel Vadot dma-names = "tx", "rx"; 1727fac71e4eSEmmanuel Vadot power-domains = <&power RK3588_PD_AUDIO>; 1728fac71e4eSEmmanuel Vadot rockchip,trcm-sync-tx-only; 1729fac71e4eSEmmanuel Vadot pinctrl-names = "default"; 1730fac71e4eSEmmanuel Vadot pinctrl-0 = <&i2s3_lrck 1731fac71e4eSEmmanuel Vadot &i2s3_sclk 1732fac71e4eSEmmanuel Vadot &i2s3_sdi 1733fac71e4eSEmmanuel Vadot &i2s3_sdo>; 1734fac71e4eSEmmanuel Vadot #sound-dai-cells = <0>; 1735fac71e4eSEmmanuel Vadot status = "disabled"; 1736fac71e4eSEmmanuel Vadot }; 1737fac71e4eSEmmanuel Vadot 1738cb7aa33aSEmmanuel Vadot gic: interrupt-controller@fe600000 { 1739cb7aa33aSEmmanuel Vadot compatible = "arm,gic-v3"; 1740cb7aa33aSEmmanuel Vadot reg = <0x0 0xfe600000 0 0x10000>, /* GICD */ 1741cb7aa33aSEmmanuel Vadot <0x0 0xfe680000 0 0x100000>; /* GICR */ 1742cb7aa33aSEmmanuel Vadot interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>; 1743cb7aa33aSEmmanuel Vadot interrupt-controller; 1744cb7aa33aSEmmanuel Vadot mbi-alias = <0x0 0xfe610000>; 1745cb7aa33aSEmmanuel Vadot mbi-ranges = <424 56>; 1746cb7aa33aSEmmanuel Vadot msi-controller; 1747f126890aSEmmanuel Vadot ranges; 1748f126890aSEmmanuel Vadot #address-cells = <2>; 1749cb7aa33aSEmmanuel Vadot #interrupt-cells = <4>; 1750f126890aSEmmanuel Vadot #size-cells = <2>; 1751f126890aSEmmanuel Vadot 1752f126890aSEmmanuel Vadot its0: msi-controller@fe640000 { 1753f126890aSEmmanuel Vadot compatible = "arm,gic-v3-its"; 1754f126890aSEmmanuel Vadot reg = <0x0 0xfe640000 0x0 0x20000>; 1755f126890aSEmmanuel Vadot msi-controller; 1756f126890aSEmmanuel Vadot #msi-cells = <1>; 1757f126890aSEmmanuel Vadot }; 1758f126890aSEmmanuel Vadot 1759f126890aSEmmanuel Vadot its1: msi-controller@fe660000 { 1760f126890aSEmmanuel Vadot compatible = "arm,gic-v3-its"; 1761f126890aSEmmanuel Vadot reg = <0x0 0xfe660000 0x0 0x20000>; 1762f126890aSEmmanuel Vadot msi-controller; 1763f126890aSEmmanuel Vadot #msi-cells = <1>; 1764f126890aSEmmanuel Vadot }; 1765cb7aa33aSEmmanuel Vadot 1766cb7aa33aSEmmanuel Vadot ppi-partitions { 1767cb7aa33aSEmmanuel Vadot ppi_partition0: interrupt-partition-0 { 1768cb7aa33aSEmmanuel Vadot affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>; 1769cb7aa33aSEmmanuel Vadot }; 1770cb7aa33aSEmmanuel Vadot 1771cb7aa33aSEmmanuel Vadot ppi_partition1: interrupt-partition-1 { 1772cb7aa33aSEmmanuel Vadot affinity = <&cpu_b0 &cpu_b1 &cpu_b2 &cpu_b3>; 1773cb7aa33aSEmmanuel Vadot }; 1774cb7aa33aSEmmanuel Vadot }; 1775cb7aa33aSEmmanuel Vadot }; 1776cb7aa33aSEmmanuel Vadot 1777cb7aa33aSEmmanuel Vadot dmac0: dma-controller@fea10000 { 1778cb7aa33aSEmmanuel Vadot compatible = "arm,pl330", "arm,primecell"; 1779cb7aa33aSEmmanuel Vadot reg = <0x0 0xfea10000 0x0 0x4000>; 1780cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH 0>, 1781cb7aa33aSEmmanuel Vadot <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH 0>; 1782cb7aa33aSEmmanuel Vadot arm,pl330-periph-burst; 1783cb7aa33aSEmmanuel Vadot clocks = <&cru ACLK_DMAC0>; 1784cb7aa33aSEmmanuel Vadot clock-names = "apb_pclk"; 1785cb7aa33aSEmmanuel Vadot #dma-cells = <1>; 1786cb7aa33aSEmmanuel Vadot }; 1787cb7aa33aSEmmanuel Vadot 1788cb7aa33aSEmmanuel Vadot dmac1: dma-controller@fea30000 { 1789cb7aa33aSEmmanuel Vadot compatible = "arm,pl330", "arm,primecell"; 1790cb7aa33aSEmmanuel Vadot reg = <0x0 0xfea30000 0x0 0x4000>; 1791cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH 0>, 1792cb7aa33aSEmmanuel Vadot <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH 0>; 1793cb7aa33aSEmmanuel Vadot arm,pl330-periph-burst; 1794cb7aa33aSEmmanuel Vadot clocks = <&cru ACLK_DMAC1>; 1795cb7aa33aSEmmanuel Vadot clock-names = "apb_pclk"; 1796cb7aa33aSEmmanuel Vadot #dma-cells = <1>; 1797cb7aa33aSEmmanuel Vadot }; 1798cb7aa33aSEmmanuel Vadot 1799cb7aa33aSEmmanuel Vadot i2c1: i2c@fea90000 { 1800cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; 1801cb7aa33aSEmmanuel Vadot reg = <0x0 0xfea90000 0x0 0x1000>; 1802cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>; 1803cb7aa33aSEmmanuel Vadot clock-names = "i2c", "pclk"; 1804cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 0>; 1805cb7aa33aSEmmanuel Vadot pinctrl-0 = <&i2c1m0_xfer>; 1806cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1807cb7aa33aSEmmanuel Vadot #address-cells = <1>; 1808cb7aa33aSEmmanuel Vadot #size-cells = <0>; 1809cb7aa33aSEmmanuel Vadot status = "disabled"; 1810cb7aa33aSEmmanuel Vadot }; 1811cb7aa33aSEmmanuel Vadot 1812cb7aa33aSEmmanuel Vadot i2c2: i2c@feaa0000 { 1813cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; 1814cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeaa0000 0x0 0x1000>; 1815cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>; 1816cb7aa33aSEmmanuel Vadot clock-names = "i2c", "pclk"; 1817cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH 0>; 1818cb7aa33aSEmmanuel Vadot pinctrl-0 = <&i2c2m0_xfer>; 1819cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1820cb7aa33aSEmmanuel Vadot #address-cells = <1>; 1821cb7aa33aSEmmanuel Vadot #size-cells = <0>; 1822cb7aa33aSEmmanuel Vadot status = "disabled"; 1823cb7aa33aSEmmanuel Vadot }; 1824cb7aa33aSEmmanuel Vadot 1825cb7aa33aSEmmanuel Vadot i2c3: i2c@feab0000 { 1826cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; 1827cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeab0000 0x0 0x1000>; 1828cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>; 1829cb7aa33aSEmmanuel Vadot clock-names = "i2c", "pclk"; 1830cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 0>; 1831cb7aa33aSEmmanuel Vadot pinctrl-0 = <&i2c3m0_xfer>; 1832cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1833cb7aa33aSEmmanuel Vadot #address-cells = <1>; 1834cb7aa33aSEmmanuel Vadot #size-cells = <0>; 1835cb7aa33aSEmmanuel Vadot status = "disabled"; 1836cb7aa33aSEmmanuel Vadot }; 1837cb7aa33aSEmmanuel Vadot 1838cb7aa33aSEmmanuel Vadot i2c4: i2c@feac0000 { 1839cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; 1840cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeac0000 0x0 0x1000>; 1841cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>; 1842cb7aa33aSEmmanuel Vadot clock-names = "i2c", "pclk"; 1843cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 0>; 1844cb7aa33aSEmmanuel Vadot pinctrl-0 = <&i2c4m0_xfer>; 1845cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1846cb7aa33aSEmmanuel Vadot #address-cells = <1>; 1847cb7aa33aSEmmanuel Vadot #size-cells = <0>; 1848cb7aa33aSEmmanuel Vadot status = "disabled"; 1849cb7aa33aSEmmanuel Vadot }; 1850cb7aa33aSEmmanuel Vadot 1851cb7aa33aSEmmanuel Vadot i2c5: i2c@fead0000 { 1852cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; 1853cb7aa33aSEmmanuel Vadot reg = <0x0 0xfead0000 0x0 0x1000>; 1854cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>; 1855cb7aa33aSEmmanuel Vadot clock-names = "i2c", "pclk"; 1856cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 0>; 1857cb7aa33aSEmmanuel Vadot pinctrl-0 = <&i2c5m0_xfer>; 1858cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1859cb7aa33aSEmmanuel Vadot #address-cells = <1>; 1860cb7aa33aSEmmanuel Vadot #size-cells = <0>; 1861cb7aa33aSEmmanuel Vadot status = "disabled"; 1862cb7aa33aSEmmanuel Vadot }; 1863cb7aa33aSEmmanuel Vadot 1864f126890aSEmmanuel Vadot timer0: timer@feae0000 { 1865f126890aSEmmanuel Vadot compatible = "rockchip,rk3588-timer", "rockchip,rk3288-timer"; 1866f126890aSEmmanuel Vadot reg = <0x0 0xfeae0000 0x0 0x20>; 1867f126890aSEmmanuel Vadot interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH 0>; 1868f126890aSEmmanuel Vadot clocks = <&cru PCLK_BUSTIMER0>, <&cru CLK_BUSTIMER0>; 1869f126890aSEmmanuel Vadot clock-names = "pclk", "timer"; 1870f126890aSEmmanuel Vadot }; 1871f126890aSEmmanuel Vadot 1872fac71e4eSEmmanuel Vadot wdt: watchdog@feaf0000 { 1873fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-wdt", "snps,dw-wdt"; 1874fac71e4eSEmmanuel Vadot reg = <0x0 0xfeaf0000 0x0 0x100>; 1875fac71e4eSEmmanuel Vadot clocks = <&cru TCLK_WDT0>, <&cru PCLK_WDT0>; 1876fac71e4eSEmmanuel Vadot clock-names = "tclk", "pclk"; 1877fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 0>; 1878fac71e4eSEmmanuel Vadot }; 1879fac71e4eSEmmanuel Vadot 1880cb7aa33aSEmmanuel Vadot spi0: spi@feb00000 { 1881cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; 1882cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb00000 0x0 0x1000>; 1883cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 0>; 1884cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>; 1885cb7aa33aSEmmanuel Vadot clock-names = "spiclk", "apb_pclk"; 1886cb7aa33aSEmmanuel Vadot dmas = <&dmac0 14>, <&dmac0 15>; 1887cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 1888cb7aa33aSEmmanuel Vadot num-cs = <2>; 1889cb7aa33aSEmmanuel Vadot pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>; 1890cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1891cb7aa33aSEmmanuel Vadot #address-cells = <1>; 1892cb7aa33aSEmmanuel Vadot #size-cells = <0>; 1893cb7aa33aSEmmanuel Vadot status = "disabled"; 1894cb7aa33aSEmmanuel Vadot }; 1895cb7aa33aSEmmanuel Vadot 1896cb7aa33aSEmmanuel Vadot spi1: spi@feb10000 { 1897cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; 1898cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb10000 0x0 0x1000>; 1899cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 0>; 1900cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>; 1901cb7aa33aSEmmanuel Vadot clock-names = "spiclk", "apb_pclk"; 1902cb7aa33aSEmmanuel Vadot dmas = <&dmac0 16>, <&dmac0 17>; 1903cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 1904cb7aa33aSEmmanuel Vadot num-cs = <2>; 1905cb7aa33aSEmmanuel Vadot pinctrl-0 = <&spi1m1_cs0 &spi1m1_cs1 &spi1m1_pins>; 1906cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1907cb7aa33aSEmmanuel Vadot #address-cells = <1>; 1908cb7aa33aSEmmanuel Vadot #size-cells = <0>; 1909cb7aa33aSEmmanuel Vadot status = "disabled"; 1910cb7aa33aSEmmanuel Vadot }; 1911cb7aa33aSEmmanuel Vadot 1912cb7aa33aSEmmanuel Vadot spi2: spi@feb20000 { 1913cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; 1914cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb20000 0x0 0x1000>; 1915cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 0>; 1916cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>; 1917cb7aa33aSEmmanuel Vadot clock-names = "spiclk", "apb_pclk"; 1918cb7aa33aSEmmanuel Vadot dmas = <&dmac1 15>, <&dmac1 16>; 1919cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 1920cb7aa33aSEmmanuel Vadot num-cs = <2>; 1921cb7aa33aSEmmanuel Vadot pinctrl-0 = <&spi2m2_cs0 &spi2m2_cs1 &spi2m2_pins>; 1922cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1923cb7aa33aSEmmanuel Vadot #address-cells = <1>; 1924cb7aa33aSEmmanuel Vadot #size-cells = <0>; 1925cb7aa33aSEmmanuel Vadot status = "disabled"; 1926cb7aa33aSEmmanuel Vadot }; 1927cb7aa33aSEmmanuel Vadot 1928cb7aa33aSEmmanuel Vadot spi3: spi@feb30000 { 1929cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; 1930cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb30000 0x0 0x1000>; 1931cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 0>; 1932cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>; 1933cb7aa33aSEmmanuel Vadot clock-names = "spiclk", "apb_pclk"; 1934cb7aa33aSEmmanuel Vadot dmas = <&dmac1 17>, <&dmac1 18>; 1935cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 1936cb7aa33aSEmmanuel Vadot num-cs = <2>; 1937cb7aa33aSEmmanuel Vadot pinctrl-0 = <&spi3m1_cs0 &spi3m1_cs1 &spi3m1_pins>; 1938cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1939cb7aa33aSEmmanuel Vadot #address-cells = <1>; 1940cb7aa33aSEmmanuel Vadot #size-cells = <0>; 1941cb7aa33aSEmmanuel Vadot status = "disabled"; 1942cb7aa33aSEmmanuel Vadot }; 1943cb7aa33aSEmmanuel Vadot 1944cb7aa33aSEmmanuel Vadot uart1: serial@feb40000 { 1945cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 1946cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb40000 0x0 0x100>; 1947cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 0>; 1948cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; 1949cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 1950cb7aa33aSEmmanuel Vadot dmas = <&dmac0 8>, <&dmac0 9>; 1951cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 1952cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart1m1_xfer>; 1953cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1954cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 1955cb7aa33aSEmmanuel Vadot reg-shift = <2>; 1956cb7aa33aSEmmanuel Vadot status = "disabled"; 1957cb7aa33aSEmmanuel Vadot }; 1958cb7aa33aSEmmanuel Vadot 1959cb7aa33aSEmmanuel Vadot uart2: serial@feb50000 { 1960cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 1961cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb50000 0x0 0x100>; 1962cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 0>; 1963cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; 1964cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 1965cb7aa33aSEmmanuel Vadot dmas = <&dmac0 10>, <&dmac0 11>; 1966cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 1967cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart2m1_xfer>; 1968cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1969cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 1970cb7aa33aSEmmanuel Vadot reg-shift = <2>; 1971cb7aa33aSEmmanuel Vadot status = "disabled"; 1972cb7aa33aSEmmanuel Vadot }; 1973cb7aa33aSEmmanuel Vadot 1974cb7aa33aSEmmanuel Vadot uart3: serial@feb60000 { 1975cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 1976cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb60000 0x0 0x100>; 1977cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 0>; 1978cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; 1979cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 1980cb7aa33aSEmmanuel Vadot dmas = <&dmac0 12>, <&dmac0 13>; 1981cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 1982cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart3m1_xfer>; 1983cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1984cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 1985cb7aa33aSEmmanuel Vadot reg-shift = <2>; 1986cb7aa33aSEmmanuel Vadot status = "disabled"; 1987cb7aa33aSEmmanuel Vadot }; 1988cb7aa33aSEmmanuel Vadot 1989cb7aa33aSEmmanuel Vadot uart4: serial@feb70000 { 1990cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 1991cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb70000 0x0 0x100>; 1992cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH 0>; 1993cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; 1994cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 1995cb7aa33aSEmmanuel Vadot dmas = <&dmac1 9>, <&dmac1 10>; 1996cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 1997cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart4m1_xfer>; 1998cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 1999cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 2000cb7aa33aSEmmanuel Vadot reg-shift = <2>; 2001cb7aa33aSEmmanuel Vadot status = "disabled"; 2002cb7aa33aSEmmanuel Vadot }; 2003cb7aa33aSEmmanuel Vadot 2004cb7aa33aSEmmanuel Vadot uart5: serial@feb80000 { 2005cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 2006cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb80000 0x0 0x100>; 2007cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 0>; 2008cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; 2009cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 2010cb7aa33aSEmmanuel Vadot dmas = <&dmac1 11>, <&dmac1 12>; 2011cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 2012cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart5m1_xfer>; 2013cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2014cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 2015cb7aa33aSEmmanuel Vadot reg-shift = <2>; 2016cb7aa33aSEmmanuel Vadot status = "disabled"; 2017cb7aa33aSEmmanuel Vadot }; 2018cb7aa33aSEmmanuel Vadot 2019cb7aa33aSEmmanuel Vadot uart6: serial@feb90000 { 2020cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 2021cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeb90000 0x0 0x100>; 2022cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 0>; 2023cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; 2024cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 2025cb7aa33aSEmmanuel Vadot dmas = <&dmac1 13>, <&dmac1 14>; 2026cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 2027cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart6m1_xfer>; 2028cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2029cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 2030cb7aa33aSEmmanuel Vadot reg-shift = <2>; 2031cb7aa33aSEmmanuel Vadot status = "disabled"; 2032cb7aa33aSEmmanuel Vadot }; 2033cb7aa33aSEmmanuel Vadot 2034cb7aa33aSEmmanuel Vadot uart7: serial@feba0000 { 2035cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 2036cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeba0000 0x0 0x100>; 2037cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 0>; 2038cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; 2039cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 2040cb7aa33aSEmmanuel Vadot dmas = <&dmac2 7>, <&dmac2 8>; 2041cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 2042cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart7m1_xfer>; 2043cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2044cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 2045cb7aa33aSEmmanuel Vadot reg-shift = <2>; 2046cb7aa33aSEmmanuel Vadot status = "disabled"; 2047cb7aa33aSEmmanuel Vadot }; 2048cb7aa33aSEmmanuel Vadot 2049cb7aa33aSEmmanuel Vadot uart8: serial@febb0000 { 2050cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 2051cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebb0000 0x0 0x100>; 2052cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 0>; 2053cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>; 2054cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 2055cb7aa33aSEmmanuel Vadot dmas = <&dmac2 9>, <&dmac2 10>; 2056cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 2057cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart8m1_xfer>; 2058cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2059cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 2060cb7aa33aSEmmanuel Vadot reg-shift = <2>; 2061cb7aa33aSEmmanuel Vadot status = "disabled"; 2062cb7aa33aSEmmanuel Vadot }; 2063cb7aa33aSEmmanuel Vadot 2064cb7aa33aSEmmanuel Vadot uart9: serial@febc0000 { 2065cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; 2066cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebc0000 0x0 0x100>; 2067cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 0>; 2068cb7aa33aSEmmanuel Vadot clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>; 2069cb7aa33aSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 2070cb7aa33aSEmmanuel Vadot dmas = <&dmac2 11>, <&dmac2 12>; 2071cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 2072cb7aa33aSEmmanuel Vadot pinctrl-0 = <&uart9m1_xfer>; 2073cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2074cb7aa33aSEmmanuel Vadot reg-io-width = <4>; 2075cb7aa33aSEmmanuel Vadot reg-shift = <2>; 2076cb7aa33aSEmmanuel Vadot status = "disabled"; 2077cb7aa33aSEmmanuel Vadot }; 2078cb7aa33aSEmmanuel Vadot 2079cb7aa33aSEmmanuel Vadot pwm4: pwm@febd0000 { 2080cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2081cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebd0000 0x0 0x10>; 2082cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; 2083cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2084cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm4m0_pins>; 2085cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2086cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2087cb7aa33aSEmmanuel Vadot status = "disabled"; 2088cb7aa33aSEmmanuel Vadot }; 2089cb7aa33aSEmmanuel Vadot 2090cb7aa33aSEmmanuel Vadot pwm5: pwm@febd0010 { 2091cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2092cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebd0010 0x0 0x10>; 2093cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; 2094cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2095cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm5m0_pins>; 2096cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2097cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2098cb7aa33aSEmmanuel Vadot status = "disabled"; 2099cb7aa33aSEmmanuel Vadot }; 2100cb7aa33aSEmmanuel Vadot 2101cb7aa33aSEmmanuel Vadot pwm6: pwm@febd0020 { 2102cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2103cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebd0020 0x0 0x10>; 2104cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; 2105cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2106cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm6m0_pins>; 2107cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2108cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2109cb7aa33aSEmmanuel Vadot status = "disabled"; 2110cb7aa33aSEmmanuel Vadot }; 2111cb7aa33aSEmmanuel Vadot 2112cb7aa33aSEmmanuel Vadot pwm7: pwm@febd0030 { 2113cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2114cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebd0030 0x0 0x10>; 2115cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; 2116cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2117cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm7m0_pins>; 2118cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2119cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2120cb7aa33aSEmmanuel Vadot status = "disabled"; 2121cb7aa33aSEmmanuel Vadot }; 2122cb7aa33aSEmmanuel Vadot 2123cb7aa33aSEmmanuel Vadot pwm8: pwm@febe0000 { 2124cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2125cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebe0000 0x0 0x10>; 2126cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; 2127cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2128cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm8m0_pins>; 2129cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2130cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2131cb7aa33aSEmmanuel Vadot status = "disabled"; 2132cb7aa33aSEmmanuel Vadot }; 2133cb7aa33aSEmmanuel Vadot 2134cb7aa33aSEmmanuel Vadot pwm9: pwm@febe0010 { 2135cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2136cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebe0010 0x0 0x10>; 2137cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; 2138cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2139cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm9m0_pins>; 2140cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2141cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2142cb7aa33aSEmmanuel Vadot status = "disabled"; 2143cb7aa33aSEmmanuel Vadot }; 2144cb7aa33aSEmmanuel Vadot 2145cb7aa33aSEmmanuel Vadot pwm10: pwm@febe0020 { 2146cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2147cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebe0020 0x0 0x10>; 2148cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; 2149cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2150cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm10m0_pins>; 2151cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2152cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2153cb7aa33aSEmmanuel Vadot status = "disabled"; 2154cb7aa33aSEmmanuel Vadot }; 2155cb7aa33aSEmmanuel Vadot 2156cb7aa33aSEmmanuel Vadot pwm11: pwm@febe0030 { 2157cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2158cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebe0030 0x0 0x10>; 2159cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; 2160cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2161cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm11m0_pins>; 2162cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2163cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2164cb7aa33aSEmmanuel Vadot status = "disabled"; 2165cb7aa33aSEmmanuel Vadot }; 2166cb7aa33aSEmmanuel Vadot 2167cb7aa33aSEmmanuel Vadot pwm12: pwm@febf0000 { 2168cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2169cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebf0000 0x0 0x10>; 2170cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; 2171cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2172cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm12m0_pins>; 2173cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2174cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2175cb7aa33aSEmmanuel Vadot status = "disabled"; 2176cb7aa33aSEmmanuel Vadot }; 2177cb7aa33aSEmmanuel Vadot 2178cb7aa33aSEmmanuel Vadot pwm13: pwm@febf0010 { 2179cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2180cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebf0010 0x0 0x10>; 2181cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; 2182cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2183cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm13m0_pins>; 2184cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2185cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2186cb7aa33aSEmmanuel Vadot status = "disabled"; 2187cb7aa33aSEmmanuel Vadot }; 2188cb7aa33aSEmmanuel Vadot 2189cb7aa33aSEmmanuel Vadot pwm14: pwm@febf0020 { 2190cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2191cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebf0020 0x0 0x10>; 2192cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; 2193cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2194cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm14m0_pins>; 2195cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2196cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2197cb7aa33aSEmmanuel Vadot status = "disabled"; 2198cb7aa33aSEmmanuel Vadot }; 2199cb7aa33aSEmmanuel Vadot 2200cb7aa33aSEmmanuel Vadot pwm15: pwm@febf0030 { 2201cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; 2202cb7aa33aSEmmanuel Vadot reg = <0x0 0xfebf0030 0x0 0x10>; 2203cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; 2204cb7aa33aSEmmanuel Vadot clock-names = "pwm", "pclk"; 2205cb7aa33aSEmmanuel Vadot pinctrl-0 = <&pwm15m0_pins>; 2206cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2207cb7aa33aSEmmanuel Vadot #pwm-cells = <3>; 2208cb7aa33aSEmmanuel Vadot status = "disabled"; 2209cb7aa33aSEmmanuel Vadot }; 2210cb7aa33aSEmmanuel Vadot 2211fac71e4eSEmmanuel Vadot tsadc: tsadc@fec00000 { 2212fac71e4eSEmmanuel Vadot compatible = "rockchip,rk3588-tsadc"; 2213fac71e4eSEmmanuel Vadot reg = <0x0 0xfec00000 0x0 0x400>; 2214fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0>; 2215fac71e4eSEmmanuel Vadot clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>; 2216fac71e4eSEmmanuel Vadot clock-names = "tsadc", "apb_pclk"; 2217fac71e4eSEmmanuel Vadot assigned-clocks = <&cru CLK_TSADC>; 2218fac71e4eSEmmanuel Vadot assigned-clock-rates = <2000000>; 2219fac71e4eSEmmanuel Vadot resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>; 2220fac71e4eSEmmanuel Vadot reset-names = "tsadc-apb", "tsadc"; 2221fac71e4eSEmmanuel Vadot rockchip,hw-tshut-temp = <120000>; 2222fac71e4eSEmmanuel Vadot rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ 2223fac71e4eSEmmanuel Vadot rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ 2224fac71e4eSEmmanuel Vadot pinctrl-0 = <&tsadc_gpio_func>; 2225fac71e4eSEmmanuel Vadot pinctrl-1 = <&tsadc_shut>; 2226fac71e4eSEmmanuel Vadot pinctrl-names = "gpio", "otpout"; 2227fac71e4eSEmmanuel Vadot #thermal-sensor-cells = <1>; 2228fac71e4eSEmmanuel Vadot status = "disabled"; 2229fac71e4eSEmmanuel Vadot }; 2230fac71e4eSEmmanuel Vadot 2231f126890aSEmmanuel Vadot saradc: adc@fec10000 { 2232f126890aSEmmanuel Vadot compatible = "rockchip,rk3588-saradc"; 2233f126890aSEmmanuel Vadot reg = <0x0 0xfec10000 0x0 0x10000>; 2234f126890aSEmmanuel Vadot interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH 0>; 2235f126890aSEmmanuel Vadot #io-channel-cells = <1>; 2236f126890aSEmmanuel Vadot clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; 2237f126890aSEmmanuel Vadot clock-names = "saradc", "apb_pclk"; 2238f126890aSEmmanuel Vadot resets = <&cru SRST_P_SARADC>; 2239f126890aSEmmanuel Vadot reset-names = "saradc-apb"; 2240f126890aSEmmanuel Vadot status = "disabled"; 2241f126890aSEmmanuel Vadot }; 2242f126890aSEmmanuel Vadot 2243cb7aa33aSEmmanuel Vadot i2c6: i2c@fec80000 { 2244cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; 2245cb7aa33aSEmmanuel Vadot reg = <0x0 0xfec80000 0x0 0x1000>; 2246cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>; 2247cb7aa33aSEmmanuel Vadot clock-names = "i2c", "pclk"; 2248cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 0>; 2249cb7aa33aSEmmanuel Vadot pinctrl-0 = <&i2c6m0_xfer>; 2250cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2251cb7aa33aSEmmanuel Vadot #address-cells = <1>; 2252cb7aa33aSEmmanuel Vadot #size-cells = <0>; 2253cb7aa33aSEmmanuel Vadot status = "disabled"; 2254cb7aa33aSEmmanuel Vadot }; 2255cb7aa33aSEmmanuel Vadot 2256cb7aa33aSEmmanuel Vadot i2c7: i2c@fec90000 { 2257cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; 2258cb7aa33aSEmmanuel Vadot reg = <0x0 0xfec90000 0x0 0x1000>; 2259cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>; 2260cb7aa33aSEmmanuel Vadot clock-names = "i2c", "pclk"; 2261cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 0>; 2262cb7aa33aSEmmanuel Vadot pinctrl-0 = <&i2c7m0_xfer>; 2263cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2264cb7aa33aSEmmanuel Vadot #address-cells = <1>; 2265cb7aa33aSEmmanuel Vadot #size-cells = <0>; 2266cb7aa33aSEmmanuel Vadot status = "disabled"; 2267cb7aa33aSEmmanuel Vadot }; 2268cb7aa33aSEmmanuel Vadot 2269cb7aa33aSEmmanuel Vadot i2c8: i2c@feca0000 { 2270cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; 2271cb7aa33aSEmmanuel Vadot reg = <0x0 0xfeca0000 0x0 0x1000>; 2272cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_I2C8>, <&cru PCLK_I2C8>; 2273cb7aa33aSEmmanuel Vadot clock-names = "i2c", "pclk"; 2274cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 0>; 2275cb7aa33aSEmmanuel Vadot pinctrl-0 = <&i2c8m0_xfer>; 2276cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2277cb7aa33aSEmmanuel Vadot #address-cells = <1>; 2278cb7aa33aSEmmanuel Vadot #size-cells = <0>; 2279cb7aa33aSEmmanuel Vadot status = "disabled"; 2280cb7aa33aSEmmanuel Vadot }; 2281cb7aa33aSEmmanuel Vadot 2282cb7aa33aSEmmanuel Vadot spi4: spi@fecb0000 { 2283cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; 2284cb7aa33aSEmmanuel Vadot reg = <0x0 0xfecb0000 0x0 0x1000>; 2285cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 0>; 2286cb7aa33aSEmmanuel Vadot clocks = <&cru CLK_SPI4>, <&cru PCLK_SPI4>; 2287cb7aa33aSEmmanuel Vadot clock-names = "spiclk", "apb_pclk"; 2288cb7aa33aSEmmanuel Vadot dmas = <&dmac2 13>, <&dmac2 14>; 2289cb7aa33aSEmmanuel Vadot dma-names = "tx", "rx"; 2290cb7aa33aSEmmanuel Vadot num-cs = <2>; 2291cb7aa33aSEmmanuel Vadot pinctrl-0 = <&spi4m0_cs0 &spi4m0_cs1 &spi4m0_pins>; 2292cb7aa33aSEmmanuel Vadot pinctrl-names = "default"; 2293cb7aa33aSEmmanuel Vadot #address-cells = <1>; 2294cb7aa33aSEmmanuel Vadot #size-cells = <0>; 2295cb7aa33aSEmmanuel Vadot status = "disabled"; 2296cb7aa33aSEmmanuel Vadot }; 2297cb7aa33aSEmmanuel Vadot 2298f126890aSEmmanuel Vadot otp: efuse@fecc0000 { 2299f126890aSEmmanuel Vadot compatible = "rockchip,rk3588-otp"; 2300f126890aSEmmanuel Vadot reg = <0x0 0xfecc0000 0x0 0x400>; 2301f126890aSEmmanuel Vadot clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>, 2302f126890aSEmmanuel Vadot <&cru CLK_OTP_PHY_G>, <&cru CLK_OTPC_ARB>; 2303f126890aSEmmanuel Vadot clock-names = "otp", "apb_pclk", "phy", "arb"; 2304f126890aSEmmanuel Vadot resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>, 2305f126890aSEmmanuel Vadot <&cru SRST_OTPC_ARB>; 2306f126890aSEmmanuel Vadot reset-names = "otp", "apb", "arb"; 2307f126890aSEmmanuel Vadot #address-cells = <1>; 2308f126890aSEmmanuel Vadot #size-cells = <1>; 2309f126890aSEmmanuel Vadot 2310f126890aSEmmanuel Vadot cpu_code: cpu-code@2 { 2311f126890aSEmmanuel Vadot reg = <0x02 0x2>; 2312f126890aSEmmanuel Vadot }; 2313f126890aSEmmanuel Vadot 2314f126890aSEmmanuel Vadot otp_id: id@7 { 2315f126890aSEmmanuel Vadot reg = <0x07 0x10>; 2316f126890aSEmmanuel Vadot }; 2317f126890aSEmmanuel Vadot 2318f126890aSEmmanuel Vadot cpub0_leakage: cpu-leakage@17 { 2319f126890aSEmmanuel Vadot reg = <0x17 0x1>; 2320f126890aSEmmanuel Vadot }; 2321f126890aSEmmanuel Vadot 2322f126890aSEmmanuel Vadot cpub1_leakage: cpu-leakage@18 { 2323f126890aSEmmanuel Vadot reg = <0x18 0x1>; 2324f126890aSEmmanuel Vadot }; 2325f126890aSEmmanuel Vadot 2326f126890aSEmmanuel Vadot cpul_leakage: cpu-leakage@19 { 2327f126890aSEmmanuel Vadot reg = <0x19 0x1>; 2328f126890aSEmmanuel Vadot }; 2329f126890aSEmmanuel Vadot 2330f126890aSEmmanuel Vadot log_leakage: log-leakage@1a { 2331f126890aSEmmanuel Vadot reg = <0x1a 0x1>; 2332f126890aSEmmanuel Vadot }; 2333f126890aSEmmanuel Vadot 2334f126890aSEmmanuel Vadot gpu_leakage: gpu-leakage@1b { 2335f126890aSEmmanuel Vadot reg = <0x1b 0x1>; 2336f126890aSEmmanuel Vadot }; 2337f126890aSEmmanuel Vadot 2338f126890aSEmmanuel Vadot otp_cpu_version: cpu-version@1c { 2339f126890aSEmmanuel Vadot reg = <0x1c 0x1>; 2340f126890aSEmmanuel Vadot bits = <3 3>; 2341f126890aSEmmanuel Vadot }; 2342f126890aSEmmanuel Vadot 2343f126890aSEmmanuel Vadot npu_leakage: npu-leakage@28 { 2344f126890aSEmmanuel Vadot reg = <0x28 0x1>; 2345f126890aSEmmanuel Vadot }; 2346f126890aSEmmanuel Vadot 2347f126890aSEmmanuel Vadot codec_leakage: codec-leakage@29 { 2348f126890aSEmmanuel Vadot reg = <0x29 0x1>; 2349f126890aSEmmanuel Vadot }; 2350f126890aSEmmanuel Vadot }; 2351f126890aSEmmanuel Vadot 2352cb7aa33aSEmmanuel Vadot dmac2: dma-controller@fed10000 { 2353cb7aa33aSEmmanuel Vadot compatible = "arm,pl330", "arm,primecell"; 2354cb7aa33aSEmmanuel Vadot reg = <0x0 0xfed10000 0x0 0x4000>; 2355cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH 0>, 2356cb7aa33aSEmmanuel Vadot <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH 0>; 2357cb7aa33aSEmmanuel Vadot arm,pl330-periph-burst; 2358cb7aa33aSEmmanuel Vadot clocks = <&cru ACLK_DMAC2>; 2359cb7aa33aSEmmanuel Vadot clock-names = "apb_pclk"; 2360cb7aa33aSEmmanuel Vadot #dma-cells = <1>; 2361cb7aa33aSEmmanuel Vadot }; 2362cb7aa33aSEmmanuel Vadot 2363aa1a8ff2SEmmanuel Vadot combphy0_ps: phy@fee00000 { 2364aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-naneng-combphy"; 2365aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfee00000 0x0 0x100>; 2366aa1a8ff2SEmmanuel Vadot clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>, 2367aa1a8ff2SEmmanuel Vadot <&cru PCLK_PHP_ROOT>; 2368aa1a8ff2SEmmanuel Vadot clock-names = "ref", "apb", "pipe"; 2369aa1a8ff2SEmmanuel Vadot assigned-clocks = <&cru CLK_REF_PIPE_PHY0>; 2370aa1a8ff2SEmmanuel Vadot assigned-clock-rates = <100000000>; 2371aa1a8ff2SEmmanuel Vadot #phy-cells = <1>; 2372aa1a8ff2SEmmanuel Vadot resets = <&cru SRST_REF_PIPE_PHY0>, <&cru SRST_P_PCIE2_PHY0>; 2373aa1a8ff2SEmmanuel Vadot reset-names = "phy", "apb"; 2374aa1a8ff2SEmmanuel Vadot rockchip,pipe-grf = <&php_grf>; 2375aa1a8ff2SEmmanuel Vadot rockchip,pipe-phy-grf = <&pipe_phy0_grf>; 2376aa1a8ff2SEmmanuel Vadot status = "disabled"; 2377aa1a8ff2SEmmanuel Vadot }; 2378aa1a8ff2SEmmanuel Vadot 2379aa1a8ff2SEmmanuel Vadot combphy2_psu: phy@fee20000 { 2380aa1a8ff2SEmmanuel Vadot compatible = "rockchip,rk3588-naneng-combphy"; 2381aa1a8ff2SEmmanuel Vadot reg = <0x0 0xfee20000 0x0 0x100>; 2382aa1a8ff2SEmmanuel Vadot clocks = <&cru CLK_REF_PIPE_PHY2>, <&cru PCLK_PCIE_COMBO_PIPE_PHY2>, 2383aa1a8ff2SEmmanuel Vadot <&cru PCLK_PHP_ROOT>; 2384aa1a8ff2SEmmanuel Vadot clock-names = "ref", "apb", "pipe"; 2385aa1a8ff2SEmmanuel Vadot assigned-clocks = <&cru CLK_REF_PIPE_PHY2>; 2386aa1a8ff2SEmmanuel Vadot assigned-clock-rates = <100000000>; 2387aa1a8ff2SEmmanuel Vadot #phy-cells = <1>; 2388aa1a8ff2SEmmanuel Vadot resets = <&cru SRST_REF_PIPE_PHY2>, <&cru SRST_P_PCIE2_PHY2>; 2389aa1a8ff2SEmmanuel Vadot reset-names = "phy", "apb"; 2390aa1a8ff2SEmmanuel Vadot rockchip,pipe-grf = <&php_grf>; 2391aa1a8ff2SEmmanuel Vadot rockchip,pipe-phy-grf = <&pipe_phy2_grf>; 2392aa1a8ff2SEmmanuel Vadot status = "disabled"; 2393aa1a8ff2SEmmanuel Vadot }; 2394aa1a8ff2SEmmanuel Vadot 2395cb7aa33aSEmmanuel Vadot system_sram2: sram@ff001000 { 2396cb7aa33aSEmmanuel Vadot compatible = "mmio-sram"; 2397cb7aa33aSEmmanuel Vadot reg = <0x0 0xff001000 0x0 0xef000>; 2398cb7aa33aSEmmanuel Vadot ranges = <0x0 0x0 0xff001000 0xef000>; 2399cb7aa33aSEmmanuel Vadot #address-cells = <1>; 2400cb7aa33aSEmmanuel Vadot #size-cells = <1>; 2401cb7aa33aSEmmanuel Vadot }; 2402cb7aa33aSEmmanuel Vadot 2403cb7aa33aSEmmanuel Vadot pinctrl: pinctrl { 2404cb7aa33aSEmmanuel Vadot compatible = "rockchip,rk3588-pinctrl"; 2405cb7aa33aSEmmanuel Vadot ranges; 2406cb7aa33aSEmmanuel Vadot rockchip,grf = <&ioc>; 2407cb7aa33aSEmmanuel Vadot #address-cells = <2>; 2408cb7aa33aSEmmanuel Vadot #size-cells = <2>; 2409cb7aa33aSEmmanuel Vadot 2410cb7aa33aSEmmanuel Vadot gpio0: gpio@fd8a0000 { 2411cb7aa33aSEmmanuel Vadot compatible = "rockchip,gpio-bank"; 2412cb7aa33aSEmmanuel Vadot reg = <0x0 0xfd8a0000 0x0 0x100>; 2413cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH 0>; 2414cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>; 2415cb7aa33aSEmmanuel Vadot gpio-controller; 2416cb7aa33aSEmmanuel Vadot gpio-ranges = <&pinctrl 0 0 32>; 2417cb7aa33aSEmmanuel Vadot interrupt-controller; 2418cb7aa33aSEmmanuel Vadot #gpio-cells = <2>; 2419cb7aa33aSEmmanuel Vadot #interrupt-cells = <2>; 2420cb7aa33aSEmmanuel Vadot }; 2421cb7aa33aSEmmanuel Vadot 2422cb7aa33aSEmmanuel Vadot gpio1: gpio@fec20000 { 2423cb7aa33aSEmmanuel Vadot compatible = "rockchip,gpio-bank"; 2424cb7aa33aSEmmanuel Vadot reg = <0x0 0xfec20000 0x0 0x100>; 2425cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH 0>; 2426cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; 2427cb7aa33aSEmmanuel Vadot gpio-controller; 2428cb7aa33aSEmmanuel Vadot gpio-ranges = <&pinctrl 0 32 32>; 2429cb7aa33aSEmmanuel Vadot interrupt-controller; 2430cb7aa33aSEmmanuel Vadot #gpio-cells = <2>; 2431cb7aa33aSEmmanuel Vadot #interrupt-cells = <2>; 2432cb7aa33aSEmmanuel Vadot }; 2433cb7aa33aSEmmanuel Vadot 2434cb7aa33aSEmmanuel Vadot gpio2: gpio@fec30000 { 2435cb7aa33aSEmmanuel Vadot compatible = "rockchip,gpio-bank"; 2436cb7aa33aSEmmanuel Vadot reg = <0x0 0xfec30000 0x0 0x100>; 2437cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH 0>; 2438cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; 2439cb7aa33aSEmmanuel Vadot gpio-controller; 2440cb7aa33aSEmmanuel Vadot gpio-ranges = <&pinctrl 0 64 32>; 2441cb7aa33aSEmmanuel Vadot interrupt-controller; 2442cb7aa33aSEmmanuel Vadot #gpio-cells = <2>; 2443cb7aa33aSEmmanuel Vadot #interrupt-cells = <2>; 2444cb7aa33aSEmmanuel Vadot }; 2445cb7aa33aSEmmanuel Vadot 2446cb7aa33aSEmmanuel Vadot gpio3: gpio@fec40000 { 2447cb7aa33aSEmmanuel Vadot compatible = "rockchip,gpio-bank"; 2448cb7aa33aSEmmanuel Vadot reg = <0x0 0xfec40000 0x0 0x100>; 2449cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH 0>; 2450cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; 2451cb7aa33aSEmmanuel Vadot gpio-controller; 2452cb7aa33aSEmmanuel Vadot gpio-ranges = <&pinctrl 0 96 32>; 2453cb7aa33aSEmmanuel Vadot interrupt-controller; 2454cb7aa33aSEmmanuel Vadot #gpio-cells = <2>; 2455cb7aa33aSEmmanuel Vadot #interrupt-cells = <2>; 2456cb7aa33aSEmmanuel Vadot }; 2457cb7aa33aSEmmanuel Vadot 2458cb7aa33aSEmmanuel Vadot gpio4: gpio@fec50000 { 2459cb7aa33aSEmmanuel Vadot compatible = "rockchip,gpio-bank"; 2460cb7aa33aSEmmanuel Vadot reg = <0x0 0xfec50000 0x0 0x100>; 2461cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH 0>; 2462cb7aa33aSEmmanuel Vadot clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; 2463cb7aa33aSEmmanuel Vadot gpio-controller; 2464cb7aa33aSEmmanuel Vadot gpio-ranges = <&pinctrl 0 128 32>; 2465cb7aa33aSEmmanuel Vadot interrupt-controller; 2466cb7aa33aSEmmanuel Vadot #gpio-cells = <2>; 2467cb7aa33aSEmmanuel Vadot #interrupt-cells = <2>; 2468cb7aa33aSEmmanuel Vadot }; 2469cb7aa33aSEmmanuel Vadot }; 247084943d6fSEmmanuel Vadot 247184943d6fSEmmanuel Vadot av1d: video-codec@fdc70000 { 247284943d6fSEmmanuel Vadot compatible = "rockchip,rk3588-av1-vpu"; 247384943d6fSEmmanuel Vadot reg = <0x0 0xfdc70000 0x0 0x800>; 247484943d6fSEmmanuel Vadot interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>; 247584943d6fSEmmanuel Vadot interrupt-names = "vdpu"; 247684943d6fSEmmanuel Vadot assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; 247784943d6fSEmmanuel Vadot assigned-clock-rates = <400000000>, <400000000>; 247884943d6fSEmmanuel Vadot clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; 247984943d6fSEmmanuel Vadot clock-names = "aclk", "hclk"; 248084943d6fSEmmanuel Vadot power-domains = <&power RK3588_PD_AV1>; 248184943d6fSEmmanuel Vadot resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>; 248284943d6fSEmmanuel Vadot }; 2483cb7aa33aSEmmanuel Vadot}; 2484cb7aa33aSEmmanuel Vadot 2485cb7aa33aSEmmanuel Vadot#include "rk3588s-pinctrl.dtsi" 2486