16be33864SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 26be33864SEmmanuel Vadot/* 36be33864SEmmanuel Vadot * Device Tree Source for J7200 SoC Family MCU/WAKEUP Domain peripherals 46be33864SEmmanuel Vadot * 55def4c47SEmmanuel Vadot * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 66be33864SEmmanuel Vadot */ 76be33864SEmmanuel Vadot 86be33864SEmmanuel Vadot&cbass_mcu_wakeup { 92eb4d8dcSEmmanuel Vadot dmsc: system-controller@44083000 { 106be33864SEmmanuel Vadot compatible = "ti,k2g-sci"; 116be33864SEmmanuel Vadot ti,host-id = <12>; 126be33864SEmmanuel Vadot 136be33864SEmmanuel Vadot mbox-names = "rx", "tx"; 146be33864SEmmanuel Vadot 156be33864SEmmanuel Vadot mboxes = <&secure_proxy_main 11>, 166be33864SEmmanuel Vadot <&secure_proxy_main 13>; 176be33864SEmmanuel Vadot 186be33864SEmmanuel Vadot reg-names = "debug_messages"; 196be33864SEmmanuel Vadot reg = <0x00 0x44083000 0x00 0x1000>; 206be33864SEmmanuel Vadot 216be33864SEmmanuel Vadot k3_pds: power-controller { 226be33864SEmmanuel Vadot compatible = "ti,sci-pm-domain"; 236be33864SEmmanuel Vadot #power-domain-cells = <2>; 246be33864SEmmanuel Vadot }; 256be33864SEmmanuel Vadot 262eb4d8dcSEmmanuel Vadot k3_clks: clock-controller { 276be33864SEmmanuel Vadot compatible = "ti,k2g-sci-clk"; 286be33864SEmmanuel Vadot #clock-cells = <2>; 296be33864SEmmanuel Vadot }; 306be33864SEmmanuel Vadot 316be33864SEmmanuel Vadot k3_reset: reset-controller { 326be33864SEmmanuel Vadot compatible = "ti,sci-reset"; 336be33864SEmmanuel Vadot #reset-cells = <2>; 346be33864SEmmanuel Vadot }; 356be33864SEmmanuel Vadot }; 366be33864SEmmanuel Vadot 37f126890aSEmmanuel Vadot mcu_timer0: timer@40400000 { 38f126890aSEmmanuel Vadot status = "reserved"; 39f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 40f126890aSEmmanuel Vadot reg = <0x00 0x40400000 0x00 0x400>; 41f126890aSEmmanuel Vadot interrupts = <GIC_SPI 816 IRQ_TYPE_LEVEL_HIGH>; 42f126890aSEmmanuel Vadot clocks = <&k3_clks 35 1>; 43f126890aSEmmanuel Vadot clock-names = "fck"; 44f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 35 1>; 45f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 35 2>; 46f126890aSEmmanuel Vadot power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; 47f126890aSEmmanuel Vadot ti,timer-pwm; 48f126890aSEmmanuel Vadot }; 49f126890aSEmmanuel Vadot 50f126890aSEmmanuel Vadot mcu_timer1: timer@40410000 { 51f126890aSEmmanuel Vadot status = "reserved"; 52f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 53f126890aSEmmanuel Vadot reg = <0x00 0x40410000 0x00 0x400>; 54f126890aSEmmanuel Vadot interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>; 55f126890aSEmmanuel Vadot clocks = <&k3_clks 71 1>; 56f126890aSEmmanuel Vadot clock-names = "fck"; 57f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 71 1>, <&k3_clks 308 0>; 58f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 71 2>, <&k3_clks 308 1>; 59f126890aSEmmanuel Vadot power-domains = <&k3_pds 71 TI_SCI_PD_EXCLUSIVE>; 60f126890aSEmmanuel Vadot ti,timer-pwm; 61f126890aSEmmanuel Vadot }; 62f126890aSEmmanuel Vadot 63f126890aSEmmanuel Vadot mcu_timer2: timer@40420000 { 64f126890aSEmmanuel Vadot status = "reserved"; 65f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 66f126890aSEmmanuel Vadot reg = <0x00 0x40420000 0x00 0x400>; 67f126890aSEmmanuel Vadot interrupts = <GIC_SPI 818 IRQ_TYPE_LEVEL_HIGH>; 68f126890aSEmmanuel Vadot clocks = <&k3_clks 72 1>; 69f126890aSEmmanuel Vadot clock-names = "fck"; 70f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 72 1>; 71f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 72 2>; 72f126890aSEmmanuel Vadot power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>; 73f126890aSEmmanuel Vadot ti,timer-pwm; 74f126890aSEmmanuel Vadot }; 75f126890aSEmmanuel Vadot 76f126890aSEmmanuel Vadot mcu_timer3: timer@40430000 { 77f126890aSEmmanuel Vadot status = "reserved"; 78f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 79f126890aSEmmanuel Vadot reg = <0x00 0x40430000 0x00 0x400>; 80f126890aSEmmanuel Vadot interrupts = <GIC_SPI 819 IRQ_TYPE_LEVEL_HIGH>; 81f126890aSEmmanuel Vadot clocks = <&k3_clks 73 1>; 82f126890aSEmmanuel Vadot clock-names = "fck"; 83f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 73 1>, <&k3_clks 309 0>; 84f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 73 2>, <&k3_clks 309 1>; 85f126890aSEmmanuel Vadot power-domains = <&k3_pds 73 TI_SCI_PD_EXCLUSIVE>; 86f126890aSEmmanuel Vadot ti,timer-pwm; 87f126890aSEmmanuel Vadot }; 88f126890aSEmmanuel Vadot 89f126890aSEmmanuel Vadot mcu_timer4: timer@40440000 { 90f126890aSEmmanuel Vadot status = "reserved"; 91f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 92f126890aSEmmanuel Vadot reg = <0x00 0x40440000 0x00 0x400>; 93f126890aSEmmanuel Vadot interrupts = <GIC_SPI 820 IRQ_TYPE_LEVEL_HIGH>; 94f126890aSEmmanuel Vadot clocks = <&k3_clks 74 1>; 95f126890aSEmmanuel Vadot clock-names = "fck"; 96f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 74 1>; 97f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 74 2>; 98f126890aSEmmanuel Vadot power-domains = <&k3_pds 74 TI_SCI_PD_EXCLUSIVE>; 99f126890aSEmmanuel Vadot ti,timer-pwm; 100f126890aSEmmanuel Vadot }; 101f126890aSEmmanuel Vadot 102f126890aSEmmanuel Vadot mcu_timer5: timer@40450000 { 103f126890aSEmmanuel Vadot status = "reserved"; 104f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 105f126890aSEmmanuel Vadot reg = <0x00 0x40450000 0x00 0x400>; 106f126890aSEmmanuel Vadot interrupts = <GIC_SPI 821 IRQ_TYPE_LEVEL_HIGH>; 107f126890aSEmmanuel Vadot clocks = <&k3_clks 75 1>; 108f126890aSEmmanuel Vadot clock-names = "fck"; 109f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 75 1>, <&k3_clks 310 0>; 110f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 75 2>, <&k3_clks 310 1>; 111f126890aSEmmanuel Vadot power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>; 112f126890aSEmmanuel Vadot ti,timer-pwm; 113f126890aSEmmanuel Vadot }; 114f126890aSEmmanuel Vadot 115f126890aSEmmanuel Vadot mcu_timer6: timer@40460000 { 116f126890aSEmmanuel Vadot status = "reserved"; 117f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 118f126890aSEmmanuel Vadot reg = <0x00 0x40460000 0x00 0x400>; 119f126890aSEmmanuel Vadot interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH>; 120f126890aSEmmanuel Vadot clocks = <&k3_clks 76 1>; 121f126890aSEmmanuel Vadot clock-names = "fck"; 122f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 76 1>; 123f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 76 2>; 124f126890aSEmmanuel Vadot power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; 125f126890aSEmmanuel Vadot ti,timer-pwm; 126f126890aSEmmanuel Vadot }; 127f126890aSEmmanuel Vadot 128f126890aSEmmanuel Vadot mcu_timer7: timer@40470000 { 129f126890aSEmmanuel Vadot status = "reserved"; 130f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 131f126890aSEmmanuel Vadot reg = <0x00 0x40470000 0x00 0x400>; 132f126890aSEmmanuel Vadot interrupts = <GIC_SPI 823 IRQ_TYPE_LEVEL_HIGH>; 133f126890aSEmmanuel Vadot clocks = <&k3_clks 77 1>; 134f126890aSEmmanuel Vadot clock-names = "fck"; 135f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 77 1>, <&k3_clks 311 0>; 136f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 77 2>, <&k3_clks 311 1>; 137f126890aSEmmanuel Vadot power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>; 138f126890aSEmmanuel Vadot ti,timer-pwm; 139f126890aSEmmanuel Vadot }; 140f126890aSEmmanuel Vadot 141f126890aSEmmanuel Vadot mcu_timer8: timer@40480000 { 142f126890aSEmmanuel Vadot status = "reserved"; 143f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 144f126890aSEmmanuel Vadot reg = <0x00 0x40480000 0x00 0x400>; 145f126890aSEmmanuel Vadot interrupts = <GIC_SPI 824 IRQ_TYPE_LEVEL_HIGH>; 146f126890aSEmmanuel Vadot clocks = <&k3_clks 78 1>; 147f126890aSEmmanuel Vadot clock-names = "fck"; 148f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 78 1>; 149f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 78 2>; 150f126890aSEmmanuel Vadot power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>; 151f126890aSEmmanuel Vadot ti,timer-pwm; 152f126890aSEmmanuel Vadot }; 153f126890aSEmmanuel Vadot 154f126890aSEmmanuel Vadot mcu_timer9: timer@40490000 { 155f126890aSEmmanuel Vadot status = "reserved"; 156f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 157f126890aSEmmanuel Vadot reg = <0x00 0x40490000 0x00 0x400>; 158f126890aSEmmanuel Vadot interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH>; 159f126890aSEmmanuel Vadot clocks = <&k3_clks 79 1>; 160f126890aSEmmanuel Vadot clock-names = "fck"; 161f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 79 1>, <&k3_clks 312 0>; 162f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 79 2>, <&k3_clks 312 1>; 163f126890aSEmmanuel Vadot power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>; 164f126890aSEmmanuel Vadot ti,timer-pwm; 165f126890aSEmmanuel Vadot }; 166f126890aSEmmanuel Vadot 1676be33864SEmmanuel Vadot mcu_conf: syscon@40f00000 { 1686be33864SEmmanuel Vadot compatible = "syscon", "simple-mfd"; 1696be33864SEmmanuel Vadot reg = <0x00 0x40f00000 0x00 0x20000>; 1706be33864SEmmanuel Vadot #address-cells = <1>; 1716be33864SEmmanuel Vadot #size-cells = <1>; 1726be33864SEmmanuel Vadot ranges = <0x00 0x00 0x40f00000 0x20000>; 1736be33864SEmmanuel Vadot 1746be33864SEmmanuel Vadot phy_gmii_sel: phy@4040 { 1756be33864SEmmanuel Vadot compatible = "ti,am654-phy-gmii-sel"; 1766be33864SEmmanuel Vadot reg = <0x4040 0x4>; 1776be33864SEmmanuel Vadot #phy-cells = <1>; 1786be33864SEmmanuel Vadot }; 1796be33864SEmmanuel Vadot }; 1806be33864SEmmanuel Vadot 181*8d13bc63SEmmanuel Vadot wkup_conf: bus@43000000 { 182*8d13bc63SEmmanuel Vadot compatible = "simple-bus"; 183*8d13bc63SEmmanuel Vadot #address-cells = <1>; 184*8d13bc63SEmmanuel Vadot #size-cells = <1>; 185*8d13bc63SEmmanuel Vadot ranges = <0x0 0x00 0x43000000 0x20000>; 186*8d13bc63SEmmanuel Vadot 187*8d13bc63SEmmanuel Vadot chipid: chipid@14 { 1886be33864SEmmanuel Vadot compatible = "ti,am654-chipid"; 189*8d13bc63SEmmanuel Vadot reg = <0x14 0x4>; 190*8d13bc63SEmmanuel Vadot }; 1916be33864SEmmanuel Vadot }; 1926be33864SEmmanuel Vadot 193f126890aSEmmanuel Vadot /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */ 194f126890aSEmmanuel Vadot mcu_timerio_input: pinctrl@40f04200 { 195f126890aSEmmanuel Vadot compatible = "pinctrl-single"; 196f126890aSEmmanuel Vadot reg = <0x0 0x40f04200 0x0 0x28>; 197f126890aSEmmanuel Vadot #pinctrl-cells = <1>; 198f126890aSEmmanuel Vadot pinctrl-single,register-width = <32>; 199f126890aSEmmanuel Vadot pinctrl-single,function-mask = <0x0000000F>; 200f126890aSEmmanuel Vadot status = "reserved"; 201f126890aSEmmanuel Vadot }; 202f126890aSEmmanuel Vadot 203f126890aSEmmanuel Vadot /* MCU_TIMERIO pad output CTRLMMR_MCU_TIMERIO*_CTRL registers */ 204f126890aSEmmanuel Vadot mcu_timerio_output: pinctrl@40f04280 { 205f126890aSEmmanuel Vadot compatible = "pinctrl-single"; 206f126890aSEmmanuel Vadot reg = <0x0 0x40f04280 0x0 0x28>; 207f126890aSEmmanuel Vadot #pinctrl-cells = <1>; 208f126890aSEmmanuel Vadot pinctrl-single,register-width = <32>; 209f126890aSEmmanuel Vadot pinctrl-single,function-mask = <0x0000000F>; 210f126890aSEmmanuel Vadot status = "reserved"; 211f126890aSEmmanuel Vadot }; 212f126890aSEmmanuel Vadot 2136be33864SEmmanuel Vadot wkup_pmx0: pinctrl@4301c000 { 2146be33864SEmmanuel Vadot compatible = "pinctrl-single"; 2156be33864SEmmanuel Vadot /* Proxy 0 addressing */ 216cb7aa33aSEmmanuel Vadot reg = <0x00 0x4301c000 0x00 0x34>; 217cb7aa33aSEmmanuel Vadot #pinctrl-cells = <1>; 218cb7aa33aSEmmanuel Vadot pinctrl-single,register-width = <32>; 219cb7aa33aSEmmanuel Vadot pinctrl-single,function-mask = <0xffffffff>; 220cb7aa33aSEmmanuel Vadot }; 221cb7aa33aSEmmanuel Vadot 222f126890aSEmmanuel Vadot wkup_pmx1: pinctrl@4301c038 { 223cb7aa33aSEmmanuel Vadot compatible = "pinctrl-single"; 224cb7aa33aSEmmanuel Vadot /* Proxy 0 addressing */ 225cb7aa33aSEmmanuel Vadot reg = <0x00 0x4301c038 0x00 0x8>; 226cb7aa33aSEmmanuel Vadot #pinctrl-cells = <1>; 227cb7aa33aSEmmanuel Vadot pinctrl-single,register-width = <32>; 228cb7aa33aSEmmanuel Vadot pinctrl-single,function-mask = <0xffffffff>; 229cb7aa33aSEmmanuel Vadot }; 230cb7aa33aSEmmanuel Vadot 231f126890aSEmmanuel Vadot wkup_pmx2: pinctrl@4301c068 { 232cb7aa33aSEmmanuel Vadot compatible = "pinctrl-single"; 233cb7aa33aSEmmanuel Vadot /* Proxy 0 addressing */ 234cb7aa33aSEmmanuel Vadot reg = <0x00 0x4301c068 0x00 0xec>; 235cb7aa33aSEmmanuel Vadot #pinctrl-cells = <1>; 236cb7aa33aSEmmanuel Vadot pinctrl-single,register-width = <32>; 237cb7aa33aSEmmanuel Vadot pinctrl-single,function-mask = <0xffffffff>; 238cb7aa33aSEmmanuel Vadot }; 239cb7aa33aSEmmanuel Vadot 240f126890aSEmmanuel Vadot wkup_pmx3: pinctrl@4301c174 { 241cb7aa33aSEmmanuel Vadot compatible = "pinctrl-single"; 242cb7aa33aSEmmanuel Vadot /* Proxy 0 addressing */ 243cb7aa33aSEmmanuel Vadot reg = <0x00 0x4301c174 0x00 0x20>; 2446be33864SEmmanuel Vadot #pinctrl-cells = <1>; 2456be33864SEmmanuel Vadot pinctrl-single,register-width = <32>; 2466be33864SEmmanuel Vadot pinctrl-single,function-mask = <0xffffffff>; 2476be33864SEmmanuel Vadot }; 2486be33864SEmmanuel Vadot 2496be33864SEmmanuel Vadot mcu_ram: sram@41c00000 { 2506be33864SEmmanuel Vadot compatible = "mmio-sram"; 2516be33864SEmmanuel Vadot reg = <0x00 0x41c00000 0x00 0x100000>; 2526be33864SEmmanuel Vadot ranges = <0x00 0x00 0x41c00000 0x100000>; 2536be33864SEmmanuel Vadot #address-cells = <1>; 2546be33864SEmmanuel Vadot #size-cells = <1>; 2556be33864SEmmanuel Vadot }; 2566be33864SEmmanuel Vadot 2576be33864SEmmanuel Vadot wkup_uart0: serial@42300000 { 2586be33864SEmmanuel Vadot compatible = "ti,j721e-uart", "ti,am654-uart"; 2596be33864SEmmanuel Vadot reg = <0x00 0x42300000 0x00 0x100>; 2606be33864SEmmanuel Vadot interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>; 2616be33864SEmmanuel Vadot clock-frequency = <48000000>; 2626be33864SEmmanuel Vadot current-speed = <115200>; 2636be33864SEmmanuel Vadot power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>; 2646be33864SEmmanuel Vadot clocks = <&k3_clks 287 2>; 2656be33864SEmmanuel Vadot clock-names = "fclk"; 2668bab661aSEmmanuel Vadot status = "disabled"; 2676be33864SEmmanuel Vadot }; 2686be33864SEmmanuel Vadot 2696be33864SEmmanuel Vadot mcu_uart0: serial@40a00000 { 2706be33864SEmmanuel Vadot compatible = "ti,j721e-uart", "ti,am654-uart"; 2716be33864SEmmanuel Vadot reg = <0x00 0x40a00000 0x00 0x100>; 2726be33864SEmmanuel Vadot interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>; 2736be33864SEmmanuel Vadot clock-frequency = <96000000>; 2746be33864SEmmanuel Vadot current-speed = <115200>; 2756be33864SEmmanuel Vadot power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; 2766be33864SEmmanuel Vadot clocks = <&k3_clks 149 2>; 2776be33864SEmmanuel Vadot clock-names = "fclk"; 2788bab661aSEmmanuel Vadot status = "disabled"; 2796be33864SEmmanuel Vadot }; 2806be33864SEmmanuel Vadot 2812eb4d8dcSEmmanuel Vadot wkup_gpio_intr: interrupt-controller@42200000 { 2826be33864SEmmanuel Vadot compatible = "ti,sci-intr"; 2832eb4d8dcSEmmanuel Vadot reg = <0x00 0x42200000 0x00 0x400>; 2846be33864SEmmanuel Vadot ti,intr-trigger-type = <1>; 2856be33864SEmmanuel Vadot interrupt-controller; 2866be33864SEmmanuel Vadot interrupt-parent = <&gic500>; 2876be33864SEmmanuel Vadot #interrupt-cells = <1>; 2886be33864SEmmanuel Vadot ti,sci = <&dmsc>; 2896be33864SEmmanuel Vadot ti,sci-dev-id = <137>; 2906be33864SEmmanuel Vadot ti,interrupt-ranges = <16 960 16>; 2916be33864SEmmanuel Vadot }; 2926be33864SEmmanuel Vadot 2932eb4d8dcSEmmanuel Vadot wkup_gpio0: gpio@42110000 { 2942eb4d8dcSEmmanuel Vadot compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 2952eb4d8dcSEmmanuel Vadot reg = <0x00 0x42110000 0x00 0x100>; 2962eb4d8dcSEmmanuel Vadot gpio-controller; 2972eb4d8dcSEmmanuel Vadot #gpio-cells = <2>; 2982eb4d8dcSEmmanuel Vadot interrupt-parent = <&wkup_gpio_intr>; 2992eb4d8dcSEmmanuel Vadot interrupts = <103>, <104>, <105>, <106>, <107>, <108>; 3002eb4d8dcSEmmanuel Vadot interrupt-controller; 3012eb4d8dcSEmmanuel Vadot #interrupt-cells = <2>; 3022eb4d8dcSEmmanuel Vadot ti,ngpio = <85>; 3032eb4d8dcSEmmanuel Vadot ti,davinci-gpio-unbanked = <0>; 3042eb4d8dcSEmmanuel Vadot power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>; 3052eb4d8dcSEmmanuel Vadot clocks = <&k3_clks 113 0>; 3062eb4d8dcSEmmanuel Vadot clock-names = "gpio"; 307aa1a8ff2SEmmanuel Vadot status = "disabled"; 3082eb4d8dcSEmmanuel Vadot }; 3092eb4d8dcSEmmanuel Vadot 3102eb4d8dcSEmmanuel Vadot wkup_gpio1: gpio@42100000 { 3112eb4d8dcSEmmanuel Vadot compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 3122eb4d8dcSEmmanuel Vadot reg = <0x00 0x42100000 0x00 0x100>; 3132eb4d8dcSEmmanuel Vadot gpio-controller; 3142eb4d8dcSEmmanuel Vadot #gpio-cells = <2>; 3152eb4d8dcSEmmanuel Vadot interrupt-parent = <&wkup_gpio_intr>; 3162eb4d8dcSEmmanuel Vadot interrupts = <112>, <113>, <114>, <115>, <116>, <117>; 3172eb4d8dcSEmmanuel Vadot interrupt-controller; 3182eb4d8dcSEmmanuel Vadot #interrupt-cells = <2>; 3192eb4d8dcSEmmanuel Vadot ti,ngpio = <85>; 3202eb4d8dcSEmmanuel Vadot ti,davinci-gpio-unbanked = <0>; 3212eb4d8dcSEmmanuel Vadot power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; 3222eb4d8dcSEmmanuel Vadot clocks = <&k3_clks 114 0>; 3232eb4d8dcSEmmanuel Vadot clock-names = "gpio"; 324aa1a8ff2SEmmanuel Vadot status = "disabled"; 3252eb4d8dcSEmmanuel Vadot }; 3262eb4d8dcSEmmanuel Vadot 3276be33864SEmmanuel Vadot mcu_navss: bus@28380000 { 32884943d6fSEmmanuel Vadot compatible = "simple-bus"; 3296be33864SEmmanuel Vadot #address-cells = <2>; 3306be33864SEmmanuel Vadot #size-cells = <2>; 3316be33864SEmmanuel Vadot ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>; 3326be33864SEmmanuel Vadot dma-coherent; 3336be33864SEmmanuel Vadot dma-ranges; 3346be33864SEmmanuel Vadot ti,sci-dev-id = <232>; 3356be33864SEmmanuel Vadot 3366be33864SEmmanuel Vadot mcu_ringacc: ringacc@2b800000 { 3376be33864SEmmanuel Vadot compatible = "ti,am654-navss-ringacc"; 3386be33864SEmmanuel Vadot reg = <0x00 0x2b800000 0x00 0x400000>, 3396be33864SEmmanuel Vadot <0x00 0x2b000000 0x00 0x400000>, 3406be33864SEmmanuel Vadot <0x00 0x28590000 0x00 0x100>, 341aa1a8ff2SEmmanuel Vadot <0x00 0x2a500000 0x00 0x40000>, 342aa1a8ff2SEmmanuel Vadot <0x00 0x28440000 0x00 0x40000>; 343aa1a8ff2SEmmanuel Vadot reg-names = "rt", "fifos", "proxy_gcfg", 344aa1a8ff2SEmmanuel Vadot "proxy_target", "cfg"; 3456be33864SEmmanuel Vadot ti,num-rings = <286>; 3466be33864SEmmanuel Vadot ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ 3476be33864SEmmanuel Vadot ti,sci = <&dmsc>; 3486be33864SEmmanuel Vadot ti,sci-dev-id = <235>; 3496be33864SEmmanuel Vadot msi-parent = <&main_udmass_inta>; 3506be33864SEmmanuel Vadot }; 3516be33864SEmmanuel Vadot 3526be33864SEmmanuel Vadot mcu_udmap: dma-controller@285c0000 { 3536be33864SEmmanuel Vadot compatible = "ti,j721e-navss-mcu-udmap"; 3546be33864SEmmanuel Vadot reg = <0x00 0x285c0000 0x00 0x100>, 3556be33864SEmmanuel Vadot <0x00 0x2a800000 0x00 0x40000>, 356*8d13bc63SEmmanuel Vadot <0x00 0x2aa00000 0x00 0x40000>, 357*8d13bc63SEmmanuel Vadot <0x00 0x284a0000 0x00 0x4000>, 358*8d13bc63SEmmanuel Vadot <0x00 0x284c0000 0x00 0x4000>, 359*8d13bc63SEmmanuel Vadot <0x00 0x28400000 0x00 0x2000>; 360*8d13bc63SEmmanuel Vadot reg-names = "gcfg", "rchanrt", "tchanrt", 361*8d13bc63SEmmanuel Vadot "tchan", "rchan", "rflow"; 3626be33864SEmmanuel Vadot msi-parent = <&main_udmass_inta>; 3636be33864SEmmanuel Vadot #dma-cells = <1>; 3646be33864SEmmanuel Vadot 3656be33864SEmmanuel Vadot ti,sci = <&dmsc>; 3666be33864SEmmanuel Vadot ti,sci-dev-id = <236>; 3676be33864SEmmanuel Vadot ti,ringacc = <&mcu_ringacc>; 3686be33864SEmmanuel Vadot 3696be33864SEmmanuel Vadot ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */ 3706be33864SEmmanuel Vadot <0x0f>; /* TX_HCHAN */ 3716be33864SEmmanuel Vadot ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */ 3726be33864SEmmanuel Vadot <0x0b>; /* RX_HCHAN */ 3736be33864SEmmanuel Vadot ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */ 3746be33864SEmmanuel Vadot }; 3756be33864SEmmanuel Vadot }; 3766be33864SEmmanuel Vadot 377f126890aSEmmanuel Vadot secure_proxy_mcu: mailbox@2a480000 { 378f126890aSEmmanuel Vadot compatible = "ti,am654-secure-proxy"; 379f126890aSEmmanuel Vadot #mbox-cells = <1>; 380f126890aSEmmanuel Vadot reg-names = "target_data", "rt", "scfg"; 381f126890aSEmmanuel Vadot reg = <0x0 0x2a480000 0x0 0x80000>, 382f126890aSEmmanuel Vadot <0x0 0x2a380000 0x0 0x80000>, 383f126890aSEmmanuel Vadot <0x0 0x2a400000 0x0 0x80000>; 384f126890aSEmmanuel Vadot /* 385f126890aSEmmanuel Vadot * Marked Disabled: 386f126890aSEmmanuel Vadot * Node is incomplete as it is meant for bootloaders and 387f126890aSEmmanuel Vadot * firmware on non-MPU processors 388f126890aSEmmanuel Vadot */ 389f126890aSEmmanuel Vadot status = "disabled"; 390f126890aSEmmanuel Vadot }; 391f126890aSEmmanuel Vadot 3926be33864SEmmanuel Vadot mcu_cpsw: ethernet@46000000 { 3936be33864SEmmanuel Vadot compatible = "ti,j721e-cpsw-nuss"; 3946be33864SEmmanuel Vadot #address-cells = <2>; 3956be33864SEmmanuel Vadot #size-cells = <2>; 3966be33864SEmmanuel Vadot reg = <0x00 0x46000000 0x00 0x200000>; 3976be33864SEmmanuel Vadot reg-names = "cpsw_nuss"; 3986be33864SEmmanuel Vadot ranges = <0x00 0x00 0x00 0x46000000 0x00 0x200000>; 3996be33864SEmmanuel Vadot dma-coherent; 4006be33864SEmmanuel Vadot clocks = <&k3_clks 18 21>; 4016be33864SEmmanuel Vadot clock-names = "fck"; 4026be33864SEmmanuel Vadot power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>; 4036be33864SEmmanuel Vadot 4046be33864SEmmanuel Vadot dmas = <&mcu_udmap 0xf000>, 4056be33864SEmmanuel Vadot <&mcu_udmap 0xf001>, 4066be33864SEmmanuel Vadot <&mcu_udmap 0xf002>, 4076be33864SEmmanuel Vadot <&mcu_udmap 0xf003>, 4086be33864SEmmanuel Vadot <&mcu_udmap 0xf004>, 4096be33864SEmmanuel Vadot <&mcu_udmap 0xf005>, 4106be33864SEmmanuel Vadot <&mcu_udmap 0xf006>, 4116be33864SEmmanuel Vadot <&mcu_udmap 0xf007>, 4126be33864SEmmanuel Vadot <&mcu_udmap 0x7000>; 4136be33864SEmmanuel Vadot dma-names = "tx0", "tx1", "tx2", "tx3", 4146be33864SEmmanuel Vadot "tx4", "tx5", "tx6", "tx7", 4156be33864SEmmanuel Vadot "rx"; 4166be33864SEmmanuel Vadot 4176be33864SEmmanuel Vadot ethernet-ports { 4186be33864SEmmanuel Vadot #address-cells = <1>; 4196be33864SEmmanuel Vadot #size-cells = <0>; 4206be33864SEmmanuel Vadot 4216be33864SEmmanuel Vadot cpsw_port1: port@1 { 4226be33864SEmmanuel Vadot reg = <1>; 4236be33864SEmmanuel Vadot ti,mac-only; 4246be33864SEmmanuel Vadot label = "port1"; 4256be33864SEmmanuel Vadot ti,syscon-efuse = <&mcu_conf 0x200>; 4266be33864SEmmanuel Vadot phys = <&phy_gmii_sel 1>; 4276be33864SEmmanuel Vadot }; 4286be33864SEmmanuel Vadot }; 4296be33864SEmmanuel Vadot 4306be33864SEmmanuel Vadot davinci_mdio: mdio@f00 { 4316be33864SEmmanuel Vadot compatible = "ti,cpsw-mdio","ti,davinci_mdio"; 4326be33864SEmmanuel Vadot reg = <0x00 0xf00 0x00 0x100>; 4336be33864SEmmanuel Vadot #address-cells = <1>; 4346be33864SEmmanuel Vadot #size-cells = <0>; 4356be33864SEmmanuel Vadot clocks = <&k3_clks 18 21>; 4366be33864SEmmanuel Vadot clock-names = "fck"; 4376be33864SEmmanuel Vadot bus_freq = <1000000>; 4386be33864SEmmanuel Vadot }; 4396be33864SEmmanuel Vadot 4406be33864SEmmanuel Vadot cpts@3d000 { 4416be33864SEmmanuel Vadot compatible = "ti,am65-cpts"; 4426be33864SEmmanuel Vadot reg = <0x00 0x3d000 0x00 0x400>; 4436be33864SEmmanuel Vadot clocks = <&k3_clks 18 2>; 4446be33864SEmmanuel Vadot clock-names = "cpts"; 4456be33864SEmmanuel Vadot interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>; 4466be33864SEmmanuel Vadot interrupt-names = "cpts"; 4476be33864SEmmanuel Vadot ti,cpts-ext-ts-inputs = <4>; 4486be33864SEmmanuel Vadot ti,cpts-periodic-outputs = <2>; 4496be33864SEmmanuel Vadot }; 4506be33864SEmmanuel Vadot }; 4516be33864SEmmanuel Vadot 4526be33864SEmmanuel Vadot mcu_i2c0: i2c@40b00000 { 4536be33864SEmmanuel Vadot compatible = "ti,j721e-i2c", "ti,omap4-i2c"; 4546be33864SEmmanuel Vadot reg = <0x00 0x40b00000 0x00 0x100>; 4556be33864SEmmanuel Vadot interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; 4566be33864SEmmanuel Vadot #address-cells = <1>; 4576be33864SEmmanuel Vadot #size-cells = <0>; 4586be33864SEmmanuel Vadot clock-names = "fck"; 4596be33864SEmmanuel Vadot clocks = <&k3_clks 194 1>; 4606be33864SEmmanuel Vadot power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>; 4618bab661aSEmmanuel Vadot status = "disabled"; 4626be33864SEmmanuel Vadot }; 4636be33864SEmmanuel Vadot 4646be33864SEmmanuel Vadot mcu_i2c1: i2c@40b10000 { 4656be33864SEmmanuel Vadot compatible = "ti,j721e-i2c", "ti,omap4-i2c"; 4666be33864SEmmanuel Vadot reg = <0x00 0x40b10000 0x00 0x100>; 4676be33864SEmmanuel Vadot interrupts = <GIC_SPI 853 IRQ_TYPE_LEVEL_HIGH>; 4686be33864SEmmanuel Vadot #address-cells = <1>; 4696be33864SEmmanuel Vadot #size-cells = <0>; 4706be33864SEmmanuel Vadot clock-names = "fck"; 4716be33864SEmmanuel Vadot clocks = <&k3_clks 195 1>; 4726be33864SEmmanuel Vadot power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>; 4738bab661aSEmmanuel Vadot status = "disabled"; 4746be33864SEmmanuel Vadot }; 4756be33864SEmmanuel Vadot 4766be33864SEmmanuel Vadot wkup_i2c0: i2c@42120000 { 4776be33864SEmmanuel Vadot compatible = "ti,j721e-i2c", "ti,omap4-i2c"; 4786be33864SEmmanuel Vadot reg = <0x00 0x42120000 0x00 0x100>; 4796be33864SEmmanuel Vadot interrupts = <GIC_SPI 896 IRQ_TYPE_LEVEL_HIGH>; 4806be33864SEmmanuel Vadot #address-cells = <1>; 4816be33864SEmmanuel Vadot #size-cells = <0>; 4826be33864SEmmanuel Vadot clock-names = "fck"; 4836be33864SEmmanuel Vadot clocks = <&k3_clks 197 1>; 4846be33864SEmmanuel Vadot power-domains = <&k3_pds 197 TI_SCI_PD_SHARED>; 4858bab661aSEmmanuel Vadot status = "disabled"; 4866be33864SEmmanuel Vadot }; 4876be33864SEmmanuel Vadot 488fac71e4eSEmmanuel Vadot mcu_spi0: spi@40300000 { 489fac71e4eSEmmanuel Vadot compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; 490fac71e4eSEmmanuel Vadot reg = <0x00 0x040300000 0x00 0x400>; 491fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; 492fac71e4eSEmmanuel Vadot #address-cells = <1>; 493fac71e4eSEmmanuel Vadot #size-cells = <0>; 494fac71e4eSEmmanuel Vadot power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>; 495fac71e4eSEmmanuel Vadot clocks = <&k3_clks 274 0>; 496fac71e4eSEmmanuel Vadot status = "disabled"; 497fac71e4eSEmmanuel Vadot }; 498fac71e4eSEmmanuel Vadot 499fac71e4eSEmmanuel Vadot mcu_spi1: spi@40310000 { 500fac71e4eSEmmanuel Vadot compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; 501fac71e4eSEmmanuel Vadot reg = <0x00 0x040310000 0x00 0x400>; 502fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>; 503fac71e4eSEmmanuel Vadot #address-cells = <1>; 504fac71e4eSEmmanuel Vadot #size-cells = <0>; 505fac71e4eSEmmanuel Vadot power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>; 506fac71e4eSEmmanuel Vadot clocks = <&k3_clks 275 0>; 507fac71e4eSEmmanuel Vadot status = "disabled"; 508fac71e4eSEmmanuel Vadot }; 509fac71e4eSEmmanuel Vadot 510fac71e4eSEmmanuel Vadot mcu_spi2: spi@40320000 { 511fac71e4eSEmmanuel Vadot compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; 512fac71e4eSEmmanuel Vadot reg = <0x00 0x040320000 0x00 0x400>; 513fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 850 IRQ_TYPE_LEVEL_HIGH>; 514fac71e4eSEmmanuel Vadot #address-cells = <1>; 515fac71e4eSEmmanuel Vadot #size-cells = <0>; 516fac71e4eSEmmanuel Vadot power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>; 517fac71e4eSEmmanuel Vadot clocks = <&k3_clks 276 0>; 518fac71e4eSEmmanuel Vadot status = "disabled"; 519fac71e4eSEmmanuel Vadot }; 520fac71e4eSEmmanuel Vadot 5216be33864SEmmanuel Vadot fss: syscon@47000000 { 5226be33864SEmmanuel Vadot compatible = "syscon", "simple-mfd"; 5236be33864SEmmanuel Vadot reg = <0x00 0x47000000 0x00 0x100>; 5246be33864SEmmanuel Vadot #address-cells = <2>; 5256be33864SEmmanuel Vadot #size-cells = <2>; 5266be33864SEmmanuel Vadot ranges; 5276be33864SEmmanuel Vadot 5286be33864SEmmanuel Vadot hbmc_mux: hbmc-mux { 5296be33864SEmmanuel Vadot compatible = "mmio-mux"; 5306be33864SEmmanuel Vadot #mux-control-cells = <1>; 5316be33864SEmmanuel Vadot mux-reg-masks = <0x4 0x2>; /* HBMC select */ 5326be33864SEmmanuel Vadot }; 5336be33864SEmmanuel Vadot 5346be33864SEmmanuel Vadot hbmc: hyperbus@47034000 { 5356be33864SEmmanuel Vadot compatible = "ti,am654-hbmc"; 5366be33864SEmmanuel Vadot reg = <0x00 0x47034000 0x00 0x100>, 5376be33864SEmmanuel Vadot <0x05 0x00000000 0x01 0x0000000>; 5386be33864SEmmanuel Vadot power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>; 5396be33864SEmmanuel Vadot clocks = <&k3_clks 102 0>; 5406be33864SEmmanuel Vadot assigned-clocks = <&k3_clks 102 5>; 5416be33864SEmmanuel Vadot assigned-clock-rates = <333333333>; 5426be33864SEmmanuel Vadot #address-cells = <2>; 5436be33864SEmmanuel Vadot #size-cells = <1>; 5446be33864SEmmanuel Vadot mux-controls = <&hbmc_mux 0>; 5456be33864SEmmanuel Vadot }; 5462eb4d8dcSEmmanuel Vadot 5472eb4d8dcSEmmanuel Vadot ospi0: spi@47040000 { 5482eb4d8dcSEmmanuel Vadot compatible = "ti,am654-ospi", "cdns,qspi-nor"; 5492eb4d8dcSEmmanuel Vadot reg = <0x0 0x47040000 0x0 0x100>, 5502eb4d8dcSEmmanuel Vadot <0x5 0x00000000 0x1 0x0000000>; 5512eb4d8dcSEmmanuel Vadot interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; 5522eb4d8dcSEmmanuel Vadot cdns,fifo-depth = <256>; 5532eb4d8dcSEmmanuel Vadot cdns,fifo-width = <4>; 5542eb4d8dcSEmmanuel Vadot cdns,trigger-address = <0x0>; 5552eb4d8dcSEmmanuel Vadot clocks = <&k3_clks 103 0>; 5562eb4d8dcSEmmanuel Vadot assigned-clocks = <&k3_clks 103 0>; 5572eb4d8dcSEmmanuel Vadot assigned-clock-parents = <&k3_clks 103 2>; 5582eb4d8dcSEmmanuel Vadot assigned-clock-rates = <166666666>; 5592eb4d8dcSEmmanuel Vadot power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; 5602eb4d8dcSEmmanuel Vadot #address-cells = <1>; 5612eb4d8dcSEmmanuel Vadot #size-cells = <0>; 562aa1a8ff2SEmmanuel Vadot status = "disabled"; 5632eb4d8dcSEmmanuel Vadot }; 5646be33864SEmmanuel Vadot }; 5655def4c47SEmmanuel Vadot 5665def4c47SEmmanuel Vadot tscadc0: tscadc@40200000 { 5675def4c47SEmmanuel Vadot compatible = "ti,am3359-tscadc"; 5685def4c47SEmmanuel Vadot reg = <0x00 0x40200000 0x00 0x1000>; 5695def4c47SEmmanuel Vadot interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; 5705def4c47SEmmanuel Vadot power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>; 5715def4c47SEmmanuel Vadot clocks = <&k3_clks 0 1>; 5725def4c47SEmmanuel Vadot assigned-clocks = <&k3_clks 0 3>; 5735def4c47SEmmanuel Vadot assigned-clock-rates = <60000000>; 5748bab661aSEmmanuel Vadot clock-names = "fck"; 5755def4c47SEmmanuel Vadot dmas = <&main_udmap 0x7400>, 5765def4c47SEmmanuel Vadot <&main_udmap 0x7401>; 5775def4c47SEmmanuel Vadot dma-names = "fifo0", "fifo1"; 5785def4c47SEmmanuel Vadot 5795def4c47SEmmanuel Vadot adc { 5805def4c47SEmmanuel Vadot #io-channel-cells = <1>; 5815def4c47SEmmanuel Vadot compatible = "ti,am3359-adc"; 5825def4c47SEmmanuel Vadot }; 5835def4c47SEmmanuel Vadot }; 5845def4c47SEmmanuel Vadot 5855def4c47SEmmanuel Vadot mcu_r5fss0: r5fss@41000000 { 5865def4c47SEmmanuel Vadot compatible = "ti,j7200-r5fss"; 5875def4c47SEmmanuel Vadot ti,cluster-mode = <1>; 5885def4c47SEmmanuel Vadot #address-cells = <1>; 5895def4c47SEmmanuel Vadot #size-cells = <1>; 5905def4c47SEmmanuel Vadot ranges = <0x41000000 0x00 0x41000000 0x20000>, 5915def4c47SEmmanuel Vadot <0x41400000 0x00 0x41400000 0x20000>; 5925def4c47SEmmanuel Vadot power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; 5935def4c47SEmmanuel Vadot 5945def4c47SEmmanuel Vadot mcu_r5fss0_core0: r5f@41000000 { 5955def4c47SEmmanuel Vadot compatible = "ti,j7200-r5f"; 5965def4c47SEmmanuel Vadot reg = <0x41000000 0x00010000>, 5975def4c47SEmmanuel Vadot <0x41010000 0x00010000>; 5985def4c47SEmmanuel Vadot reg-names = "atcm", "btcm"; 5995def4c47SEmmanuel Vadot ti,sci = <&dmsc>; 6005def4c47SEmmanuel Vadot ti,sci-dev-id = <250>; 6015def4c47SEmmanuel Vadot ti,sci-proc-ids = <0x01 0xff>; 6025def4c47SEmmanuel Vadot resets = <&k3_reset 250 1>; 6035def4c47SEmmanuel Vadot firmware-name = "j7200-mcu-r5f0_0-fw"; 6045def4c47SEmmanuel Vadot ti,atcm-enable = <1>; 6055def4c47SEmmanuel Vadot ti,btcm-enable = <1>; 6065def4c47SEmmanuel Vadot ti,loczrama = <1>; 6075def4c47SEmmanuel Vadot }; 6085def4c47SEmmanuel Vadot 6095def4c47SEmmanuel Vadot mcu_r5fss0_core1: r5f@41400000 { 6105def4c47SEmmanuel Vadot compatible = "ti,j7200-r5f"; 6115def4c47SEmmanuel Vadot reg = <0x41400000 0x00008000>, 6125def4c47SEmmanuel Vadot <0x41410000 0x00008000>; 6135def4c47SEmmanuel Vadot reg-names = "atcm", "btcm"; 6145def4c47SEmmanuel Vadot ti,sci = <&dmsc>; 6155def4c47SEmmanuel Vadot ti,sci-dev-id = <251>; 6165def4c47SEmmanuel Vadot ti,sci-proc-ids = <0x02 0xff>; 6175def4c47SEmmanuel Vadot resets = <&k3_reset 251 1>; 6185def4c47SEmmanuel Vadot firmware-name = "j7200-mcu-r5f0_1-fw"; 6195def4c47SEmmanuel Vadot ti,atcm-enable = <1>; 6205def4c47SEmmanuel Vadot ti,btcm-enable = <1>; 6215def4c47SEmmanuel Vadot ti,loczrama = <1>; 6225def4c47SEmmanuel Vadot }; 6235def4c47SEmmanuel Vadot }; 6247ef62cebSEmmanuel Vadot 6257ef62cebSEmmanuel Vadot mcu_crypto: crypto@40900000 { 6267ef62cebSEmmanuel Vadot compatible = "ti,j721e-sa2ul"; 6277ef62cebSEmmanuel Vadot reg = <0x00 0x40900000 0x00 0x1200>; 6287ef62cebSEmmanuel Vadot power-domains = <&k3_pds 265 TI_SCI_PD_SHARED>; 6297ef62cebSEmmanuel Vadot #address-cells = <2>; 6307ef62cebSEmmanuel Vadot #size-cells = <2>; 6317ef62cebSEmmanuel Vadot ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>; 6327ef62cebSEmmanuel Vadot dmas = <&mcu_udmap 0xf501>, <&mcu_udmap 0x7502>, 6337ef62cebSEmmanuel Vadot <&mcu_udmap 0x7503>; 6347ef62cebSEmmanuel Vadot dma-names = "tx", "rx1", "rx2"; 6357ef62cebSEmmanuel Vadot 6367ef62cebSEmmanuel Vadot rng: rng@40910000 { 6377ef62cebSEmmanuel Vadot compatible = "inside-secure,safexcel-eip76"; 6387ef62cebSEmmanuel Vadot reg = <0x00 0x40910000 0x00 0x7d>; 6397ef62cebSEmmanuel Vadot interrupts = <GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH>; 6407ef62cebSEmmanuel Vadot status = "disabled"; /* Used by OP-TEE */ 6417ef62cebSEmmanuel Vadot }; 6427ef62cebSEmmanuel Vadot }; 643f126890aSEmmanuel Vadot 644f126890aSEmmanuel Vadot wkup_vtm0: temperature-sensor@42040000 { 645f126890aSEmmanuel Vadot compatible = "ti,j7200-vtm"; 646f126890aSEmmanuel Vadot reg = <0x00 0x42040000 0x00 0x350>, 647f126890aSEmmanuel Vadot <0x00 0x42050000 0x00 0x350>; 648f126890aSEmmanuel Vadot power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; 649f126890aSEmmanuel Vadot #thermal-sensor-cells = <1>; 650f126890aSEmmanuel Vadot }; 65184943d6fSEmmanuel Vadot 65284943d6fSEmmanuel Vadot mcu_esm: esm@40800000 { 65384943d6fSEmmanuel Vadot compatible = "ti,j721e-esm"; 65484943d6fSEmmanuel Vadot reg = <0x00 0x40800000 0x00 0x1000>; 65584943d6fSEmmanuel Vadot ti,esm-pins = <95>; 65684943d6fSEmmanuel Vadot bootph-pre-ram; 65784943d6fSEmmanuel Vadot }; 6586be33864SEmmanuel Vadot}; 659