1e67e8565SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2e67e8565SEmmanuel Vadot/* 3e67e8565SEmmanuel Vadot * Device Tree Source for J721S2 SoC Family MCU/WAKEUP Domain peripherals 4e67e8565SEmmanuel Vadot * 5e67e8565SEmmanuel Vadot * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 6e67e8565SEmmanuel Vadot */ 7e67e8565SEmmanuel Vadot 8e67e8565SEmmanuel Vadot&cbass_mcu_wakeup { 9e67e8565SEmmanuel Vadot sms: system-controller@44083000 { 10e67e8565SEmmanuel Vadot compatible = "ti,k2g-sci"; 11e67e8565SEmmanuel Vadot ti,host-id = <12>; 12e67e8565SEmmanuel Vadot 13e67e8565SEmmanuel Vadot mbox-names = "rx", "tx"; 14e67e8565SEmmanuel Vadot 15e67e8565SEmmanuel Vadot mboxes = <&secure_proxy_main 11>, 16e67e8565SEmmanuel Vadot <&secure_proxy_main 13>; 17e67e8565SEmmanuel Vadot 18e67e8565SEmmanuel Vadot reg-names = "debug_messages"; 19e67e8565SEmmanuel Vadot reg = <0x00 0x44083000 0x00 0x1000>; 20e67e8565SEmmanuel Vadot 21e67e8565SEmmanuel Vadot k3_pds: power-controller { 22e67e8565SEmmanuel Vadot compatible = "ti,sci-pm-domain"; 23e67e8565SEmmanuel Vadot #power-domain-cells = <2>; 24e67e8565SEmmanuel Vadot }; 25e67e8565SEmmanuel Vadot 26e67e8565SEmmanuel Vadot k3_clks: clock-controller { 27e67e8565SEmmanuel Vadot compatible = "ti,k2g-sci-clk"; 28e67e8565SEmmanuel Vadot #clock-cells = <2>; 29e67e8565SEmmanuel Vadot }; 30e67e8565SEmmanuel Vadot 31e67e8565SEmmanuel Vadot k3_reset: reset-controller { 32e67e8565SEmmanuel Vadot compatible = "ti,sci-reset"; 33e67e8565SEmmanuel Vadot #reset-cells = <2>; 34e67e8565SEmmanuel Vadot }; 35e67e8565SEmmanuel Vadot }; 36e67e8565SEmmanuel Vadot 37*8d13bc63SEmmanuel Vadot wkup_conf: bus@43000000 { 38*8d13bc63SEmmanuel Vadot compatible = "simple-bus"; 39*8d13bc63SEmmanuel Vadot #address-cells = <1>; 40*8d13bc63SEmmanuel Vadot #size-cells = <1>; 41*8d13bc63SEmmanuel Vadot ranges = <0x0 0x00 0x43000000 0x20000>; 42*8d13bc63SEmmanuel Vadot 43*8d13bc63SEmmanuel Vadot chipid: chipid@14 { 44e67e8565SEmmanuel Vadot compatible = "ti,am654-chipid"; 45*8d13bc63SEmmanuel Vadot reg = <0x14 0x4>; 46*8d13bc63SEmmanuel Vadot }; 47e67e8565SEmmanuel Vadot }; 48e67e8565SEmmanuel Vadot 49f126890aSEmmanuel Vadot secure_proxy_sa3: mailbox@43600000 { 50f126890aSEmmanuel Vadot compatible = "ti,am654-secure-proxy"; 51f126890aSEmmanuel Vadot #mbox-cells = <1>; 52f126890aSEmmanuel Vadot reg-names = "target_data", "rt", "scfg"; 53f126890aSEmmanuel Vadot reg = <0x00 0x43600000 0x00 0x10000>, 54f126890aSEmmanuel Vadot <0x00 0x44880000 0x00 0x20000>, 55f126890aSEmmanuel Vadot <0x00 0x44860000 0x00 0x20000>; 56f126890aSEmmanuel Vadot /* 57f126890aSEmmanuel Vadot * Marked Disabled: 58f126890aSEmmanuel Vadot * Node is incomplete as it is meant for bootloaders and 59f126890aSEmmanuel Vadot * firmware on non-MPU processors 60f126890aSEmmanuel Vadot */ 61f126890aSEmmanuel Vadot status = "disabled"; 62f126890aSEmmanuel Vadot }; 63f126890aSEmmanuel Vadot 64e67e8565SEmmanuel Vadot mcu_ram: sram@41c00000 { 65e67e8565SEmmanuel Vadot compatible = "mmio-sram"; 66e67e8565SEmmanuel Vadot reg = <0x00 0x41c00000 0x00 0x100000>; 67e67e8565SEmmanuel Vadot ranges = <0x00 0x00 0x41c00000 0x100000>; 68e67e8565SEmmanuel Vadot #address-cells = <1>; 69e67e8565SEmmanuel Vadot #size-cells = <1>; 70e67e8565SEmmanuel Vadot }; 71e67e8565SEmmanuel Vadot 72e67e8565SEmmanuel Vadot wkup_pmx0: pinctrl@4301c000 { 73e67e8565SEmmanuel Vadot compatible = "pinctrl-single"; 74e67e8565SEmmanuel Vadot /* Proxy 0 addressing */ 75f126890aSEmmanuel Vadot reg = <0x00 0x4301c000 0x00 0x034>; 76e67e8565SEmmanuel Vadot #pinctrl-cells = <1>; 77e67e8565SEmmanuel Vadot pinctrl-single,register-width = <32>; 78e67e8565SEmmanuel Vadot pinctrl-single,function-mask = <0xffffffff>; 79e67e8565SEmmanuel Vadot }; 80e67e8565SEmmanuel Vadot 81f126890aSEmmanuel Vadot wkup_pmx1: pinctrl@4301c038 { 82f126890aSEmmanuel Vadot compatible = "pinctrl-single"; 83f126890aSEmmanuel Vadot /* Proxy 0 addressing */ 84f126890aSEmmanuel Vadot reg = <0x00 0x4301c038 0x00 0x02C>; 85f126890aSEmmanuel Vadot #pinctrl-cells = <1>; 86f126890aSEmmanuel Vadot pinctrl-single,register-width = <32>; 87f126890aSEmmanuel Vadot pinctrl-single,function-mask = <0xffffffff>; 88f126890aSEmmanuel Vadot }; 89f126890aSEmmanuel Vadot 90f126890aSEmmanuel Vadot wkup_pmx2: pinctrl@4301c068 { 91f126890aSEmmanuel Vadot compatible = "pinctrl-single"; 92f126890aSEmmanuel Vadot /* Proxy 0 addressing */ 93f126890aSEmmanuel Vadot reg = <0x00 0x4301c068 0x00 0x120>; 94f126890aSEmmanuel Vadot #pinctrl-cells = <1>; 95f126890aSEmmanuel Vadot pinctrl-single,register-width = <32>; 96f126890aSEmmanuel Vadot pinctrl-single,function-mask = <0xffffffff>; 97f126890aSEmmanuel Vadot }; 98f126890aSEmmanuel Vadot 99f126890aSEmmanuel Vadot wkup_pmx3: pinctrl@4301c190 { 100f126890aSEmmanuel Vadot compatible = "pinctrl-single"; 101f126890aSEmmanuel Vadot /* Proxy 0 addressing */ 102f126890aSEmmanuel Vadot reg = <0x00 0x4301c190 0x00 0x004>; 103f126890aSEmmanuel Vadot #pinctrl-cells = <1>; 104f126890aSEmmanuel Vadot pinctrl-single,register-width = <32>; 105f126890aSEmmanuel Vadot pinctrl-single,function-mask = <0xffffffff>; 106f126890aSEmmanuel Vadot }; 107f126890aSEmmanuel Vadot 108f126890aSEmmanuel Vadot /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */ 109f126890aSEmmanuel Vadot mcu_timerio_input: pinctrl@40f04200 { 110f126890aSEmmanuel Vadot compatible = "pinctrl-single"; 111f126890aSEmmanuel Vadot reg = <0x00 0x40f04200 0x00 0x28>; 112f126890aSEmmanuel Vadot #pinctrl-cells = <1>; 113f126890aSEmmanuel Vadot pinctrl-single,register-width = <32>; 114f126890aSEmmanuel Vadot pinctrl-single,function-mask = <0x0000000f>; 115f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 116f126890aSEmmanuel Vadot status = "reserved"; 117f126890aSEmmanuel Vadot }; 118f126890aSEmmanuel Vadot 119f126890aSEmmanuel Vadot /* MCU_TIMERIO pad output CTRLMMR_MCU_TIMERIO*_CTRL registers */ 120f126890aSEmmanuel Vadot mcu_timerio_output: pinctrl@40f04280 { 121f126890aSEmmanuel Vadot compatible = "pinctrl-single"; 122f126890aSEmmanuel Vadot reg = <0x00 0x40f04280 0x00 0x28>; 123f126890aSEmmanuel Vadot #pinctrl-cells = <1>; 124f126890aSEmmanuel Vadot pinctrl-single,register-width = <32>; 125f126890aSEmmanuel Vadot pinctrl-single,function-mask = <0x0000000f>; 126f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 127f126890aSEmmanuel Vadot status = "reserved"; 128f126890aSEmmanuel Vadot }; 129f126890aSEmmanuel Vadot 130e67e8565SEmmanuel Vadot wkup_gpio_intr: interrupt-controller@42200000 { 131e67e8565SEmmanuel Vadot compatible = "ti,sci-intr"; 132e67e8565SEmmanuel Vadot reg = <0x00 0x42200000 0x00 0x400>; 133e67e8565SEmmanuel Vadot ti,intr-trigger-type = <1>; 134e67e8565SEmmanuel Vadot interrupt-controller; 135e67e8565SEmmanuel Vadot interrupt-parent = <&gic500>; 136e67e8565SEmmanuel Vadot #interrupt-cells = <1>; 137e67e8565SEmmanuel Vadot ti,sci = <&sms>; 138e67e8565SEmmanuel Vadot ti,sci-dev-id = <125>; 1398bab661aSEmmanuel Vadot ti,interrupt-ranges = <16 960 16>; 140e67e8565SEmmanuel Vadot }; 141e67e8565SEmmanuel Vadot 142e67e8565SEmmanuel Vadot mcu_conf: syscon@40f00000 { 143e67e8565SEmmanuel Vadot compatible = "syscon", "simple-mfd"; 144e67e8565SEmmanuel Vadot reg = <0x0 0x40f00000 0x0 0x20000>; 145e67e8565SEmmanuel Vadot #address-cells = <1>; 146e67e8565SEmmanuel Vadot #size-cells = <1>; 147e67e8565SEmmanuel Vadot ranges = <0x0 0x0 0x40f00000 0x20000>; 148e67e8565SEmmanuel Vadot 149e67e8565SEmmanuel Vadot phy_gmii_sel: phy@4040 { 150e67e8565SEmmanuel Vadot compatible = "ti,am654-phy-gmii-sel"; 151e67e8565SEmmanuel Vadot reg = <0x4040 0x4>; 152e67e8565SEmmanuel Vadot #phy-cells = <1>; 153e67e8565SEmmanuel Vadot }; 154e67e8565SEmmanuel Vadot 155e67e8565SEmmanuel Vadot }; 156e67e8565SEmmanuel Vadot 157f126890aSEmmanuel Vadot mcu_timer0: timer@40400000 { 158f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 159f126890aSEmmanuel Vadot reg = <0x00 0x40400000 0x00 0x400>; 160f126890aSEmmanuel Vadot interrupts = <GIC_SPI 816 IRQ_TYPE_LEVEL_HIGH>; 161f126890aSEmmanuel Vadot clocks = <&k3_clks 35 1>; 162f126890aSEmmanuel Vadot clock-names = "fck"; 163f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 35 1>; 164f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 35 2>; 165f126890aSEmmanuel Vadot power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; 166f126890aSEmmanuel Vadot ti,timer-pwm; 167f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 168f126890aSEmmanuel Vadot status = "reserved"; 169f126890aSEmmanuel Vadot }; 170f126890aSEmmanuel Vadot 171f126890aSEmmanuel Vadot mcu_timer1: timer@40410000 { 172f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 173f126890aSEmmanuel Vadot reg = <0x00 0x40410000 0x00 0x400>; 174f126890aSEmmanuel Vadot interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>; 175f126890aSEmmanuel Vadot clocks = <&k3_clks 83 1>; 176f126890aSEmmanuel Vadot clock-names = "fck"; 177f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 83 1>; 178f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 83 2>; 179f126890aSEmmanuel Vadot power-domains = <&k3_pds 83 TI_SCI_PD_EXCLUSIVE>; 180f126890aSEmmanuel Vadot ti,timer-pwm; 181f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 182f126890aSEmmanuel Vadot status = "reserved"; 183f126890aSEmmanuel Vadot }; 184f126890aSEmmanuel Vadot 185f126890aSEmmanuel Vadot mcu_timer2: timer@40420000 { 186f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 187f126890aSEmmanuel Vadot reg = <0x00 0x40420000 0x00 0x400>; 188f126890aSEmmanuel Vadot interrupts = <GIC_SPI 818 IRQ_TYPE_LEVEL_HIGH>; 189f126890aSEmmanuel Vadot clocks = <&k3_clks 84 1>; 190f126890aSEmmanuel Vadot clock-names = "fck"; 191f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 84 1>; 192f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 84 2>; 193f126890aSEmmanuel Vadot power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>; 194f126890aSEmmanuel Vadot ti,timer-pwm; 195f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 196f126890aSEmmanuel Vadot status = "reserved"; 197f126890aSEmmanuel Vadot }; 198f126890aSEmmanuel Vadot 199f126890aSEmmanuel Vadot mcu_timer3: timer@40430000 { 200f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 201f126890aSEmmanuel Vadot reg = <0x00 0x40430000 0x00 0x400>; 202f126890aSEmmanuel Vadot interrupts = <GIC_SPI 819 IRQ_TYPE_LEVEL_HIGH>; 203f126890aSEmmanuel Vadot clocks = <&k3_clks 85 1>; 204f126890aSEmmanuel Vadot clock-names = "fck"; 205f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 85 1>; 206f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 85 2>; 207f126890aSEmmanuel Vadot power-domains = <&k3_pds 85 TI_SCI_PD_EXCLUSIVE>; 208f126890aSEmmanuel Vadot ti,timer-pwm; 209f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 210f126890aSEmmanuel Vadot status = "reserved"; 211f126890aSEmmanuel Vadot }; 212f126890aSEmmanuel Vadot 213f126890aSEmmanuel Vadot mcu_timer4: timer@40440000 { 214f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 215f126890aSEmmanuel Vadot reg = <0x00 0x40440000 0x00 0x400>; 216f126890aSEmmanuel Vadot interrupts = <GIC_SPI 820 IRQ_TYPE_LEVEL_HIGH>; 217f126890aSEmmanuel Vadot clocks = <&k3_clks 86 1>; 218f126890aSEmmanuel Vadot clock-names = "fck"; 219f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 86 1>; 220f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 86 2>; 221f126890aSEmmanuel Vadot power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>; 222f126890aSEmmanuel Vadot ti,timer-pwm; 223f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 224f126890aSEmmanuel Vadot status = "reserved"; 225f126890aSEmmanuel Vadot }; 226f126890aSEmmanuel Vadot 227f126890aSEmmanuel Vadot mcu_timer5: timer@40450000 { 228f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 229f126890aSEmmanuel Vadot reg = <0x00 0x40450000 0x00 0x400>; 230f126890aSEmmanuel Vadot interrupts = <GIC_SPI 821 IRQ_TYPE_LEVEL_HIGH>; 231f126890aSEmmanuel Vadot clocks = <&k3_clks 87 1>; 232f126890aSEmmanuel Vadot clock-names = "fck"; 233f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 87 1>; 234f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 87 2>; 235f126890aSEmmanuel Vadot power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>; 236f126890aSEmmanuel Vadot ti,timer-pwm; 237f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 238f126890aSEmmanuel Vadot status = "reserved"; 239f126890aSEmmanuel Vadot }; 240f126890aSEmmanuel Vadot 241f126890aSEmmanuel Vadot mcu_timer6: timer@40460000 { 242f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 243f126890aSEmmanuel Vadot reg = <0x00 0x40460000 0x00 0x400>; 244f126890aSEmmanuel Vadot interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH>; 245f126890aSEmmanuel Vadot clocks = <&k3_clks 88 1>; 246f126890aSEmmanuel Vadot clock-names = "fck"; 247f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 88 1>; 248f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 88 2>; 249f126890aSEmmanuel Vadot power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>; 250f126890aSEmmanuel Vadot ti,timer-pwm; 251f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 252f126890aSEmmanuel Vadot status = "reserved"; 253f126890aSEmmanuel Vadot }; 254f126890aSEmmanuel Vadot 255f126890aSEmmanuel Vadot mcu_timer7: timer@40470000 { 256f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 257f126890aSEmmanuel Vadot reg = <0x00 0x40470000 0x00 0x400>; 258f126890aSEmmanuel Vadot interrupts = <GIC_SPI 823 IRQ_TYPE_LEVEL_HIGH>; 259f126890aSEmmanuel Vadot clocks = <&k3_clks 89 1>; 260f126890aSEmmanuel Vadot clock-names = "fck"; 261f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 89 1>; 262f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 89 2>; 263f126890aSEmmanuel Vadot power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>; 264f126890aSEmmanuel Vadot ti,timer-pwm; 265f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 266f126890aSEmmanuel Vadot status = "reserved"; 267f126890aSEmmanuel Vadot }; 268f126890aSEmmanuel Vadot 269f126890aSEmmanuel Vadot mcu_timer8: timer@40480000 { 270f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 271f126890aSEmmanuel Vadot reg = <0x00 0x40480000 0x00 0x400>; 272f126890aSEmmanuel Vadot interrupts = <GIC_SPI 824 IRQ_TYPE_LEVEL_HIGH>; 273f126890aSEmmanuel Vadot clocks = <&k3_clks 90 1>; 274f126890aSEmmanuel Vadot clock-names = "fck"; 275f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 90 1>; 276f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 90 2>; 277f126890aSEmmanuel Vadot power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>; 278f126890aSEmmanuel Vadot ti,timer-pwm; 279f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 280f126890aSEmmanuel Vadot status = "reserved"; 281f126890aSEmmanuel Vadot }; 282f126890aSEmmanuel Vadot 283f126890aSEmmanuel Vadot mcu_timer9: timer@40490000 { 284f126890aSEmmanuel Vadot compatible = "ti,am654-timer"; 285f126890aSEmmanuel Vadot reg = <0x00 0x40490000 0x00 0x400>; 286f126890aSEmmanuel Vadot interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH>; 287f126890aSEmmanuel Vadot clocks = <&k3_clks 91 1>; 288f126890aSEmmanuel Vadot clock-names = "fck"; 289f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 91 1>; 290f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 91 2>; 291f126890aSEmmanuel Vadot power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>; 292f126890aSEmmanuel Vadot ti,timer-pwm; 293f126890aSEmmanuel Vadot /* Non-MPU Firmware usage */ 294f126890aSEmmanuel Vadot status = "reserved"; 295f126890aSEmmanuel Vadot }; 296f126890aSEmmanuel Vadot 297e67e8565SEmmanuel Vadot wkup_uart0: serial@42300000 { 298e67e8565SEmmanuel Vadot compatible = "ti,j721e-uart", "ti,am654-uart"; 299e67e8565SEmmanuel Vadot reg = <0x00 0x42300000 0x00 0x200>; 300e67e8565SEmmanuel Vadot interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>; 301e67e8565SEmmanuel Vadot current-speed = <115200>; 302e67e8565SEmmanuel Vadot clocks = <&k3_clks 359 3>; 303e67e8565SEmmanuel Vadot clock-names = "fclk"; 304e67e8565SEmmanuel Vadot power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>; 3058bab661aSEmmanuel Vadot status = "disabled"; 306e67e8565SEmmanuel Vadot }; 307e67e8565SEmmanuel Vadot 308e67e8565SEmmanuel Vadot mcu_uart0: serial@40a00000 { 309e67e8565SEmmanuel Vadot compatible = "ti,j721e-uart", "ti,am654-uart"; 310e67e8565SEmmanuel Vadot reg = <0x00 0x40a00000 0x00 0x200>; 311e67e8565SEmmanuel Vadot interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>; 312e67e8565SEmmanuel Vadot current-speed = <115200>; 313e67e8565SEmmanuel Vadot clocks = <&k3_clks 149 3>; 314e67e8565SEmmanuel Vadot clock-names = "fclk"; 315e67e8565SEmmanuel Vadot power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; 3168bab661aSEmmanuel Vadot status = "disabled"; 317e67e8565SEmmanuel Vadot }; 318e67e8565SEmmanuel Vadot 319e67e8565SEmmanuel Vadot wkup_gpio0: gpio@42110000 { 320e67e8565SEmmanuel Vadot compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 321e67e8565SEmmanuel Vadot reg = <0x00 0x42110000 0x00 0x100>; 322e67e8565SEmmanuel Vadot gpio-controller; 323e67e8565SEmmanuel Vadot #gpio-cells = <2>; 324c9ccf3a3SEmmanuel Vadot interrupt-parent = <&wkup_gpio_intr>; 325e67e8565SEmmanuel Vadot interrupts = <103>, <104>, <105>, <106>, <107>, <108>; 326e67e8565SEmmanuel Vadot interrupt-controller; 327e67e8565SEmmanuel Vadot #interrupt-cells = <2>; 328e67e8565SEmmanuel Vadot ti,ngpio = <89>; 329e67e8565SEmmanuel Vadot ti,davinci-gpio-unbanked = <0>; 330e67e8565SEmmanuel Vadot power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>; 331e67e8565SEmmanuel Vadot clocks = <&k3_clks 115 0>; 332e67e8565SEmmanuel Vadot clock-names = "gpio"; 333aa1a8ff2SEmmanuel Vadot status = "disabled"; 334e67e8565SEmmanuel Vadot }; 335e67e8565SEmmanuel Vadot 336e67e8565SEmmanuel Vadot wkup_gpio1: gpio@42100000 { 337e67e8565SEmmanuel Vadot compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 338e67e8565SEmmanuel Vadot reg = <0x00 0x42100000 0x00 0x100>; 339e67e8565SEmmanuel Vadot gpio-controller; 340e67e8565SEmmanuel Vadot #gpio-cells = <2>; 341c9ccf3a3SEmmanuel Vadot interrupt-parent = <&wkup_gpio_intr>; 342e67e8565SEmmanuel Vadot interrupts = <112>, <113>, <114>, <115>, <116>, <117>; 343e67e8565SEmmanuel Vadot interrupt-controller; 344e67e8565SEmmanuel Vadot #interrupt-cells = <2>; 345e67e8565SEmmanuel Vadot ti,ngpio = <89>; 346e67e8565SEmmanuel Vadot ti,davinci-gpio-unbanked = <0>; 347e67e8565SEmmanuel Vadot power-domains = <&k3_pds 116 TI_SCI_PD_EXCLUSIVE>; 348e67e8565SEmmanuel Vadot clocks = <&k3_clks 116 0>; 349e67e8565SEmmanuel Vadot clock-names = "gpio"; 350aa1a8ff2SEmmanuel Vadot status = "disabled"; 351e67e8565SEmmanuel Vadot }; 352e67e8565SEmmanuel Vadot 353e67e8565SEmmanuel Vadot wkup_i2c0: i2c@42120000 { 354e67e8565SEmmanuel Vadot compatible = "ti,j721e-i2c", "ti,omap4-i2c"; 355e67e8565SEmmanuel Vadot reg = <0x00 0x42120000 0x00 0x100>; 356e67e8565SEmmanuel Vadot interrupts = <GIC_SPI 896 IRQ_TYPE_LEVEL_HIGH>; 357e67e8565SEmmanuel Vadot #address-cells = <1>; 358e67e8565SEmmanuel Vadot #size-cells = <0>; 359e67e8565SEmmanuel Vadot clocks = <&k3_clks 223 1>; 360e67e8565SEmmanuel Vadot clock-names = "fck"; 361e67e8565SEmmanuel Vadot power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>; 3628bab661aSEmmanuel Vadot status = "disabled"; 363e67e8565SEmmanuel Vadot }; 364e67e8565SEmmanuel Vadot 365e67e8565SEmmanuel Vadot mcu_i2c0: i2c@40b00000 { 366e67e8565SEmmanuel Vadot compatible = "ti,j721e-i2c", "ti,omap4-i2c"; 367e67e8565SEmmanuel Vadot reg = <0x00 0x40b00000 0x00 0x100>; 368e67e8565SEmmanuel Vadot interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; 369e67e8565SEmmanuel Vadot #address-cells = <1>; 370e67e8565SEmmanuel Vadot #size-cells = <0>; 371e67e8565SEmmanuel Vadot clocks = <&k3_clks 221 1>; 372e67e8565SEmmanuel Vadot clock-names = "fck"; 373e67e8565SEmmanuel Vadot power-domains = <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>; 3748bab661aSEmmanuel Vadot status = "disabled"; 375e67e8565SEmmanuel Vadot }; 376e67e8565SEmmanuel Vadot 377e67e8565SEmmanuel Vadot mcu_i2c1: i2c@40b10000 { 378e67e8565SEmmanuel Vadot compatible = "ti,j721e-i2c", "ti,omap4-i2c"; 379e67e8565SEmmanuel Vadot reg = <0x00 0x40b10000 0x00 0x100>; 380e67e8565SEmmanuel Vadot interrupts = <GIC_SPI 853 IRQ_TYPE_LEVEL_HIGH>; 381e67e8565SEmmanuel Vadot #address-cells = <1>; 382e67e8565SEmmanuel Vadot #size-cells = <0>; 383e67e8565SEmmanuel Vadot clocks = <&k3_clks 222 1>; 384e67e8565SEmmanuel Vadot clock-names = "fck"; 385e67e8565SEmmanuel Vadot power-domains = <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>; 3868bab661aSEmmanuel Vadot status = "disabled"; 387e67e8565SEmmanuel Vadot }; 388e67e8565SEmmanuel Vadot 389e67e8565SEmmanuel Vadot mcu_mcan0: can@40528000 { 390e67e8565SEmmanuel Vadot compatible = "bosch,m_can"; 391e67e8565SEmmanuel Vadot reg = <0x00 0x40528000 0x00 0x200>, 392e67e8565SEmmanuel Vadot <0x00 0x40500000 0x00 0x8000>; 393e67e8565SEmmanuel Vadot reg-names = "m_can", "message_ram"; 394e67e8565SEmmanuel Vadot power-domains = <&k3_pds 207 TI_SCI_PD_EXCLUSIVE>; 395e67e8565SEmmanuel Vadot clocks = <&k3_clks 207 0>, <&k3_clks 207 1>; 396e67e8565SEmmanuel Vadot clock-names = "hclk", "cclk"; 397e67e8565SEmmanuel Vadot interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>, 398e67e8565SEmmanuel Vadot <GIC_SPI 833 IRQ_TYPE_LEVEL_HIGH>; 399e67e8565SEmmanuel Vadot interrupt-names = "int0", "int1"; 400e67e8565SEmmanuel Vadot bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; 4018bab661aSEmmanuel Vadot status = "disabled"; 402e67e8565SEmmanuel Vadot }; 403e67e8565SEmmanuel Vadot 404e67e8565SEmmanuel Vadot mcu_mcan1: can@40568000 { 405e67e8565SEmmanuel Vadot compatible = "bosch,m_can"; 406e67e8565SEmmanuel Vadot reg = <0x00 0x40568000 0x00 0x200>, 407e67e8565SEmmanuel Vadot <0x00 0x40540000 0x00 0x8000>; 408e67e8565SEmmanuel Vadot reg-names = "m_can", "message_ram"; 409e67e8565SEmmanuel Vadot power-domains = <&k3_pds 208 TI_SCI_PD_EXCLUSIVE>; 410e67e8565SEmmanuel Vadot clocks = <&k3_clks 208 0>, <&k3_clks 208 1>; 411e67e8565SEmmanuel Vadot clock-names = "hclk", "cclk"; 412e67e8565SEmmanuel Vadot interrupts = <GIC_SPI 835 IRQ_TYPE_LEVEL_HIGH>, 413e67e8565SEmmanuel Vadot <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>; 414e67e8565SEmmanuel Vadot interrupt-names = "int0", "int1"; 415e67e8565SEmmanuel Vadot bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; 4168bab661aSEmmanuel Vadot status = "disabled"; 417e67e8565SEmmanuel Vadot }; 418e67e8565SEmmanuel Vadot 419fac71e4eSEmmanuel Vadot mcu_spi0: spi@40300000 { 420fac71e4eSEmmanuel Vadot compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; 421fac71e4eSEmmanuel Vadot reg = <0x00 0x040300000 0x00 0x400>; 422fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; 423fac71e4eSEmmanuel Vadot #address-cells = <1>; 424fac71e4eSEmmanuel Vadot #size-cells = <0>; 425fac71e4eSEmmanuel Vadot power-domains = <&k3_pds 347 TI_SCI_PD_EXCLUSIVE>; 426fac71e4eSEmmanuel Vadot clocks = <&k3_clks 347 0>; 427fac71e4eSEmmanuel Vadot status = "disabled"; 428fac71e4eSEmmanuel Vadot }; 429fac71e4eSEmmanuel Vadot 430fac71e4eSEmmanuel Vadot mcu_spi1: spi@40310000 { 431fac71e4eSEmmanuel Vadot compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; 432fac71e4eSEmmanuel Vadot reg = <0x00 0x040310000 0x00 0x400>; 433fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>; 434fac71e4eSEmmanuel Vadot #address-cells = <1>; 435fac71e4eSEmmanuel Vadot #size-cells = <0>; 436fac71e4eSEmmanuel Vadot power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>; 437fac71e4eSEmmanuel Vadot clocks = <&k3_clks 348 0>; 438fac71e4eSEmmanuel Vadot status = "disabled"; 439fac71e4eSEmmanuel Vadot }; 440fac71e4eSEmmanuel Vadot 441fac71e4eSEmmanuel Vadot mcu_spi2: spi@40320000 { 442fac71e4eSEmmanuel Vadot compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; 443fac71e4eSEmmanuel Vadot reg = <0x00 0x040320000 0x00 0x400>; 444fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 850 IRQ_TYPE_LEVEL_HIGH>; 445fac71e4eSEmmanuel Vadot #address-cells = <1>; 446fac71e4eSEmmanuel Vadot #size-cells = <0>; 447fac71e4eSEmmanuel Vadot power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>; 448fac71e4eSEmmanuel Vadot clocks = <&k3_clks 349 0>; 449fac71e4eSEmmanuel Vadot status = "disabled"; 450fac71e4eSEmmanuel Vadot }; 451fac71e4eSEmmanuel Vadot 452e67e8565SEmmanuel Vadot mcu_navss: bus@28380000 { 45384943d6fSEmmanuel Vadot compatible = "simple-bus"; 454e67e8565SEmmanuel Vadot #address-cells = <2>; 455e67e8565SEmmanuel Vadot #size-cells = <2>; 456e67e8565SEmmanuel Vadot ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>; 457e67e8565SEmmanuel Vadot dma-coherent; 458e67e8565SEmmanuel Vadot dma-ranges; 459e67e8565SEmmanuel Vadot 460e67e8565SEmmanuel Vadot ti,sci-dev-id = <267>; 461e67e8565SEmmanuel Vadot 462e67e8565SEmmanuel Vadot mcu_ringacc: ringacc@2b800000 { 463e67e8565SEmmanuel Vadot compatible = "ti,am654-navss-ringacc"; 464e67e8565SEmmanuel Vadot reg = <0x0 0x2b800000 0x0 0x400000>, 465e67e8565SEmmanuel Vadot <0x0 0x2b000000 0x0 0x400000>, 466e67e8565SEmmanuel Vadot <0x0 0x28590000 0x0 0x100>, 467aa1a8ff2SEmmanuel Vadot <0x0 0x2a500000 0x0 0x40000>, 468aa1a8ff2SEmmanuel Vadot <0x0 0x28440000 0x0 0x40000>; 469aa1a8ff2SEmmanuel Vadot reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; 470e67e8565SEmmanuel Vadot ti,num-rings = <286>; 471e67e8565SEmmanuel Vadot ti,sci-rm-range-gp-rings = <0x1>; 472e67e8565SEmmanuel Vadot ti,sci = <&sms>; 473e67e8565SEmmanuel Vadot ti,sci-dev-id = <272>; 474e67e8565SEmmanuel Vadot msi-parent = <&main_udmass_inta>; 475e67e8565SEmmanuel Vadot }; 476e67e8565SEmmanuel Vadot 477e67e8565SEmmanuel Vadot mcu_udmap: dma-controller@285c0000 { 478e67e8565SEmmanuel Vadot compatible = "ti,j721e-navss-mcu-udmap"; 479e67e8565SEmmanuel Vadot reg = <0x0 0x285c0000 0x0 0x100>, 480e67e8565SEmmanuel Vadot <0x0 0x2a800000 0x0 0x40000>, 481*8d13bc63SEmmanuel Vadot <0x0 0x2aa00000 0x0 0x40000>, 482*8d13bc63SEmmanuel Vadot <0x0 0x284a0000 0x0 0x4000>, 483*8d13bc63SEmmanuel Vadot <0x0 0x284c0000 0x0 0x4000>, 484*8d13bc63SEmmanuel Vadot <0x0 0x28400000 0x0 0x2000>; 485*8d13bc63SEmmanuel Vadot reg-names = "gcfg", "rchanrt", "tchanrt", 486*8d13bc63SEmmanuel Vadot "tchan", "rchan", "rflow"; 487e67e8565SEmmanuel Vadot msi-parent = <&main_udmass_inta>; 488e67e8565SEmmanuel Vadot #dma-cells = <1>; 489e67e8565SEmmanuel Vadot 490e67e8565SEmmanuel Vadot ti,sci = <&sms>; 491e67e8565SEmmanuel Vadot ti,sci-dev-id = <273>; 492e67e8565SEmmanuel Vadot ti,ringacc = <&mcu_ringacc>; 493e67e8565SEmmanuel Vadot ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */ 494e67e8565SEmmanuel Vadot <0x0f>; /* TX_HCHAN */ 495e67e8565SEmmanuel Vadot ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */ 496e67e8565SEmmanuel Vadot <0x0b>; /* RX_HCHAN */ 497e67e8565SEmmanuel Vadot ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */ 498e67e8565SEmmanuel Vadot }; 499e67e8565SEmmanuel Vadot }; 500e67e8565SEmmanuel Vadot 501f126890aSEmmanuel Vadot secure_proxy_mcu: mailbox@2a480000 { 502f126890aSEmmanuel Vadot compatible = "ti,am654-secure-proxy"; 503f126890aSEmmanuel Vadot #mbox-cells = <1>; 504f126890aSEmmanuel Vadot reg-names = "target_data", "rt", "scfg"; 505f126890aSEmmanuel Vadot reg = <0x00 0x2a480000 0x00 0x80000>, 506f126890aSEmmanuel Vadot <0x00 0x2a380000 0x00 0x80000>, 507f126890aSEmmanuel Vadot <0x00 0x2a400000 0x00 0x80000>; 508f126890aSEmmanuel Vadot /* 509f126890aSEmmanuel Vadot * Marked Disabled: 510f126890aSEmmanuel Vadot * Node is incomplete as it is meant for bootloaders and 511f126890aSEmmanuel Vadot * firmware on non-MPU processors 512f126890aSEmmanuel Vadot */ 513f126890aSEmmanuel Vadot status = "disabled"; 514f126890aSEmmanuel Vadot }; 515f126890aSEmmanuel Vadot 516e67e8565SEmmanuel Vadot mcu_cpsw: ethernet@46000000 { 517e67e8565SEmmanuel Vadot compatible = "ti,j721e-cpsw-nuss"; 518e67e8565SEmmanuel Vadot #address-cells = <2>; 519e67e8565SEmmanuel Vadot #size-cells = <2>; 520e67e8565SEmmanuel Vadot reg = <0x0 0x46000000 0x0 0x200000>; 521e67e8565SEmmanuel Vadot reg-names = "cpsw_nuss"; 522e67e8565SEmmanuel Vadot ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>; 523e67e8565SEmmanuel Vadot dma-coherent; 524e67e8565SEmmanuel Vadot clocks = <&k3_clks 29 28>; 525e67e8565SEmmanuel Vadot clock-names = "fck"; 526e67e8565SEmmanuel Vadot power-domains = <&k3_pds 29 TI_SCI_PD_EXCLUSIVE>; 527e67e8565SEmmanuel Vadot 528e67e8565SEmmanuel Vadot dmas = <&mcu_udmap 0xf000>, 529e67e8565SEmmanuel Vadot <&mcu_udmap 0xf001>, 530e67e8565SEmmanuel Vadot <&mcu_udmap 0xf002>, 531e67e8565SEmmanuel Vadot <&mcu_udmap 0xf003>, 532e67e8565SEmmanuel Vadot <&mcu_udmap 0xf004>, 533e67e8565SEmmanuel Vadot <&mcu_udmap 0xf005>, 534e67e8565SEmmanuel Vadot <&mcu_udmap 0xf006>, 535e67e8565SEmmanuel Vadot <&mcu_udmap 0xf007>, 536e67e8565SEmmanuel Vadot <&mcu_udmap 0x7000>; 537e67e8565SEmmanuel Vadot dma-names = "tx0", "tx1", "tx2", "tx3", 538e67e8565SEmmanuel Vadot "tx4", "tx5", "tx6", "tx7", 539e67e8565SEmmanuel Vadot "rx"; 540e67e8565SEmmanuel Vadot 541e67e8565SEmmanuel Vadot ethernet-ports { 542e67e8565SEmmanuel Vadot #address-cells = <1>; 543e67e8565SEmmanuel Vadot #size-cells = <0>; 544e67e8565SEmmanuel Vadot 545e67e8565SEmmanuel Vadot cpsw_port1: port@1 { 546e67e8565SEmmanuel Vadot reg = <1>; 547e67e8565SEmmanuel Vadot ti,mac-only; 548e67e8565SEmmanuel Vadot label = "port1"; 549e67e8565SEmmanuel Vadot ti,syscon-efuse = <&mcu_conf 0x200>; 550e67e8565SEmmanuel Vadot phys = <&phy_gmii_sel 1>; 551e67e8565SEmmanuel Vadot }; 552e67e8565SEmmanuel Vadot }; 553e67e8565SEmmanuel Vadot 554e67e8565SEmmanuel Vadot davinci_mdio: mdio@f00 { 555e67e8565SEmmanuel Vadot compatible = "ti,cpsw-mdio","ti,davinci_mdio"; 556e67e8565SEmmanuel Vadot reg = <0x0 0xf00 0x0 0x100>; 557e67e8565SEmmanuel Vadot #address-cells = <1>; 558e67e8565SEmmanuel Vadot #size-cells = <0>; 559e67e8565SEmmanuel Vadot clocks = <&k3_clks 29 28>; 560e67e8565SEmmanuel Vadot clock-names = "fck"; 561e67e8565SEmmanuel Vadot bus_freq = <1000000>; 562e67e8565SEmmanuel Vadot }; 563e67e8565SEmmanuel Vadot 564e67e8565SEmmanuel Vadot cpts@3d000 { 565e67e8565SEmmanuel Vadot compatible = "ti,am65-cpts"; 566e67e8565SEmmanuel Vadot reg = <0x0 0x3d000 0x0 0x400>; 567e67e8565SEmmanuel Vadot clocks = <&k3_clks 29 3>; 568e67e8565SEmmanuel Vadot clock-names = "cpts"; 569f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 29 3>; /* CPTS_RFT_CLK */ 570f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 29 5>; /* MAIN_0_HSDIVOUT6_CLK */ 571e67e8565SEmmanuel Vadot interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>; 572e67e8565SEmmanuel Vadot interrupt-names = "cpts"; 573e67e8565SEmmanuel Vadot ti,cpts-ext-ts-inputs = <4>; 574e67e8565SEmmanuel Vadot ti,cpts-periodic-outputs = <2>; 575e67e8565SEmmanuel Vadot }; 576e67e8565SEmmanuel Vadot }; 577fac71e4eSEmmanuel Vadot 578fac71e4eSEmmanuel Vadot tscadc0: tscadc@40200000 { 579fac71e4eSEmmanuel Vadot compatible = "ti,am3359-tscadc"; 580fac71e4eSEmmanuel Vadot reg = <0x00 0x40200000 0x00 0x1000>; 581fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; 582fac71e4eSEmmanuel Vadot power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>; 583fac71e4eSEmmanuel Vadot clocks = <&k3_clks 0 0>; 584fac71e4eSEmmanuel Vadot assigned-clocks = <&k3_clks 0 2>; 585fac71e4eSEmmanuel Vadot assigned-clock-rates = <60000000>; 586fac71e4eSEmmanuel Vadot clock-names = "fck"; 587fac71e4eSEmmanuel Vadot dmas = <&main_udmap 0x7400>, 588fac71e4eSEmmanuel Vadot <&main_udmap 0x7401>; 589fac71e4eSEmmanuel Vadot dma-names = "fifo0", "fifo1"; 590fac71e4eSEmmanuel Vadot status = "disabled"; 591fac71e4eSEmmanuel Vadot 592fac71e4eSEmmanuel Vadot adc { 593fac71e4eSEmmanuel Vadot #io-channel-cells = <1>; 594fac71e4eSEmmanuel Vadot compatible = "ti,am3359-adc"; 595fac71e4eSEmmanuel Vadot }; 596fac71e4eSEmmanuel Vadot }; 597fac71e4eSEmmanuel Vadot 598fac71e4eSEmmanuel Vadot tscadc1: tscadc@40210000 { 599fac71e4eSEmmanuel Vadot compatible = "ti,am3359-tscadc"; 600fac71e4eSEmmanuel Vadot reg = <0x00 0x40210000 0x00 0x1000>; 601fac71e4eSEmmanuel Vadot interrupts = <GIC_SPI 861 IRQ_TYPE_LEVEL_HIGH>; 602fac71e4eSEmmanuel Vadot power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>; 603fac71e4eSEmmanuel Vadot clocks = <&k3_clks 1 0>; 604fac71e4eSEmmanuel Vadot assigned-clocks = <&k3_clks 1 2>; 605fac71e4eSEmmanuel Vadot assigned-clock-rates = <60000000>; 606fac71e4eSEmmanuel Vadot clock-names = "fck"; 607fac71e4eSEmmanuel Vadot dmas = <&main_udmap 0x7402>, 608fac71e4eSEmmanuel Vadot <&main_udmap 0x7403>; 609fac71e4eSEmmanuel Vadot dma-names = "fifo0", "fifo1"; 610fac71e4eSEmmanuel Vadot status = "disabled"; 611fac71e4eSEmmanuel Vadot 612fac71e4eSEmmanuel Vadot adc { 613fac71e4eSEmmanuel Vadot #io-channel-cells = <1>; 614fac71e4eSEmmanuel Vadot compatible = "ti,am3359-adc"; 615fac71e4eSEmmanuel Vadot }; 616fac71e4eSEmmanuel Vadot }; 617f126890aSEmmanuel Vadot 618f126890aSEmmanuel Vadot fss: bus@47000000 { 619f126890aSEmmanuel Vadot compatible = "simple-bus"; 620f126890aSEmmanuel Vadot #address-cells = <2>; 621f126890aSEmmanuel Vadot #size-cells = <2>; 622f126890aSEmmanuel Vadot ranges = <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, 623f126890aSEmmanuel Vadot <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, 624f126890aSEmmanuel Vadot <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; 625f126890aSEmmanuel Vadot 626f126890aSEmmanuel Vadot ospi0: spi@47040000 { 627f126890aSEmmanuel Vadot compatible = "ti,am654-ospi", "cdns,qspi-nor"; 628f126890aSEmmanuel Vadot reg = <0x00 0x47040000 0x00 0x100>, 629f126890aSEmmanuel Vadot <0x05 0x00000000 0x01 0x00000000>; 630f126890aSEmmanuel Vadot interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; 631f126890aSEmmanuel Vadot cdns,fifo-depth = <256>; 632f126890aSEmmanuel Vadot cdns,fifo-width = <4>; 633f126890aSEmmanuel Vadot cdns,trigger-address = <0x0>; 634f126890aSEmmanuel Vadot clocks = <&k3_clks 109 5>; 635f126890aSEmmanuel Vadot assigned-clocks = <&k3_clks 109 5>; 636f126890aSEmmanuel Vadot assigned-clock-parents = <&k3_clks 109 7>; 637f126890aSEmmanuel Vadot assigned-clock-rates = <166666666>; 638f126890aSEmmanuel Vadot power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>; 639f126890aSEmmanuel Vadot #address-cells = <1>; 640f126890aSEmmanuel Vadot #size-cells = <0>; 641f126890aSEmmanuel Vadot 642f126890aSEmmanuel Vadot status = "disabled"; /* Needs pinmux */ 643f126890aSEmmanuel Vadot }; 644f126890aSEmmanuel Vadot 645f126890aSEmmanuel Vadot ospi1: spi@47050000 { 646f126890aSEmmanuel Vadot compatible = "ti,am654-ospi", "cdns,qspi-nor"; 647f126890aSEmmanuel Vadot reg = <0x00 0x47050000 0x00 0x100>, 648f126890aSEmmanuel Vadot <0x07 0x00000000 0x01 0x00000000>; 649f126890aSEmmanuel Vadot interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>; 650f126890aSEmmanuel Vadot cdns,fifo-depth = <256>; 651f126890aSEmmanuel Vadot cdns,fifo-width = <4>; 652f126890aSEmmanuel Vadot cdns,trigger-address = <0x0>; 653f126890aSEmmanuel Vadot clocks = <&k3_clks 110 5>; 654f126890aSEmmanuel Vadot power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>; 655f126890aSEmmanuel Vadot #address-cells = <1>; 656f126890aSEmmanuel Vadot #size-cells = <0>; 657f126890aSEmmanuel Vadot 658f126890aSEmmanuel Vadot status = "disabled"; /* Needs pinmux */ 659f126890aSEmmanuel Vadot }; 660f126890aSEmmanuel Vadot }; 661f126890aSEmmanuel Vadot 662f126890aSEmmanuel Vadot wkup_vtm0: temperature-sensor@42040000 { 663f126890aSEmmanuel Vadot compatible = "ti,j7200-vtm"; 664f126890aSEmmanuel Vadot reg = <0x00 0x42040000 0x0 0x350>, 665f126890aSEmmanuel Vadot <0x00 0x42050000 0x0 0x350>; 666f126890aSEmmanuel Vadot power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>; 667f126890aSEmmanuel Vadot #thermal-sensor-cells = <1>; 668f126890aSEmmanuel Vadot }; 66984943d6fSEmmanuel Vadot 67084943d6fSEmmanuel Vadot mcu_r5fss0: r5fss@41000000 { 67184943d6fSEmmanuel Vadot compatible = "ti,j721s2-r5fss"; 67284943d6fSEmmanuel Vadot ti,cluster-mode = <1>; 67384943d6fSEmmanuel Vadot #address-cells = <1>; 67484943d6fSEmmanuel Vadot #size-cells = <1>; 67584943d6fSEmmanuel Vadot ranges = <0x41000000 0x00 0x41000000 0x20000>, 67684943d6fSEmmanuel Vadot <0x41400000 0x00 0x41400000 0x20000>; 67784943d6fSEmmanuel Vadot power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; 67884943d6fSEmmanuel Vadot 67984943d6fSEmmanuel Vadot mcu_r5fss0_core0: r5f@41000000 { 68084943d6fSEmmanuel Vadot compatible = "ti,j721s2-r5f"; 68184943d6fSEmmanuel Vadot reg = <0x41000000 0x00010000>, 68284943d6fSEmmanuel Vadot <0x41010000 0x00010000>; 68384943d6fSEmmanuel Vadot reg-names = "atcm", "btcm"; 68484943d6fSEmmanuel Vadot ti,sci = <&sms>; 68584943d6fSEmmanuel Vadot ti,sci-dev-id = <284>; 68684943d6fSEmmanuel Vadot ti,sci-proc-ids = <0x01 0xff>; 68784943d6fSEmmanuel Vadot resets = <&k3_reset 284 1>; 68884943d6fSEmmanuel Vadot firmware-name = "j721s2-mcu-r5f0_0-fw"; 68984943d6fSEmmanuel Vadot ti,atcm-enable = <1>; 69084943d6fSEmmanuel Vadot ti,btcm-enable = <1>; 69184943d6fSEmmanuel Vadot ti,loczrama = <1>; 69284943d6fSEmmanuel Vadot }; 69384943d6fSEmmanuel Vadot 69484943d6fSEmmanuel Vadot mcu_r5fss0_core1: r5f@41400000 { 69584943d6fSEmmanuel Vadot compatible = "ti,j721s2-r5f"; 69684943d6fSEmmanuel Vadot reg = <0x41400000 0x00010000>, 69784943d6fSEmmanuel Vadot <0x41410000 0x00010000>; 69884943d6fSEmmanuel Vadot reg-names = "atcm", "btcm"; 69984943d6fSEmmanuel Vadot ti,sci = <&sms>; 70084943d6fSEmmanuel Vadot ti,sci-dev-id = <285>; 70184943d6fSEmmanuel Vadot ti,sci-proc-ids = <0x02 0xff>; 70284943d6fSEmmanuel Vadot resets = <&k3_reset 285 1>; 70384943d6fSEmmanuel Vadot firmware-name = "j721s2-mcu-r5f0_1-fw"; 70484943d6fSEmmanuel Vadot ti,atcm-enable = <1>; 70584943d6fSEmmanuel Vadot ti,btcm-enable = <1>; 70684943d6fSEmmanuel Vadot ti,loczrama = <1>; 70784943d6fSEmmanuel Vadot }; 70884943d6fSEmmanuel Vadot }; 70984943d6fSEmmanuel Vadot 71084943d6fSEmmanuel Vadot mcu_esm: esm@40800000 { 71184943d6fSEmmanuel Vadot compatible = "ti,j721e-esm"; 71284943d6fSEmmanuel Vadot reg = <0x00 0x40800000 0x00 0x1000>; 71384943d6fSEmmanuel Vadot ti,esm-pins = <95>; 71484943d6fSEmmanuel Vadot bootph-pre-ram; 71584943d6fSEmmanuel Vadot }; 71684943d6fSEmmanuel Vadot 71784943d6fSEmmanuel Vadot wkup_esm: esm@42080000 { 71884943d6fSEmmanuel Vadot compatible = "ti,j721e-esm"; 71984943d6fSEmmanuel Vadot reg = <0x00 0x42080000 0x00 0x1000>; 72084943d6fSEmmanuel Vadot ti,esm-pins = <63>; 72184943d6fSEmmanuel Vadot bootph-pre-ram; 72284943d6fSEmmanuel Vadot }; 72384943d6fSEmmanuel Vadot 72484943d6fSEmmanuel Vadot /* 72584943d6fSEmmanuel Vadot * The 2 RTI instances are couple with MCU R5Fs so keeping them 72684943d6fSEmmanuel Vadot * reserved as these will be used by their respective firmware 72784943d6fSEmmanuel Vadot */ 72884943d6fSEmmanuel Vadot mcu_watchdog0: watchdog@40600000 { 72984943d6fSEmmanuel Vadot compatible = "ti,j7-rti-wdt"; 73084943d6fSEmmanuel Vadot reg = <0x00 0x40600000 0x00 0x100>; 73184943d6fSEmmanuel Vadot clocks = <&k3_clks 295 1>; 73284943d6fSEmmanuel Vadot power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>; 73384943d6fSEmmanuel Vadot assigned-clocks = <&k3_clks 295 1>; 73484943d6fSEmmanuel Vadot assigned-clock-parents = <&k3_clks 295 5>; 73584943d6fSEmmanuel Vadot /* reserved for MCU_R5F0_0 */ 73684943d6fSEmmanuel Vadot status = "reserved"; 73784943d6fSEmmanuel Vadot }; 73884943d6fSEmmanuel Vadot 73984943d6fSEmmanuel Vadot mcu_watchdog1: watchdog@40610000 { 74084943d6fSEmmanuel Vadot compatible = "ti,j7-rti-wdt"; 74184943d6fSEmmanuel Vadot reg = <0x00 0x40610000 0x00 0x100>; 74284943d6fSEmmanuel Vadot clocks = <&k3_clks 296 1>; 74384943d6fSEmmanuel Vadot power-domains = <&k3_pds 296 TI_SCI_PD_EXCLUSIVE>; 74484943d6fSEmmanuel Vadot assigned-clocks = <&k3_clks 296 1>; 74584943d6fSEmmanuel Vadot assigned-clock-parents = <&k3_clks 296 5>; 74684943d6fSEmmanuel Vadot /* reserved for MCU_R5F0_1 */ 74784943d6fSEmmanuel Vadot status = "reserved"; 74884943d6fSEmmanuel Vadot }; 749e67e8565SEmmanuel Vadot}; 750