1/dts-v1/;
2
3/ {
4	#size-cells = <0x02>;
5	#address-cells = <0x02>;
6	model-name = "microwatt";
7	compatible = "microwatt-soc";
8
9	aliases {
10		serial0 = &UART0;
11	};
12
13	reserved-memory {
14		#size-cells = <0x02>;
15		#address-cells = <0x02>;
16		ranges;
17	};
18
19	memory@0 {
20		device_type = "memory";
21		reg = <0x00000000 0x00000000 0x00000000 0x10000000>;
22	};
23
24	clocks {
25		sys_clk: litex_sys_clk {
26			#clock-cells = <0>;
27			compatible = "fixed-clock";
28			clock-frequency = <100000000>;
29		};
30	};
31
32	cpus {
33		#size-cells = <0x00>;
34		#address-cells = <0x01>;
35
36		ibm,powerpc-cpu-features {
37			display-name = "Microwatt";
38			isa = <3000>;
39			device_type = "cpu-features";
40			compatible = "ibm,powerpc-cpu-features";
41
42			mmu-radix {
43				isa = <3000>;
44				usable-privilege = <2>;
45			};
46
47			little-endian {
48				isa = <2050>;
49				usable-privilege = <3>;
50				hwcap-bit-nr = <1>;
51			};
52
53			cache-inhibited-large-page {
54				isa = <2040>;
55				usable-privilege = <2>;
56			};
57
58			fixed-point-v3 {
59				isa = <3000>;
60				usable-privilege = <3>;
61			};
62
63			no-execute {
64				isa = <2010>;
65				usable-privilege = <2>;
66			};
67
68			floating-point {
69				hwcap-bit-nr = <27>;
70				isa = <0>;
71				usable-privilege = <3>;
72			};
73		};
74
75		PowerPC,Microwatt@0 {
76			i-cache-sets = <2>;
77			ibm,dec-bits = <64>;
78			reservation-granule-size = <64>;
79			clock-frequency = <100000000>;
80			timebase-frequency = <100000000>;
81			i-tlb-sets = <1>;
82			ibm,ppc-interrupt-server#s = <0>;
83			i-cache-block-size = <64>;
84			d-cache-block-size = <64>;
85			d-cache-sets = <2>;
86			i-tlb-size = <64>;
87			cpu-version = <0x990000>;
88			status = "okay";
89			i-cache-size = <0x1000>;
90			ibm,processor-radix-AP-encodings = <0x0c 0xa0000010 0x20000015 0x4000001e>;
91			tlb-size = <0>;
92			tlb-sets = <0>;
93			device_type = "cpu";
94			d-tlb-size = <128>;
95			d-tlb-sets = <2>;
96			reg = <0>;
97			general-purpose;
98			64-bit;
99			d-cache-size = <0x1000>;
100			ibm,chip-id = <0>;
101			ibm,mmu-lpid-bits = <12>;
102			ibm,mmu-pid-bits = <20>;
103		};
104	};
105
106	soc@c0000000 {
107		compatible = "simple-bus";
108		#address-cells = <1>;
109		#size-cells = <1>;
110		interrupt-parent = <&ICS>;
111
112		ranges = <0 0 0xc0000000 0x40000000>;
113
114		interrupt-controller@4000 {
115			compatible = "openpower,xics-presentation", "ibm,ppc-xicp";
116			ibm,interrupt-server-ranges = <0x0 0x1>;
117			reg = <0x4000 0x100>;
118		};
119
120		ICS: interrupt-controller@5000 {
121			compatible = "openpower,xics-sources";
122			interrupt-controller;
123			interrupt-ranges = <0x10 0x10>;
124			reg = <0x5000 0x100>;
125			#address-cells = <0>;
126			#size-cells = <0>;
127			#interrupt-cells = <2>;
128		};
129
130		UART0: serial@2000 {
131			device_type = "serial";
132			compatible = "ns16550";
133			reg = <0x2000 0x8>;
134			clock-frequency = <100000000>;
135			current-speed = <115200>;
136			reg-shift = <2>;
137			fifo-size = <16>;
138			interrupts = <0x10 0x1>;
139		};
140
141		ethernet@8020000 {
142			compatible = "litex,liteeth";
143			reg = <0x8021000 0x100
144				0x8020800 0x100
145				0x8030000 0x2000>;
146			reg-names = "mac", "mido", "buffer";
147			litex,rx-slots = <2>;
148			litex,tx-slots = <2>;
149			litex,slot-size = <0x800>;
150			interrupts = <0x11 0x1>;
151		};
152
153		mmc@8040000 {
154			compatible = "litex,mmc";
155			reg = <0x8042800 0x800
156				0x8041000 0x800
157				0x8040800 0x800
158				0x8042000 0x800
159				0x8041800 0x800>;
160			reg-names = "phy", "core", "reader", "writer", "irq";
161			bus-width = <4>;
162			interrupts = <0x13 1>;
163			cap-sd-highspeed;
164			clocks = <&sys_clk>;
165		};
166	};
167
168	chosen {
169		bootargs = "";
170		ibm,architecture-vec-5 = [19 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00
171					  00 00 00 00 00 00 00 00 40 00 40];
172		stdout-path = &UART0;
173	};
174};
175