13a9fd824SRoger Pau Monné /* 23a9fd824SRoger Pau Monné * Permission is hereby granted, free of charge, to any person obtaining a copy 33a9fd824SRoger Pau Monné * of this software and associated documentation files (the "Software"), to 43a9fd824SRoger Pau Monné * deal in the Software without restriction, including without limitation the 53a9fd824SRoger Pau Monné * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 63a9fd824SRoger Pau Monné * sell copies of the Software, and to permit persons to whom the Software is 73a9fd824SRoger Pau Monné * furnished to do so, subject to the following conditions: 83a9fd824SRoger Pau Monné * 93a9fd824SRoger Pau Monné * The above copyright notice and this permission notice shall be included in 103a9fd824SRoger Pau Monné * all copies or substantial portions of the Software. 113a9fd824SRoger Pau Monné * 123a9fd824SRoger Pau Monné * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 133a9fd824SRoger Pau Monné * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 143a9fd824SRoger Pau Monné * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 153a9fd824SRoger Pau Monné * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 163a9fd824SRoger Pau Monné * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 173a9fd824SRoger Pau Monné * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 183a9fd824SRoger Pau Monné * DEALINGS IN THE SOFTWARE. 193a9fd824SRoger Pau Monné * 203a9fd824SRoger Pau Monné * Copyright (c) 2015 Oracle and/or its affiliates. All rights reserved. 213a9fd824SRoger Pau Monné */ 223a9fd824SRoger Pau Monné 233a9fd824SRoger Pau Monné #ifndef __XEN_PUBLIC_PMU_H__ 243a9fd824SRoger Pau Monné #define __XEN_PUBLIC_PMU_H__ 253a9fd824SRoger Pau Monné 263a9fd824SRoger Pau Monné #include "xen.h" 273a9fd824SRoger Pau Monné #if defined(__i386__) || defined(__x86_64__) 283a9fd824SRoger Pau Monné #include "arch-x86/pmu.h" 293a9fd824SRoger Pau Monné #elif defined (__arm__) || defined (__aarch64__) 303a9fd824SRoger Pau Monné #include "arch-arm.h" 313a9fd824SRoger Pau Monné #else 323a9fd824SRoger Pau Monné #error "Unsupported architecture" 333a9fd824SRoger Pau Monné #endif 343a9fd824SRoger Pau Monné 353a9fd824SRoger Pau Monné #define XENPMU_VER_MAJ 0 363a9fd824SRoger Pau Monné #define XENPMU_VER_MIN 1 373a9fd824SRoger Pau Monné 383a9fd824SRoger Pau Monné /* 393a9fd824SRoger Pau Monné * ` enum neg_errnoval 403a9fd824SRoger Pau Monné * ` HYPERVISOR_xenpmu_op(enum xenpmu_op cmd, struct xenpmu_params *args); 413a9fd824SRoger Pau Monné * 423a9fd824SRoger Pau Monné * @cmd == XENPMU_* (PMU operation) 433a9fd824SRoger Pau Monné * @args == struct xenpmu_params 443a9fd824SRoger Pau Monné */ 453a9fd824SRoger Pau Monné /* ` enum xenpmu_op { */ 463a9fd824SRoger Pau Monné #define XENPMU_mode_get 0 /* Also used for getting PMU version */ 473a9fd824SRoger Pau Monné #define XENPMU_mode_set 1 483a9fd824SRoger Pau Monné #define XENPMU_feature_get 2 493a9fd824SRoger Pau Monné #define XENPMU_feature_set 3 503a9fd824SRoger Pau Monné #define XENPMU_init 4 513a9fd824SRoger Pau Monné #define XENPMU_finish 5 523a9fd824SRoger Pau Monné #define XENPMU_lvtpc_set 6 533a9fd824SRoger Pau Monné #define XENPMU_flush 7 /* Write cached MSR values to HW */ 543a9fd824SRoger Pau Monné /* ` } */ 553a9fd824SRoger Pau Monné 563a9fd824SRoger Pau Monné /* Parameters structure for HYPERVISOR_xenpmu_op call */ 573a9fd824SRoger Pau Monné struct xen_pmu_params { 583a9fd824SRoger Pau Monné /* IN/OUT parameters */ 593a9fd824SRoger Pau Monné struct { 603a9fd824SRoger Pau Monné uint32_t maj; 613a9fd824SRoger Pau Monné uint32_t min; 623a9fd824SRoger Pau Monné } version; 633a9fd824SRoger Pau Monné uint64_t val; 643a9fd824SRoger Pau Monné 653a9fd824SRoger Pau Monné /* IN parameters */ 663a9fd824SRoger Pau Monné uint32_t vcpu; 673a9fd824SRoger Pau Monné uint32_t pad; 683a9fd824SRoger Pau Monné }; 693a9fd824SRoger Pau Monné typedef struct xen_pmu_params xen_pmu_params_t; 703a9fd824SRoger Pau Monné DEFINE_XEN_GUEST_HANDLE(xen_pmu_params_t); 713a9fd824SRoger Pau Monné 723a9fd824SRoger Pau Monné /* PMU modes: 733a9fd824SRoger Pau Monné * - XENPMU_MODE_OFF: No PMU virtualization 743a9fd824SRoger Pau Monné * - XENPMU_MODE_SELF: Guests can profile themselves 753a9fd824SRoger Pau Monné * - XENPMU_MODE_HV: Guests can profile themselves, dom0 profiles 763a9fd824SRoger Pau Monné * itself and Xen 773a9fd824SRoger Pau Monné * - XENPMU_MODE_ALL: Only dom0 has access to VPMU and it profiles 783a9fd824SRoger Pau Monné * everyone: itself, the hypervisor and the guests. 793a9fd824SRoger Pau Monné */ 803a9fd824SRoger Pau Monné #define XENPMU_MODE_OFF 0 813a9fd824SRoger Pau Monné #define XENPMU_MODE_SELF (1<<0) 823a9fd824SRoger Pau Monné #define XENPMU_MODE_HV (1<<1) 833a9fd824SRoger Pau Monné #define XENPMU_MODE_ALL (1<<2) 843a9fd824SRoger Pau Monné 853a9fd824SRoger Pau Monné /* 863a9fd824SRoger Pau Monné * PMU features: 873a9fd824SRoger Pau Monné * - XENPMU_FEATURE_INTEL_BTS: Intel BTS support (ignored on AMD) 883a9fd824SRoger Pau Monné * - XENPMU_FEATURE_IPC_ONLY: Restrict PMCs to the most minimum set possible. 893a9fd824SRoger Pau Monné * Instructions, cycles, and ref cycles. Can be 903a9fd824SRoger Pau Monné * used to calculate instructions-per-cycle (IPC) 913a9fd824SRoger Pau Monné * (ignored on AMD). 923a9fd824SRoger Pau Monné * - XENPMU_FEATURE_ARCH_ONLY: Restrict PMCs to the Intel Pre-Defined 933a9fd824SRoger Pau Monné * Architectural Performance Events exposed by 943a9fd824SRoger Pau Monné * cpuid and listed in the Intel developer's manual 953a9fd824SRoger Pau Monné * (ignored on AMD). 963a9fd824SRoger Pau Monné */ 973a9fd824SRoger Pau Monné #define XENPMU_FEATURE_INTEL_BTS (1<<0) 983a9fd824SRoger Pau Monné #define XENPMU_FEATURE_IPC_ONLY (1<<1) 993a9fd824SRoger Pau Monné #define XENPMU_FEATURE_ARCH_ONLY (1<<2) 1003a9fd824SRoger Pau Monné 1013a9fd824SRoger Pau Monné /* 1023a9fd824SRoger Pau Monné * Shared PMU data between hypervisor and PV(H) domains. 1033a9fd824SRoger Pau Monné * 1043a9fd824SRoger Pau Monné * The hypervisor fills out this structure during PMU interrupt and sends an 1053a9fd824SRoger Pau Monné * interrupt to appropriate VCPU. 1063a9fd824SRoger Pau Monné * Architecture-independent fields of xen_pmu_data are WO for the hypervisor 1073a9fd824SRoger Pau Monné * and RO for the guest but some fields in xen_pmu_arch can be writable 1083a9fd824SRoger Pau Monné * by both the hypervisor and the guest (see arch-$arch/pmu.h). 1093a9fd824SRoger Pau Monné */ 1103a9fd824SRoger Pau Monné struct xen_pmu_data { 1113a9fd824SRoger Pau Monné /* Interrupted VCPU */ 1123a9fd824SRoger Pau Monné uint32_t vcpu_id; 1133a9fd824SRoger Pau Monné 1143a9fd824SRoger Pau Monné /* 1153a9fd824SRoger Pau Monné * Physical processor on which the interrupt occurred. On non-privileged 1163a9fd824SRoger Pau Monné * guests set to vcpu_id; 1173a9fd824SRoger Pau Monné */ 1183a9fd824SRoger Pau Monné uint32_t pcpu_id; 1193a9fd824SRoger Pau Monné 1203a9fd824SRoger Pau Monné /* 1213a9fd824SRoger Pau Monné * Domain that was interrupted. On non-privileged guests set to DOMID_SELF. 1223a9fd824SRoger Pau Monné * On privileged guests can be DOMID_SELF, DOMID_XEN, or, when in 1233a9fd824SRoger Pau Monné * XENPMU_MODE_ALL mode, domain ID of another domain. 1243a9fd824SRoger Pau Monné */ 1253a9fd824SRoger Pau Monné domid_t domain_id; 1263a9fd824SRoger Pau Monné 1273a9fd824SRoger Pau Monné uint8_t pad[6]; 1283a9fd824SRoger Pau Monné 1293a9fd824SRoger Pau Monné /* Architecture-specific information */ 1303a9fd824SRoger Pau Monné xen_pmu_arch_t pmu; 1313a9fd824SRoger Pau Monné }; 1323a9fd824SRoger Pau Monné 1333a9fd824SRoger Pau Monné #endif /* __XEN_PUBLIC_PMU_H__ */ 1343a9fd824SRoger Pau Monné 1353a9fd824SRoger Pau Monné /* 1363a9fd824SRoger Pau Monné * Local variables: 1373a9fd824SRoger Pau Monné * mode: C 1383a9fd824SRoger Pau Monné * c-file-style: "BSD" 1393a9fd824SRoger Pau Monné * c-basic-offset: 4 1403a9fd824SRoger Pau Monné * tab-width: 4 1413a9fd824SRoger Pau Monné * indent-tabs-mode: nil 1423a9fd824SRoger Pau Monné * End: 1433a9fd824SRoger Pau Monné */ 144