1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/malloc.h> 33 #include <sys/kernel.h> 34 #include <sys/module.h> 35 #include <sys/bus.h> 36 #include <sys/lock.h> 37 #include <sys/mutex.h> 38 #include <sys/proc.h> 39 40 #include <dev/agp/agppriv.h> 41 #include <dev/agp/agpreg.h> 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pcireg.h> 44 45 #include <vm/vm.h> 46 #include <vm/vm_extern.h> 47 #include <vm/vm_kern.h> 48 #include <vm/vm_object.h> 49 #include <vm/pmap.h> 50 #include <machine/bus.h> 51 #include <machine/resource.h> 52 #include <sys/rman.h> 53 54 MALLOC_DECLARE(M_AGP); 55 56 #define READ2(off) bus_space_read_2(sc->bst, sc->bsh, off) 57 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) 58 #define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v) 59 #define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v) 60 61 struct agp_amd_gatt { 62 u_int32_t ag_entries; 63 u_int32_t *ag_virtual; /* virtual address of gatt */ 64 vm_offset_t ag_physical; 65 u_int32_t *ag_vdir; /* virtual address of page dir */ 66 vm_offset_t ag_pdir; /* physical address of page dir */ 67 }; 68 69 struct agp_amd_softc { 70 struct agp_softc agp; 71 struct resource *regs; /* memory mapped control registers */ 72 bus_space_tag_t bst; /* bus_space tag */ 73 bus_space_handle_t bsh; /* bus_space handle */ 74 u_int32_t initial_aperture; /* aperture size at startup */ 75 struct agp_amd_gatt *gatt; 76 }; 77 78 static struct agp_amd_gatt * 79 agp_amd_alloc_gatt(device_t dev) 80 { 81 u_int32_t apsize = AGP_GET_APERTURE(dev); 82 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 83 struct agp_amd_gatt *gatt; 84 int i, npages, pdir_offset; 85 86 if (bootverbose) 87 device_printf(dev, 88 "allocating GATT for aperture of size %dM\n", 89 apsize / (1024*1024)); 90 91 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); 92 if (!gatt) 93 return 0; 94 95 /* 96 * The AMD751 uses a page directory to map a non-contiguous 97 * gatt so we don't need to use kmem_alloc_contig. 98 * Allocate individual GATT pages and map them into the page 99 * directory. 100 */ 101 gatt->ag_entries = entries; 102 gatt->ag_virtual = kmem_alloc_attr(entries * sizeof(uint32_t), 103 M_NOWAIT | M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING); 104 if (!gatt->ag_virtual) { 105 if (bootverbose) 106 device_printf(dev, "allocation failed\n"); 107 free(gatt, M_AGP); 108 return 0; 109 } 110 111 /* 112 * Allocate the page directory. 113 */ 114 gatt->ag_vdir = kmem_alloc_attr(AGP_PAGE_SIZE, M_NOWAIT | 115 M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING); 116 if (!gatt->ag_vdir) { 117 if (bootverbose) 118 device_printf(dev, 119 "failed to allocate page directory\n"); 120 kmem_free(gatt->ag_virtual, entries * sizeof(uint32_t)); 121 free(gatt, M_AGP); 122 return 0; 123 } 124 125 gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir); 126 if(bootverbose) 127 device_printf(dev, "gatt -> ag_pdir %#lx\n", 128 (u_long)gatt->ag_pdir); 129 /* 130 * Allocate the gatt pages 131 */ 132 gatt->ag_entries = entries; 133 if(bootverbose) 134 device_printf(dev, "allocating GATT for %d AGP page entries\n", 135 gatt->ag_entries); 136 137 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 138 139 /* 140 * Map the pages of the GATT into the page directory. 141 * 142 * The GATT page addresses are mapped into the directory offset by 143 * an amount dependent on the base address of the aperture. This 144 * is and offset into the page directory, not an offset added to 145 * the addresses of the gatt pages. 146 */ 147 148 pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22; 149 150 npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1) 151 >> AGP_PAGE_SHIFT); 152 153 for (i = 0; i < npages; i++) { 154 vm_offset_t va; 155 vm_offset_t pa; 156 157 va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE; 158 pa = vtophys(va); 159 gatt->ag_vdir[i + pdir_offset] = pa | 1; 160 } 161 162 return gatt; 163 } 164 165 static void 166 agp_amd_free_gatt(struct agp_amd_gatt *gatt) 167 { 168 kmem_free(gatt->ag_vdir, AGP_PAGE_SIZE); 169 kmem_free(gatt->ag_virtual, gatt->ag_entries * sizeof(uint32_t)); 170 free(gatt, M_AGP); 171 } 172 173 static const char* 174 agp_amd_match(device_t dev) 175 { 176 if (pci_get_class(dev) != PCIC_BRIDGE 177 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) 178 return NULL; 179 180 if (agp_find_caps(dev) == 0) 181 return NULL; 182 183 switch (pci_get_devid(dev)) { 184 case 0x70061022: 185 return ("AMD 751 host to AGP bridge"); 186 case 0x700e1022: 187 return ("AMD 761 host to AGP bridge"); 188 case 0x700c1022: 189 return ("AMD 762 host to AGP bridge"); 190 } 191 192 return NULL; 193 } 194 195 static int 196 agp_amd_probe(device_t dev) 197 { 198 const char *desc; 199 200 if (resource_disabled("agp", device_get_unit(dev))) 201 return (ENXIO); 202 desc = agp_amd_match(dev); 203 if (desc) { 204 device_set_desc(dev, desc); 205 return BUS_PROBE_DEFAULT; 206 } 207 208 return ENXIO; 209 } 210 211 static int 212 agp_amd_attach(device_t dev) 213 { 214 struct agp_amd_softc *sc = device_get_softc(dev); 215 struct agp_amd_gatt *gatt; 216 int error, rid; 217 218 error = agp_generic_attach(dev); 219 if (error) 220 return error; 221 222 rid = AGP_AMD751_REGISTERS; 223 sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 224 RF_ACTIVE); 225 if (!sc->regs) { 226 agp_generic_detach(dev); 227 return ENOMEM; 228 } 229 230 sc->bst = rman_get_bustag(sc->regs); 231 sc->bsh = rman_get_bushandle(sc->regs); 232 233 sc->initial_aperture = AGP_GET_APERTURE(dev); 234 235 for (;;) { 236 gatt = agp_amd_alloc_gatt(dev); 237 if (gatt) 238 break; 239 240 /* 241 * Probably contigmalloc failure. Try reducing the 242 * aperture so that the gatt size reduces. 243 */ 244 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) 245 return ENOMEM; 246 } 247 sc->gatt = gatt; 248 249 /* Install the gatt. */ 250 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir); 251 252 /* Enable synchronisation between host and agp. */ 253 pci_write_config(dev, 254 AGP_AMD751_MODECTRL, 255 AGP_AMD751_MODECTRL_SYNEN, 1); 256 257 /* Set indexing mode for two-level and enable page dir cache */ 258 pci_write_config(dev, 259 AGP_AMD751_MODECTRL2, 260 AGP_AMD751_MODECTRL2_GPDCE, 1); 261 262 /* Enable the TLB and flush */ 263 WRITE2(AGP_AMD751_STATUS, 264 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); 265 AGP_FLUSH_TLB(dev); 266 267 return 0; 268 } 269 270 static int 271 agp_amd_detach(device_t dev) 272 { 273 struct agp_amd_softc *sc = device_get_softc(dev); 274 275 agp_free_cdev(dev); 276 277 /* Disable the TLB.. */ 278 WRITE2(AGP_AMD751_STATUS, 279 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); 280 281 /* Disable host-agp sync */ 282 pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1); 283 284 /* Clear the GATT base */ 285 WRITE4(AGP_AMD751_ATTBASE, 0); 286 287 /* Put the aperture back the way it started. */ 288 AGP_SET_APERTURE(dev, sc->initial_aperture); 289 290 agp_amd_free_gatt(sc->gatt); 291 agp_free_res(dev); 292 293 bus_release_resource(dev, SYS_RES_MEMORY, 294 AGP_AMD751_REGISTERS, sc->regs); 295 296 return 0; 297 } 298 299 static u_int32_t 300 agp_amd_get_aperture(device_t dev) 301 { 302 int vas; 303 304 /* 305 * The aperture size is equal to 32M<<vas. 306 */ 307 vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1; 308 return (32*1024*1024) << vas; 309 } 310 311 static int 312 agp_amd_set_aperture(device_t dev, u_int32_t aperture) 313 { 314 int vas; 315 316 /* 317 * Check for a power of two and make sure its within the 318 * programmable range. 319 */ 320 if (aperture & (aperture - 1) 321 || aperture < 32*1024*1024 322 || aperture > 2U*1024*1024*1024) 323 return EINVAL; 324 325 vas = ffs(aperture / 32*1024*1024) - 1; 326 327 /* 328 * While the size register is bits 1-3 of APCTRL, bit 0 must be 329 * set for the size value to be 'valid' 330 */ 331 pci_write_config(dev, AGP_AMD751_APCTRL, 332 (((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06) 333 | ((vas << 1) | 1))), 1); 334 335 return 0; 336 } 337 338 static int 339 agp_amd_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical) 340 { 341 struct agp_amd_softc *sc = device_get_softc(dev); 342 343 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 344 return EINVAL; 345 346 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1; 347 return 0; 348 } 349 350 static int 351 agp_amd_unbind_page(device_t dev, vm_offset_t offset) 352 { 353 struct agp_amd_softc *sc = device_get_softc(dev); 354 355 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 356 return EINVAL; 357 358 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 359 return 0; 360 } 361 362 static void 363 agp_amd_flush_tlb(device_t dev) 364 { 365 struct agp_amd_softc *sc = device_get_softc(dev); 366 367 /* Set the cache invalidate bit and wait for the chipset to clear */ 368 WRITE4(AGP_AMD751_TLBCTRL, 1); 369 do { 370 DELAY(1); 371 } while (READ4(AGP_AMD751_TLBCTRL)); 372 } 373 374 static device_method_t agp_amd_methods[] = { 375 /* Device interface */ 376 DEVMETHOD(device_probe, agp_amd_probe), 377 DEVMETHOD(device_attach, agp_amd_attach), 378 DEVMETHOD(device_detach, agp_amd_detach), 379 DEVMETHOD(device_shutdown, bus_generic_shutdown), 380 DEVMETHOD(device_suspend, bus_generic_suspend), 381 DEVMETHOD(device_resume, bus_generic_resume), 382 383 /* AGP interface */ 384 DEVMETHOD(agp_get_aperture, agp_amd_get_aperture), 385 DEVMETHOD(agp_set_aperture, agp_amd_set_aperture), 386 DEVMETHOD(agp_bind_page, agp_amd_bind_page), 387 DEVMETHOD(agp_unbind_page, agp_amd_unbind_page), 388 DEVMETHOD(agp_flush_tlb, agp_amd_flush_tlb), 389 DEVMETHOD(agp_enable, agp_generic_enable), 390 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), 391 DEVMETHOD(agp_free_memory, agp_generic_free_memory), 392 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), 393 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), 394 { 0, 0 } 395 }; 396 397 static driver_t agp_amd_driver = { 398 "agp", 399 agp_amd_methods, 400 sizeof(struct agp_amd_softc), 401 }; 402 403 DRIVER_MODULE(agp_amd, hostb, agp_amd_driver, 0, 0); 404 MODULE_DEPEND(agp_amd, agp, 1, 1, 1); 405 MODULE_DEPEND(agp_amd, pci, 1, 1, 1); 406